commit
f8971916bb
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@ -788,7 +788,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
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{
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{
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InstLoc I = ibuild->ReadBackward();
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InstLoc I = ibuild->ReadBackward();
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unsigned int op = getOpcode(*I);
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unsigned int op = getOpcode(*I);
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bool thisUsed = regReadUse(RI, I) ? true : false;
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bool thisUsed = regReadUse(RI, I) != 0;
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switch (op)
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switch (op)
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{
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{
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@ -962,7 +962,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
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for (unsigned i = 0; i != RI.IInfo.size(); i++)
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for (unsigned i = 0; i != RI.IInfo.size(); i++)
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{
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{
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InstLoc I = ibuild->ReadForward();
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InstLoc I = ibuild->ReadForward();
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bool thisUsed = regReadUse(RI, I) ? true : false;
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bool thisUsed = regReadUse(RI, I) != 0;
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if (thisUsed)
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if (thisUsed)
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{
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{
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// Needed for IR Writer
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// Needed for IR Writer
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@ -1621,7 +1621,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
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w ? Jit->asm_routines.singleLoadQuantized : Jit->asm_routines.pairedLoadQuantized;
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w ? Jit->asm_routines.singleLoadQuantized : Jit->asm_routines.pairedLoadQuantized;
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Jit->MOV(32, R(RSCRATCH_EXTRA), regLocForInst(RI, getOp1(I)));
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Jit->MOV(32, R(RSCRATCH_EXTRA), regLocForInst(RI, getOp1(I)));
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Jit->CALLptr(MScaled(RSCRATCH, SCALE_8, (u32)(u64)table));
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Jit->CALLptr(MScaled(RSCRATCH, SCALE_8, PtrOffset(table)));
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Jit->MOVAPD(reg, R(XMM0));
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Jit->MOVAPD(reg, R(XMM0));
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RI.fregs[reg] = I;
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RI.fregs[reg] = I;
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regNormalRegClear(RI, I);
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regNormalRegClear(RI, I);
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@ -1679,7 +1679,7 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
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Jit->MOV(32, R(RSCRATCH_EXTRA), regLocForInst(RI, getOp2(I)));
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Jit->MOV(32, R(RSCRATCH_EXTRA), regLocForInst(RI, getOp2(I)));
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Jit->MOVAPD(XMM0, fregLocForInst(RI, getOp1(I)));
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Jit->MOVAPD(XMM0, fregLocForInst(RI, getOp1(I)));
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Jit->CALLptr(MScaled(RSCRATCH, SCALE_8, (u32)(u64)(Jit->asm_routines.pairedStoreQuantized)));
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Jit->CALLptr(MScaled(RSCRATCH, SCALE_8, PtrOffset(Jit->asm_routines.pairedStoreQuantized)));
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if (RI.IInfo[I - RI.FirstI] & 4)
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if (RI.IInfo[I - RI.FirstI] & 4)
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fregClearInst(RI, getOp1(I));
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fregClearInst(RI, getOp1(I));
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if (RI.IInfo[I - RI.FirstI] & 8)
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if (RI.IInfo[I - RI.FirstI] & 8)
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@ -2101,10 +2101,10 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, u32 exitAddress)
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X64Reg reg = regFindFreeReg(RI);
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X64Reg reg = regFindFreeReg(RI);
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u64 val = ibuild->GetImmValue64(I);
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u64 val = ibuild->GetImmValue64(I);
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if ((u32)val == val)
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if (static_cast<u32>(val) == val)
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Jit->MOV(32, R(reg), Imm32((u32)val));
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Jit->MOV(32, R(reg), Imm32(static_cast<u32>(val)));
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else if ((s32)val == (s64)val)
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else if (static_cast<s32>(val) == static_cast<s64>(val))
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Jit->MOV(64, R(reg), Imm32((s32)val));
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Jit->MOV(64, R(reg), Imm32(static_cast<s32>(val)));
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else
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else
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Jit->MOV(64, R(reg), Imm64(val));
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Jit->MOV(64, R(reg), Imm64(val));
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RI.regs[reg] = I;
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RI.regs[reg] = I;
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