Merge pull request #2882 from lioncash/namespace
Jit: Remove unnecessary namespace prefixes
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commit
f481a306c2
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@ -128,7 +128,7 @@ void Jit64::FinalizeCarryOverflow(bool oe, bool inv)
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// to be recalculated and haven't been clobbered. Keep in mind not all instructions set
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// sufficient flags -- for example, the flags from SHL/SHR are *not* sufficient for LT/GT
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// branches, only EQ.
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void Jit64::ComputeRC(const Gen::OpArg & arg, bool needs_test, bool needs_sext)
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void Jit64::ComputeRC(const OpArg& arg, bool needs_test, bool needs_sext)
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{
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_assert_msg_(DYNA_REC, arg.IsSimpleReg() || arg.IsImm(), "Invalid ComputeRC operand");
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if (arg.IsImm())
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@ -215,7 +215,7 @@ static u32 Xor(u32 a, u32 b)
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return a ^ b;
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}
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void Jit64::regimmop(int d, int a, bool binary, u32 value, Operation doop, void (XEmitter::*op)(int, const Gen::OpArg&, const Gen::OpArg&), bool Rc, bool carry)
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void Jit64::regimmop(int d, int a, bool binary, u32 value, Operation doop, void (XEmitter::*op)(int, const OpArg&, const OpArg&), bool Rc, bool carry)
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{
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bool needs_test = false;
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gpr.Lock(d, a);
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@ -162,7 +162,7 @@ void Jit64::lXXx(UGeckoInstruction inst)
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s32 loadOffset = 0;
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// Prepare address operand
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Gen::OpArg opAddress;
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OpArg opAddress;
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if (!update && !a)
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{
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if (inst.OPCD == 31)
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@ -11,7 +11,7 @@
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using namespace Gen;
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void Jit64::GetCRFieldBit(int field, int bit, Gen::X64Reg out, bool negate)
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void Jit64::GetCRFieldBit(int field, int bit, X64Reg out, bool negate)
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{
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switch (bit)
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{
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@ -40,7 +40,7 @@ void Jit64::GetCRFieldBit(int field, int bit, Gen::X64Reg out, bool negate)
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}
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}
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void Jit64::SetCRFieldBit(int field, int bit, Gen::X64Reg in)
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void Jit64::SetCRFieldBit(int field, int bit, X64Reg in)
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{
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MOV(64, R(RSCRATCH2), PPCSTATE(cr_val[field]));
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MOVZX(32, 8, in, R(in));
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@ -375,7 +375,7 @@ void JitIL::WriteExit(u32 destination)
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b->linkData.push_back(linkData);
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}
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void JitIL::WriteExitDestInOpArg(const Gen::OpArg& arg)
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void JitIL::WriteExitDestInOpArg(const OpArg& arg)
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{
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MOV(32, PPCSTATE(pc), arg);
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Cleanup();
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@ -387,7 +387,7 @@ void JitIL::WriteExitDestInOpArg(const Gen::OpArg& arg)
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JMP(asm_routines.dispatcher, true);
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}
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void JitIL::WriteRfiExitDestInOpArg(const Gen::OpArg& arg)
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void JitIL::WriteRfiExitDestInOpArg(const OpArg& arg)
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{
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MOV(32, PPCSTATE(pc), arg);
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MOV(32, PPCSTATE(npc), arg);
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