From f452a6442f395587d7c57e1603319ff47891b678 Mon Sep 17 00:00:00 2001 From: John Peterson Date: Sun, 19 May 2013 17:14:29 +0200 Subject: [PATCH] Adding MMU state values to state because that allow the MMU state to be loaded --- Source/Core/Core/Src/HW/MemmapFunctions.cpp | 11 ++++------- Source/Core/Core/Src/PowerPC/PowerPC.cpp | 2 ++ Source/Core/Core/Src/PowerPC/PowerPC.h | 3 +++ Source/Core/Core/Src/State.cpp | 2 +- 4 files changed, 10 insertions(+), 8 deletions(-) diff --git a/Source/Core/Core/Src/HW/MemmapFunctions.cpp b/Source/Core/Core/Src/HW/MemmapFunctions.cpp index 39c852ec22..0e899079c5 100644 --- a/Source/Core/Core/Src/HW/MemmapFunctions.cpp +++ b/Source/Core/Core/Src/HW/MemmapFunctions.cpp @@ -598,9 +598,6 @@ union UPTE2 u32 Hex; }; -u32 pagetable_base = 0; -u32 pagetable_hashmask = 0; - void GenerateDSIException(u32 _EffectiveAddress, bool _bWrite) { if (_bWrite) @@ -644,8 +641,8 @@ void SDRUpdated() { return; } - pagetable_base = htaborg<<16; - pagetable_hashmask = ((xx<<10)|0x3ff); + PowerPC::ppcState.pagetable_base = htaborg<<16; + PowerPC::ppcState.pagetable_hashmask = ((xx<<10)|0x3ff); } @@ -821,7 +818,7 @@ u32 TranslatePageAddress(const u32 _Address, const XCheckTLBFlag _Flag) // hash function no 1 "xor" .360 u32 hash1 = (VSID ^ page_index); - u32 pteg_addr = ((hash1 & pagetable_hashmask) << 6) | pagetable_base; + u32 pteg_addr = ((hash1 & PowerPC::ppcState.pagetable_hashmask) << 6) | PowerPC::ppcState.pagetable_base; // hash1 for (int i = 0; i < 8; i++) @@ -856,7 +853,7 @@ u32 TranslatePageAddress(const u32 _Address, const XCheckTLBFlag _Flag) // hash function no 2 "not" .360 hash1 = ~hash1; - pteg_addr = ((hash1 & pagetable_hashmask) << 6) | pagetable_base; + pteg_addr = ((hash1 & PowerPC::ppcState.pagetable_hashmask) << 6) | PowerPC::ppcState.pagetable_base; for (int i = 0; i < 8; i++) { u32 pte = bswap(*(u32*)&pRAM[pteg_addr]); diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.cpp b/Source/Core/Core/Src/PowerPC/PowerPC.cpp index 7628e1298e..4f45d08ede 100644 --- a/Source/Core/Core/Src/PowerPC/PowerPC.cpp +++ b/Source/Core/Core/Src/PowerPC/PowerPC.cpp @@ -138,6 +138,8 @@ void Init(int cpu_core) ppcState.itlb_last = 0; memset(ppcState.itlb_va, 0, sizeof(ppcState.itlb_va)); memset(ppcState.itlb_pa, 0, sizeof(ppcState.itlb_pa)); + ppcState.pagetable_base = 0; + ppcState.pagetable_hashmask = 0; ResetRegisters(); PPCTables::InitTables(cpu_core); diff --git a/Source/Core/Core/Src/PowerPC/PowerPC.h b/Source/Core/Core/Src/PowerPC/PowerPC.h index 219dcc192f..82c912d213 100644 --- a/Source/Core/Core/Src/PowerPC/PowerPC.h +++ b/Source/Core/Core/Src/PowerPC/PowerPC.h @@ -64,6 +64,9 @@ struct GC_ALIGNED64(PowerPCState) u32 itlb_va[128]; u32 itlb_pa[128]; + u32 pagetable_base; + u32 pagetable_hashmask; + InstructionCache iCache; }; diff --git a/Source/Core/Core/Src/State.cpp b/Source/Core/Core/Src/State.cpp index 5923ba6917..f41b32485e 100644 --- a/Source/Core/Core/Src/State.cpp +++ b/Source/Core/Core/Src/State.cpp @@ -59,7 +59,7 @@ static Common::Event g_compressAndDumpStateSyncEvent; static std::thread g_save_thread; // Don't forget to increase this after doing changes on the savestate system -static const u32 STATE_VERSION = 18; +static const u32 STATE_VERSION = 19; enum {