From f3b144d5636d4cdf49c00f9c7317100d356a61d8 Mon Sep 17 00:00:00 2001 From: pierre Date: Thu, 7 Oct 2010 18:36:08 +0000 Subject: [PATCH] Core/DSPCore: Fix register use in two (currently) unused functions, correct the IsSameMemArea check in the rest of the file. Looks like this is simply a copy-paste error, that i dutifully "fixed" for 64 bits. No idea if this fixes anything, but it brings JIT more in line with the interpreter. git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6263 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp | 44 ++++++++------------ 1 file changed, 18 insertions(+), 26 deletions(-) diff --git a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp index 99c3c874bd..fa5e1743cd 100644 --- a/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp +++ b/Source/Core/DSPCore/Src/Jit/DSPJitExtOps.cpp @@ -110,7 +110,7 @@ void DSPEmitter::l(const UDSPInstruction opc) MOV(16, M(&g_dsp.r[dreg]), R(EAX)); #else MOV(64, R(R11), ImmPtr(&g_dsp.r)); - MOV(16, MDisp(RDX,dreg*2), R(EAX)); + MOV(16, MDisp(R11,dreg*2), R(EAX)); #endif increment_addr_reg(sreg); } @@ -142,7 +142,7 @@ void DSPEmitter::ln(const UDSPInstruction opc) MOV(16, M(&g_dsp.r[dreg]), R(EAX)); #else MOV(64, R(R11), ImmPtr(&g_dsp.r)); - MOV(16, MDisp(RDX,dreg*2), R(EAX)); + MOV(16, MDisp(R11,dreg*2), R(EAX)); #endif increase_addr_reg(sreg); } @@ -329,11 +329,10 @@ void DSPEmitter::ld(const UDSPInstruction opc) // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[sreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,sreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -372,11 +371,10 @@ void DSPEmitter::ld(const UDSPInstruction opc) //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[dreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,dreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -427,11 +425,10 @@ void DSPEmitter::ldn(const UDSPInstruction opc) // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[sreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,sreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -468,11 +465,10 @@ void DSPEmitter::ldn(const UDSPInstruction opc) //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[dreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,dreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -522,11 +518,10 @@ void DSPEmitter::ldm(const UDSPInstruction opc) // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[sreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,sreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -564,11 +559,10 @@ void DSPEmitter::ldm(const UDSPInstruction opc) //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[dreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,dreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -618,11 +612,10 @@ void DSPEmitter::ldnm(const UDSPInstruction opc) // if (IsSameMemArea(g_dsp.r[sreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[sreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,sreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10)); @@ -659,11 +652,10 @@ void DSPEmitter::ldnm(const UDSPInstruction opc) //if (IsSameMemArea(g_dsp.r[dreg], g_dsp.r[DSP_REG_AR3])) { #ifdef _M_IX86 // All32 MOV(16, R(ESI), M(&g_dsp.r[dreg])); - MOV(16, R(EDI), M(&g_dsp.r[g_dsp.r[DSP_REG_AR3]])); + MOV(16, R(EDI), M(&g_dsp.r[DSP_REG_AR3])); #else MOV(16, R(ESI), MDisp(R11,dreg*2)); - MOVZX(64, 16, RDI, MDisp(R11,DSP_REG_AR3*2)); - MOV(16, R(EDI), MComplex(R11,RDI,2,0)); + MOV(16, R(EDI), MDisp(R11,DSP_REG_AR3*2)); #endif SHR(16, R(ESI), Imm8(10)); SHR(16, R(EDI), Imm8(10));