diff --git a/Source/Core/Common/Src/ArmEmitter.cpp b/Source/Core/Common/Src/ArmEmitter.cpp index 10c72cf39f..c3c9f0d0f8 100644 --- a/Source/Core/Common/Src/ArmEmitter.cpp +++ b/Source/Core/Common/Src/ArmEmitter.cpp @@ -820,25 +820,25 @@ void ARMXEmitter::VSUB(IntegerSize Size, ARMReg Vd, ARMReg Vn, ARMReg Vm) // VFP Specific struct VFPEnc { - u16 opc1; - u16 opc2; + s16 opc1; + s16 opc2; }; // Double/single, Neon const VFPEnc VFPOps[][2] = { - {{0xE0, 0xA0}, {0x20, 0xD1}}, // VMLA - {{0xE0, 0xA4}, {0x22, 0xD1}}, // VMLS - {{0xE3, 0xA0}, {0x20, 0xD0}}, // VADD - {{0xE3, 0xA4}, {0x22, 0xD0}}, // VSUB - {{0xE2, 0xA0}, {0x30, 0xD1}}, // VMUL - {{0xEB, 0xAC}, {0x3B, 0x30}}, // VABS - {{0xE8, 0xA0}, { -1, -1}}, // VDIV - {{0xEB, 0xA4}, { -1, -1}}, // VNEG - {{0xEB, 0xAC}, { -1, -1}}, // VSQRT - {{0xED, 0xA2}, { -1, -1}}, // VCMP - {{0xED, 0xAA}, { -1, -1}}, // VCMPE - {{ -1, -1}, {0x3B, 0x70}}, // VABSi + {{0xE0, 0xA0}, {0x20, 0xD1}}, // 0: VMLA + {{0xE0, 0xA4}, {0x22, 0xD1}}, // 1: VMLS + {{0xE3, 0xA0}, {0x20, 0xD0}}, // 2: VADD + {{0xE3, 0xA4}, {0x22, 0xD0}}, // 3: VSUB + {{0xE2, 0xA0}, {0x30, 0xD1}}, // 4: VMUL + {{0xEB, 0xAC}, { -1 /* 0x3B */, -1 /* 0x70 */}}, // 5: VABS(Vn(0x0) used for encoding) + {{0xE8, 0xA0}, { -1, -1}}, // 6: VDIV + {{0xEB, 0xA4}, { -1 /* 0x3B */, -1 /* 0x78 */}}, // 7: VNEG(Vn(0x1) used for encoding) + {{0xEB, 0xAC}, { -1, -1}}, // 8: VSQRT (Vn(0x1) used for encoding) + {{0xEB, 0xA4}, { -1, -1}}, // 9: VCMP (Vn(0x4 | #0 ? 1 : 0) used for encoding) + {{0xEB, 0xAC}, { -1, -1}}, // 10: VCMPE (Vn(0x4 | #0 ? 1 : 0) used for encoding) + {{ -1, -1}, {0x3B, 0x30}}, // 11: VABSi }; -const char *VFPOps[] = { +const char *VFPOpNames[] = { "VMLA", "VMLS", "VADD", @@ -861,10 +861,10 @@ u32 ARMXEmitter::EncodeVd(ARMReg Vd) ARMReg Reg = SubBase(Vd); if (quad_reg) - ((Reg & 0x10) << 18) | ((Reg & 0xF) << 12); + return ((Reg & 0x10) << 18) | ((Reg & 0xF) << 12); else if (double_reg) - return ((Reg & 0x10) << 18) | ((Reg & 0xF) << 16); + return ((Reg & 0x10) << 18) | ((Reg & 0xF) << 12); else return ((Reg & 0x1) << 22) | ((Reg & 0x1E) << 11); } @@ -875,7 +875,7 @@ u32 ARMXEmitter::EncodeVn(ARMReg Vn) ARMReg Reg = SubBase(Vn); if (quad_reg) - ((Reg & 0xF) << 16) | ((Reg & 0x10) << 3); + return ((Reg & 0xF) << 16) | ((Reg & 0x10) << 3); else if (double_reg) return ((Reg & 0xF) << 16) | ((Reg & 0x10) << 3); @@ -890,7 +890,7 @@ u32 ARMXEmitter::EncodeVm(ARMReg Vm) ARMReg Reg = SubBase(Vm); if (quad_reg) - ((Reg & 0x10) << 2) | (Reg & 0xF); + return ((Reg & 0x10) << 2) | (Reg & 0xF); else if (double_reg) return ((Reg & 0x10) << 2) | (Reg & 0xF); @@ -900,18 +900,31 @@ u32 ARMXEmitter::EncodeVm(ARMReg Vm) void ARMXEmitter::WriteVFPDataOp(u32 Op, ARMReg Vd, ARMReg Vn, ARMReg Vm) { bool quad_reg = Vd >= Q0; - bool double_reg = Vd >= D0; + bool double_reg = Vd >= D0 && Vd < Q0; VFPEnc enc = VFPOps[Op][quad_reg]; - if (enc.opc1 == (u16)-1 && enc.opc1 == (u16)-1) - _assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOps[Op], quad_reg ? "NEON" : "VFP"); + if (enc.opc1 == -1 && enc.opc1 == -1) + _assert_msg_(DYNA_REC, false, "%s does not support %s", VFPOpNames[Op], quad_reg ? "NEON" : "VFP"); u32 VdEnc = EncodeVd(Vd); u32 VnEnc = EncodeVn(Vn); u32 VmEnc = EncodeVm(Vm); u32 cond = quad_reg ? (0xF << 28) : condition; - - Write32(cond | enc.opc1 | VnEnc | VdEnc | enc.opc2 | VmEnc); + + Write32(cond | (enc.opc1 << 20) | VnEnc | VdEnc | (enc.opc2 << 4) | (quad_reg << 6) | (double_reg << 8) | VmEnc); } +void ARMXEmitter::VMLA(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(0, Vd, Vn, Vm); } +void ARMXEmitter::VMLS(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(1, Vd, Vn, Vm); } +void ARMXEmitter::VADD(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(2, Vd, Vn, Vm); } +void ARMXEmitter::VSUB(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(3, Vd, Vn, Vm); } +void ARMXEmitter::VMUL(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(4, Vd, Vn, Vm); } +void ARMXEmitter::VABS(ARMReg Vd, ARMReg Vm){ WriteVFPDataOp(5, Vd, D0, Vm); } +void ARMXEmitter::VDIV(ARMReg Vd, ARMReg Vn, ARMReg Vm){ WriteVFPDataOp(6, Vd, Vn, Vm); } +void ARMXEmitter::VNEG(ARMReg Vd, ARMReg Vm){ WriteVFPDataOp(7, Vd, D1, Vm); } +void ARMXEmitter::VSQRT(ARMReg Vd, ARMReg Vm){ WriteVFPDataOp(8, Vd, D1, Vm); } +void ARMXEmitter::VCMP(ARMReg Vd, ARMReg Vm){ WriteVFPDataOp(9, Vd, D4, Vm); } +void ARMXEmitter::VCMPE(ARMReg Vd, ARMReg Vm){ WriteVFPDataOp(10, Vd, D4, Vm); } +void ARMXEmitter::VCMP(ARMReg Vd){ WriteVFPDataOp(9, Vd, D5, D0); } +void ARMXEmitter::VCMPE(ARMReg Vd){ WriteVFPDataOp(10, Vd, D5, D0); } void ARMXEmitter::VLDR(ARMReg Dest, ARMReg Base, s16 offset) { @@ -970,43 +983,6 @@ void ARMXEmitter::VSTR(ARMReg Src, ARMReg Base, s16 offset) | ((Src & 0xF) << 12) | (11 << 8) | (imm >> 2)); } } -void ARMXEmitter::VCMP(ARMReg Vd, ARMReg Vm, bool E) -{ - _assert_msg_(DYNA_REC, Vd < Q0, "Passed invalid Vd to VCMP"); - bool single_reg = Vd < D0; - - Vd = SubBase(Vd); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1D << 23) | ((Vd & 0x1) << 22) | (0x34 << 16) | ((Vd & 0x1E) << 11) \ - | (E << 7) | (0x29 << 6) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - Write32(condition | (0x1D << 23) | ((Vd & 0x10) << 18) | (0x34 << 16) | ((Vd & 0xF) << 12) \ - | (E << 7) | (0x2C << 6) | ((Vm & 0x10) << 1) | (Vm & 0xF)); - } -} -void ARMXEmitter::VCMP(ARMReg Vd, bool E) -{ - _assert_msg_(DYNA_REC, Vd < Q0, "Passed invalid Vd to VCMP"); - bool single_reg = Vd < D0; - - Vd = SubBase(Vd); - - if (single_reg) - { - Write32(condition | (0x1D << 23) | ((Vd & 0x1) << 22) | (0x35 << 16) | ((Vd & 0x1E) << 11) \ - | (E << 7) | (0x29 << 6)); - } - else - { - Write32(condition | (0x1D << 23) | ((Vd & 0x10) << 18) | (0x35 << 16) | ((Vd & 0xF) << 12) \ - | (E << 7) | (0x2C << 6)); - } -} void ARMXEmitter::VMRS_APSR() { Write32(condition | 0xEF10A10 | (15 << 12)); @@ -1018,229 +994,7 @@ void ARMXEmitter::VMSR(ARMReg Rt) { Write32(condition | (0xEE << 20) | (1 << 16) | (Rt << 12) | 0xA10); } -void ARMXEmitter::VDIV(ARMReg Vd, ARMReg Vn, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd < Q0, "Pased invalid dest register to VSQRT"); - _assert_msg_(DYNA_REC, Vn < Q0, "Passed invalid Vn to VSQRT"); - _assert_msg_(DYNA_REC, Vm < Q0, "Passed invalid Vm to VSQRT"); - bool single_reg = Vd < D0; - - Vd = SubBase(Vd); - Vn = SubBase(Vn); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1D << 23) | ((Vd & 0x1) << 22) | ((Vn & 0x1E) << 15) \ - | ((Vd & 0x1E) << 11) | (0xA << 8) | ((Vn & 0x1) << 7) | ((Vm & 0x1) << 5) \ - | (Vm >> 1)); - } - else - { - Write32(condition | (0x1D << 23) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16) \ - | ((Vd & 0xF) << 12) | (0xB << 8) | ((Vn & 0x10) << 3) | ((Vm & 0x10) << 2) \ - | (Vm & 0xF)); - } -} -void ARMXEmitter::VSQRT(ARMReg Vd, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd < Q0, "Pased invalid dest register to VSQRT"); - _assert_msg_(DYNA_REC, Vm < Q0, "Passed invalid Vm to VSQRT"); - bool single_reg = Vd < D0; - - Vd = SubBase(Vd); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1D << 23) | ((Vd & 0x1) << 22) | (0x31 << 16) \ - | ((Vd & 0x1E) << 11) | (0x2B << 6) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - Write32(condition | (0x1D << 23) | ((Vd & 0x10) << 18) | (0x31 << 16) \ - | ((Vd & 0xF) << 12) | (0x2F << 6) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } -} - // VFP and ASIMD -void ARMXEmitter::VADD(ARMReg Vd, ARMReg Vn, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd >= S0, "Passed invalid dest register to VADD"); - _assert_msg_(DYNA_REC, Vn >= S0, "Passed invalid Vn to VADD"); - _assert_msg_(DYNA_REC, Vm >= S0, "Passed invalid Vm to VADD"); - bool single_reg = Vd < D0; - bool double_reg = Vd < Q0; - - Vd = SubBase(Vd); - Vn = SubBase(Vn); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x1) << 22) | (0x3 << 20) \ - | ((Vn & 0x1E) << 15) | ((Vd & 0x1E) << 11) | (0x5 << 9) \ - | ((Vn & 0x1) << 7) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - if (double_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x10) << 18) | (0x3 << 20) \ - | ((Vn & 0xF) << 16) | ((Vd & 0xF) << 12) | (0xB << 8) \ - | ((Vn & 0x10) << 3) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } - else - { - _assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use VADD with Quad Reg without support!"); - Write32((0xF2 << 24) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16) \ - | ((Vd & 0xF) << 12) | (0xD << 8) | ((Vn & 0x10) << 3) \ - | (1 << 6) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } - } -} -void ARMXEmitter::VSUB(ARMReg Vd, ARMReg Vn, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd >= S0, "Passed invalid dest register to VSUB"); - _assert_msg_(DYNA_REC, Vn >= S0, "Passed invalid Vn to VSUB"); - _assert_msg_(DYNA_REC, Vm >= S0, "Passed invalid Vm to VSUB"); - bool single_reg = Vd < D0; - bool double_reg = Vd < Q0; - - Vd = SubBase(Vd); - Vn = SubBase(Vn); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x1) << 22) | (0x3 << 20) \ - | ((Vn & 0x1E) << 15) | ((Vd & 0x1E) << 11) | (0x5 << 9) \ - | ((Vn & 0x1) << 7) | (1 << 6) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - if (double_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x10) << 18) | (0x3 << 20) \ - | ((Vn & 0xF) << 16) | ((Vd & 0xF) << 12) | (0xB << 8) \ - | ((Vn & 0x10) << 3) | (1 << 6) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } - else - { - _assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use VADD with Quad Reg without support!"); - Write32((0xF2 << 24) | (1 << 21) | ((Vd & 0x10) << 18) | ((Vn & 0xF) << 16) \ - | ((Vd & 0xF) << 12) | (0xD << 8) | ((Vn & 0x10) << 3) \ - | (1 << 6) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } - } -} -// VFP and ASIMD -void ARMXEmitter::VMUL(ARMReg Vd, ARMReg Vn, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd >= S0, "Passed invalid dest register to VADD"); - _assert_msg_(DYNA_REC, Vn >= S0, "Passed invalid Vn to VADD"); - _assert_msg_(DYNA_REC, Vm >= S0, "Passed invalid Vm to VADD"); - bool single_reg = Vd < D0; - bool double_reg = Vd < Q0; - - Vd = SubBase(Vd); - Vn = SubBase(Vn); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x1) << 22) | (0x2 << 20) \ - | ((Vn & 0x1E) << 15) | ((Vd & 0x1E) << 11) | (0x5 << 9) \ - | ((Vn & 0x1) << 7) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - if (double_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x10) << 18) | (0x2 << 20) \ - | ((Vn & 0xF) << 16) | ((Vd & 0xF) << 12) | (0xB << 8) \ - | ((Vn & 0x10) << 3) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } - else - { - _assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use VMUL with Quad Reg without support!"); - } - } -} - -void ARMXEmitter::VMLA(ARMReg Vd, ARMReg Vn, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd >= S0, "Passed invalid dest register to VMLA"); - _assert_msg_(DYNA_REC, Vn >= S0, "Passed invalid Vn to VMLA"); - _assert_msg_(DYNA_REC, Vm >= S0, "Passed invalid Vm to VMLA"); - bool single_reg = Vd < D0; - bool double_reg = Vd < Q0; - - Vd = SubBase(Vd); - Vn = SubBase(Vn); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1C << 23) | ((Vd & 0x1) << 22) | (0x0 << 20) \ - | ((Vn & 0x1E) << 15) | ((Vd & 0x1E) << 11) | (0x5 << 9) \ - | ((Vn & 0x1) << 7) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - _assert_msg_(DYNA_REC, false, "VMLA: Please implement!"); - } -} - -void ARMXEmitter::VABS(ARMReg Vd, ARMReg Vm) -{ - _assert_msg_(DYNA_REC, Vd < Q0, "VABS doesn't currently support Quad reg"); - _assert_msg_(DYNA_REC, Vd >= S0, "VABS doesn't support ARM Regs"); - bool single_reg = Vd < D0; - bool double_reg = Vd < Q0; - - Vd = SubBase(Vd); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0xEB << 20) | ((Vd & 0x1) << 22) | ((Vd & 0x1E) << 11) \ - | (0xAC << 4) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - if (double_reg) - { - Write32(condition | (0xEB << 20) | ((Vd & 0x10) << 18) | ((Vd & 0xF) << 12) \ - | (0xBC << 4) | ((Vm & 0x10) << 1) | (Vm & 0xF)); - } - else - { - _assert_msg_(DYNA_REC, cpu_info.bNEON, "Trying to use VADD with Quad Reg without support!"); - // XXX: TODO - } - } -} - -void ARMXEmitter::VNEG(ARMReg Vd, ARMReg Vm) -{ - bool single_reg = Vd < D0; - - Vd = SubBase(Vd); - Vm = SubBase(Vm); - - if (single_reg) - { - Write32(condition | (0x1D << 23) | ((Vd & 0x1) << 22) | (0x31 << 16) \ - | ((Vd & 0x1E) << 11) | (0x29 << 6) | ((Vm & 0x1) << 5) | (Vm >> 1)); - } - else - { - Write32(condition | (0x1D << 23) | ((Vd & 0x10) << 18) | (0x31 << 16) \ - | ((Vd & 0xF) << 12) | (0x2D << 6) | ((Vm & 0x10) << 2) | (Vm & 0xF)); - } -} - void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src, bool high) { _assert_msg_(DYNA_REC, Src < S0, "This VMOV doesn't support SRC other than ARM Reg"); diff --git a/Source/Core/Common/Src/ArmEmitter.h b/Source/Core/Common/Src/ArmEmitter.h index 0749d42c96..1117ce5ac9 100644 --- a/Source/Core/Common/Src/ArmEmitter.h +++ b/Source/Core/Common/Src/ArmEmitter.h @@ -357,8 +357,12 @@ private: void WriteShiftedDataOp(u32 op, bool SetFlags, ARMReg dest, ARMReg src, ARMReg op2); void WriteShiftedDataOp(u32 op, bool SetFlags, ARMReg dest, ARMReg src, Operand2 op2); void WriteSignedMultiply(u32 Op, u32 Op2, u32 Op3, ARMReg dest, ARMReg r1, ARMReg r2); - - + + u32 EncodeVd(ARMReg Vd); + u32 EncodeVn(ARMReg Vn); + u32 EncodeVm(ARMReg Vm); + void WriteVFPDataOp(u32 Op, ARMReg Vd, ARMReg Vn, ARMReg Vm); + void Write4OpMultiply(u32 op, ARMReg destLo, ARMReg destHi, ARMReg rn, ARMReg rm); // New Ops @@ -528,9 +532,11 @@ public: // VFP Only void VLDR(ARMReg Dest, ARMReg Base, s16 offset); void VSTR(ARMReg Src, ARMReg Base, s16 offset); - void VCMP(ARMReg Vd, ARMReg Vm, bool E); + void VCMP(ARMReg Vd, ARMReg Vm); + void VCMPE(ARMReg Vd, ARMReg Vm); // Compares against zero - void VCMP(ARMReg Vd, bool E); + void VCMP(ARMReg Vd); + void VCMPE(ARMReg Vd); void VDIV(ARMReg Vd, ARMReg Vn, ARMReg Vm); void VSQRT(ARMReg Vd, ARMReg Vm); @@ -541,6 +547,7 @@ public: void VNEG(ARMReg Vd, ARMReg Vm); void VMUL(ARMReg Vd, ARMReg Vn, ARMReg Vm); void VMLA(ARMReg Vd, ARMReg Vn, ARMReg Vm); + void VMLS(ARMReg Vd, ARMReg Vn, ARMReg Vm); void VMOV(ARMReg Dest, ARMReg Src, bool high); void VMOV(ARMReg Dest, ARMReg Src); void VCVT(ARMReg Dest, ARMReg Src, int flags); diff --git a/Source/Core/Common/Src/StringUtil.cpp b/Source/Core/Common/Src/StringUtil.cpp index c38184776b..a86b4f2b0a 100644 --- a/Source/Core/Common/Src/StringUtil.cpp +++ b/Source/Core/Common/Src/StringUtil.cpp @@ -395,7 +395,7 @@ std::string UTF16ToUTF8(const std::wstring& input) std::string output; output.resize(size); - if (size != WideCharToMultiByte(CP_UTF8, 0, input.data(), input.size(), &output[0], output.size(), nullptr, nullptr)) + if (size == 0 || size != WideCharToMultiByte(CP_UTF8, 0, input.data(), input.size(), &output[0], output.size(), nullptr, nullptr)) output.clear(); return output; @@ -408,7 +408,7 @@ std::wstring CPToUTF16(u32 code_page, const std::string& input) std::wstring output; output.resize(size); - if (size != MultiByteToWideChar(code_page, 0, input.data(), input.size(), &output[0], output.size())) + if (size == 0 || size != MultiByteToWideChar(code_page, 0, input.data(), input.size(), &output[0], output.size())) output.clear(); return output; diff --git a/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.cpp b/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.cpp index a441ba2d64..1bc5e1fc14 100644 --- a/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.cpp +++ b/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.cpp @@ -27,6 +27,8 @@ namespace OGL static const u32 UBO_LENGTH = 32*1024*1024; +GLintptr ProgramShaderCache::s_vs_data_size; +GLintptr ProgramShaderCache::s_ps_data_size; GLintptr ProgramShaderCache::s_vs_data_offset; u8 *ProgramShaderCache::s_ubo_buffer; u32 ProgramShaderCache::s_ubo_buffer_size; @@ -169,8 +171,8 @@ void ProgramShaderCache::UploadConstants() if(s_ubo_dirty) { s_buffer->Alloc(s_ubo_buffer_size); size_t offset = s_buffer->Upload(s_ubo_buffer, s_ubo_buffer_size); - glBindBufferRange(GL_UNIFORM_BUFFER, 1, s_buffer->getBuffer(), offset, s_vs_data_offset); - glBindBufferRange(GL_UNIFORM_BUFFER, 2, s_buffer->getBuffer(), offset + s_vs_data_offset, s_ubo_buffer_size - s_vs_data_offset); + glBindBufferRange(GL_UNIFORM_BUFFER, 1, s_buffer->getBuffer(), offset, s_ps_data_size); + glBindBufferRange(GL_UNIFORM_BUFFER, 2, s_buffer->getBuffer(), offset + s_vs_data_offset, s_vs_data_size); s_ubo_dirty = false; } } @@ -388,10 +390,10 @@ void ProgramShaderCache::Init(void) GLint Align; glGetIntegerv(GL_UNIFORM_BUFFER_OFFSET_ALIGNMENT, &Align); - GLintptr const ps_data_size = ROUND_UP(C_PENVCONST_END * sizeof(float) * 4, Align); - GLintptr const vs_data_size = ROUND_UP(C_VENVCONST_END * sizeof(float) * 4, Align); - s_vs_data_offset = ps_data_size; - s_ubo_buffer_size = ps_data_size + vs_data_size; + s_ps_data_size = C_PENVCONST_END * sizeof(float) * 4; + s_vs_data_size = C_VENVCONST_END * sizeof(float) * 4; + s_vs_data_offset = ROUND_UP(s_ps_data_size, Align); + s_ubo_buffer_size = ROUND_UP(s_ps_data_size, Align) + ROUND_UP(s_vs_data_size, Align); // We multiply by *4*4 because we need to get down to basic machine units. // So multiply by four to get how many floats we have from vec4s diff --git a/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.h b/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.h index 8903e800ba..c4b03c2973 100644 --- a/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.h +++ b/Source/Plugins/Plugin_VideoOGL/Src/ProgramShaderCache.h @@ -125,6 +125,8 @@ private: static PCacheEntry* last_entry; static SHADERUID last_uid; + static GLintptr s_vs_data_size; + static GLintptr s_ps_data_size; static GLintptr s_vs_data_offset; static u8 *s_ubo_buffer; static u32 s_ubo_buffer_size; diff --git a/Source/Plugins/Plugin_VideoOGL/Src/Render.cpp b/Source/Plugins/Plugin_VideoOGL/Src/Render.cpp index 11cb1d4a3b..33544d0c5e 100644 --- a/Source/Plugins/Plugin_VideoOGL/Src/Render.cpp +++ b/Source/Plugins/Plugin_VideoOGL/Src/Render.cpp @@ -65,6 +65,7 @@ #include "ConfigManager.h" #include "VertexManager.h" #include "SamplerCache.h" +#include "StreamBuffer.h" #include "main.h" // Local #ifdef _WIN32 @@ -132,47 +133,62 @@ static std::vector s_efbCache[2][EFB_CACHE_WIDTH * EFB_CACHE_HEIGHT]; // 2 int GetNumMSAASamples(int MSAAMode) { + int samples, maxSamples; switch (MSAAMode) { case MULTISAMPLE_OFF: - return 1; + samples = 1; + break; case MULTISAMPLE_2X: - return 2; + samples = 2; + break; case MULTISAMPLE_4X: case MULTISAMPLE_CSAA_8X: case MULTISAMPLE_CSAA_16X: - return 4; + samples = 4; + break; case MULTISAMPLE_8X: case MULTISAMPLE_CSAA_8XQ: case MULTISAMPLE_CSAA_16XQ: - return 8; + samples = 8; + break; default: - return 1; + samples = 1; } + glGetIntegerv(GL_MAX_SAMPLES, &maxSamples); + + if(samples <= maxSamples) return samples; + + ERROR_LOG(VIDEO, "MSAA Bug: %d samples selected, but only %d supported by gpu.", samples, maxSamples); + return maxSamples; } int GetNumMSAACoverageSamples(int MSAAMode) { - if (!s_bHaveCoverageMSAA) - return 0; - + int samples; switch (g_ActiveConfig.iMultisampleMode) { case MULTISAMPLE_CSAA_8X: case MULTISAMPLE_CSAA_8XQ: - return 8; + samples = 8; + break; case MULTISAMPLE_CSAA_16X: case MULTISAMPLE_CSAA_16XQ: - return 16; + samples = 16; + break; default: - return 0; + samples = 0; } + if(s_bHaveCoverageMSAA || samples == 0) return samples; + + ERROR_LOG(VIDEO, "MSAA Bug: CSAA selected, but not supported by gpu."); + return 0; } // Init functions @@ -244,9 +260,11 @@ Renderer::Renderer() bSuccess = false; } - if (!GLEW_ARB_sampler_objects) + if (!GLEW_ARB_sampler_objects && bSuccess) { - ERROR_LOG(VIDEO, "GPU: OGL ERROR: Need GL_ARB_sampler_objects."); + ERROR_LOG(VIDEO, "GPU: OGL ERROR: Need GL_ARB_sampler_objects." + "GPU: Does your video card support OpenGL 3.2?" + "Please report this issue, then there will be a workaround"); bSuccess = false; } @@ -266,6 +284,13 @@ Renderer::Renderer() g_Config.backend_info.bSupportsGLSLUBO = false; ERROR_LOG(VIDEO, "buggy driver detected. Disable UBO"); } + +#ifndef _WIN32 + if(g_Config.backend_info.bSupportsGLPinnedMemory && !strcmp(gl_vendor, "Advanced Micro Devices, Inc.")) { + g_Config.backend_info.bSupportsGLPinnedMemory = false; + ERROR_LOG(VIDEO, "some fglrx versions have broken pinned memory support, so it's disabled for fglrx"); + } +#endif UpdateActiveConfig(); OSD::AddMessage(StringFromFormat("Missing Extensions: %s%s%s%s%s%s", @@ -276,14 +301,14 @@ Renderer::Renderer() g_ActiveConfig.backend_info.bSupportsGLBaseVertex ? "" : "BaseVertex ", g_ActiveConfig.backend_info.bSupportsGLSync ? "" : "Sync " ).c_str(), 5000); + + if (!bSuccess) + return; // TODO: fail s_LastMultisampleMode = g_ActiveConfig.iMultisampleMode; s_MSAASamples = GetNumMSAASamples(s_LastMultisampleMode); s_MSAACoverageSamples = GetNumMSAACoverageSamples(s_LastMultisampleMode); - if (!bSuccess) - return; // TODO: fail - // Decide frambuffer size s_backbuffer_width = (int)GLInterface->GetBackBufferWidth(); s_backbuffer_height = (int)GLInterface->GetBackBufferHeight(); diff --git a/Source/Plugins/Plugin_VideoOGL/Src/TextureCache.cpp b/Source/Plugins/Plugin_VideoOGL/Src/TextureCache.cpp index 1a1fee21a0..b0bc682f29 100644 --- a/Source/Plugins/Plugin_VideoOGL/Src/TextureCache.cpp +++ b/Source/Plugins/Plugin_VideoOGL/Src/TextureCache.cpp @@ -491,7 +491,9 @@ void TextureCache::DisableStage(unsigned int stage) void TextureCache::SetStage () { - glActiveTexture(GL_TEXTURE0 + s_ActiveTexture); + // -1 is the initial value as we don't know which testure should be bound + if(s_ActiveTexture != (u32)-1) + glActiveTexture(GL_TEXTURE0 + s_ActiveTexture); } void TextureCache::SetNextStage ( unsigned int stage ) diff --git a/Source/Plugins/Plugin_VideoSoftware/Src/SWRenderer.cpp b/Source/Plugins/Plugin_VideoSoftware/Src/SWRenderer.cpp index 91d35af849..f57d0b334b 100644 --- a/Source/Plugins/Plugin_VideoSoftware/Src/SWRenderer.cpp +++ b/Source/Plugins/Plugin_VideoSoftware/Src/SWRenderer.cpp @@ -20,6 +20,7 @@ #include "../../Plugin_VideoOGL/Src/GLUtil.h" #include "../../Plugin_VideoOGL/Src/RasterFont.h" +#include "../../Plugin_VideoOGL/Src/ProgramShaderCache.h" #include "SWRenderer.h" #include "SWStatistics.h" @@ -30,6 +31,7 @@ static GLint uni_tex = -1; static GLuint program; // Rasterfont isn't compatible with GLES +// degasus: I think it does, but I can't test it #ifndef USE_GLES OGL::RasterFont* s_pfont = NULL; #endif @@ -45,6 +47,7 @@ void SWRenderer::Shutdown() #ifndef USE_GLES delete s_pfont; s_pfont = 0; + OGL::ProgramShaderCache::Shutdown(); #endif } @@ -87,6 +90,8 @@ void SWRenderer::Prepare() CreateShaders(); // TODO: Enable for GLES once RasterFont supports GLES #ifndef USE_GLES + // ogl rasterfont depends on ogl programshadercache + OGL::ProgramShaderCache::Init(); s_pfont = new OGL::RasterFont(); glEnable(GL_TEXTURE_2D); #endif @@ -103,6 +108,9 @@ void SWRenderer::RenderText(const char* pstr, int left, int top, u32 color) left * 2.0f / (float)nBackbufferWidth - 1, 1 - top * 2.0f / (float)nBackbufferHeight, 0, nBackbufferWidth, nBackbufferHeight, color); + + glBindVertexArray(0); + glBindBuffer(GL_ARRAY_BUFFER, 0); #endif } diff --git a/docs/DSP/DSP_UC_ROM.txt b/docs/DSP/DSP_UC_ROM.txt deleted file mode 100644 index 1f9a19ced4..0000000000 --- a/docs/DSP/DSP_UC_ROM.txt +++ /dev/null @@ -1,2123 +0,0 @@ -// The DSP ROM -8000 0092 00ff lri $CR, #0x00ff -8002 1206 sbclr #0x06 -8003 1202 sbclr #0x02 -8004 1203 sbclr #0x03 -8005 1204 sbclr #0x04 -8006 1205 sbclr #0x05 -8007 8e00 set16 -8008 8c00 clr15 -8009 8b00 m0 -800a 16fc 8071 si @DMBH, #0x8071 -800c 16fd feed si @DMBL, #0xfeed // sendmail 0x8071feed (INIT) - -void 800e_MainLoop() -{ -800e 8100 clr $ACC0 -800f 8900 clr $ACC1 -8010 02bf 8078 call 0x8078 // wait till there is mail for DSP from CPU -8012 009f 80f3 lri $AC1.M, #0x80f3 -8014 8200 cmp // $AC0.M = @CMBH -8015 0295 801f jz 0x801f -8017 27ff lrs $AC1.M, @CMBL -8018 16fc feee si @DMBH, #0xfeee -801a 2efd srs @DMBL, $AC0.M // sendmail 0xfeee???? (????=@CMBH - !0x80f3) -801b 02bf 807e call 0x807e // wait for mail-to-be-received-by-CPU -801d 029f 800e jmp 0x800e -} - -// if mail was equal to 0x80f3a001 ... -// m_CurrentUCode.m_RAMAddress -// $IX0-$IX1 -{ -801f 26ff lrs $AC0.M, @CMBL -8020 009f a001 lri $AC1.M, #0xa001 -8022 8200 cmp -8023 0294 802c jnz 0x802c -8025 02bf 8078 call 0x8078 -8027 27ff lrs $AC1.M, @CMBL -8028 1c9e mrr $IX0, $AC0.M -8029 1cbf mrr $IX1, $AC1.M -802a 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3a002 ... -// m_CurrentUCode.m_Length -// $IX3 -{ -802c 009f a002 lri $AC1.M, #0xa002 -802e 8200 cmp -802f 0294 8037 jnz 0x8037 -8031 02bf 8078 call 0x8078 -8033 27ff lrs $AC1.M, @CMBL -8034 1cff mrr $IX3, $AC1.M -8035 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3c002 ... -// m_CurrentUCode.m_IMEMAddress -// $IX2 -{ -8037 009f c002 lri $AC1.M, #0xc002 -8039 8200 cmp -803a 0294 8042 jnz 0x8042 -803c 02bf 8078 call 0x8078 -803e 27ff lrs $AC1.M, @CMBL -803f 1cdf mrr $IX2, $AC1.M -8040 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3b001 ... -// DMEM.m_RAMAddress -// $AX0.H-$AX0.L -{ -8042 009f b001 lri $AC1.M, #0xb001 -8044 8200 cmp -8045 0294 804e jnz 0x804e -8047 02bf 8078 call 0x8078 -8049 27ff lrs $AC1.M, @CMBL -804a 1f5e mrr $AX0.H, $AC0.M -804b 1f1f mrr $AX0.L, $AC1.M -804c 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3b002 ... -// DMEM.m_Length -// $AX1.L -{ -804e 009f b002 lri $AC1.M, #0xb002 -8050 8200 cmp -8051 0294 8059 jnz 0x8059 -8053 02bf 8078 call 0x8078 -8055 27ff lrs $AC1.M, @CMBL -8056 1f3f mrr $AX1.L, $AC1.M -8057 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3c001 ... -// DMEM.m_DMEMAddress -// $AX1.H -{ -8059 009f c001 lri $AC1.M, #0xc001 -805b 8200 cmp -805c 0294 8064 jnz 0x8064 -805e 02bf 8078 call 0x8078 -8060 27ff lrs $AC1.M, @CMBL -8061 1f7f mrr $AX1.H, $AC1.M -8062 029f 800e jmp 0x800e -} - -// else if mail was equal to 0x80f3d001 ... -// m_CurrentUCode.m_StartPC -// $AR0 -{ -8064 009f d001 lri $AC1.M, #0xd001 -8066 8200 cmp -8067 0294 8071 jnz 0x8071 -8069 02bf 8078 call 0x8078 -806b 8100 clr $ACC0 -806c 26ff lrs $AC0.M, @CMBL -806d 1c1e mrr $AR0, $AC0.M -806e 029f 80b5 jmp 80b5_BootUcode() -8070 0021 halt -} - -// else ... -{ -8071 16fc faaa si @DMBH, #0xfaaa -8073 2efd srs @DMBL, $AC0.M // sendmail 0xfaaa???? (????=@CMBL) -8074 02bf 807e call 0x807e -8076 029f 800e jmp 0x800e -} - -// wait for CMBH & 0x8000 -{ -8078 26fe lrs $AC0.M, @CMBH -8079 02c0 8000 andcf $AC0.M, #0x8000 -807b 029c 8078 jlnz 0x8078 -807d 02df ret -} - -// wait for DMBH & 0x8000 -void 807e_WaitForDSPMail -{ -807e 26fc lrs $AC0.M, @DMBH -807f 02a0 8000 andf $AC0.M, #0x8000 -8081 029c 807e jlnz 0x807e -8083 02df ret -8084 0021 halt -} - -//dump DRAM/IRAM to mainmem -{ -8085 8e00 set16 -8086 8100 clr $ACC0 -8087 1fd9 mrr $AC0.M, $AX1.L -8088 b100 tst $ACC0 -8089 0295 809d jz 0x809d -{ // DRAM - 808b 00fa ffce sr @DSMAH, $AX0.H - 808d 00f8 ffcf sr @DSMAL, $AX0.L - 808f 009e 0001 lri $AC0.M, #0x0001 - 8091 00fe ffc9 sr @DSCR, $AC0.M // DMEM->CPU - 8093 00fb ffcd sr @DSPA, $AX1.H - 8095 00f9 ffcb sr @DSBL, $AX1.L - 8097 00de ffc9 lr $AC0.M, @DSCR - 8099 02a0 0004 andf $AC0.M, #0x0004 - 809b 029c 8097 jlnz 0x8097 -} -809d 8100 clr $ACC0 -809e 1fc7 mrr $AC0.M, $IX3 -809f b100 tst $ACC0 -80a0 0295 80b4 jz 0x80b4 -{ // IRAM - 80a2 00e4 ffce sr @DSMAH, $IX0 - 80a4 00e5 ffcf sr @DSMAL, $IX1 - 80a6 009e 0003 lri $AC0.M, #0x0003 - 80a8 00fe ffc9 sr @DSCR, $AC0.M // IMEM->CPU - 80aa 00e6 ffcd sr @DSPA, $IX2 - 80ac 00e7 ffcb sr @DSBL, $IX3 - 80ae 00de ffc9 lr $AC0.M, @DSCR - 80b0 02a0 0004 andf $AC0.M, #0x0004 - 80b2 029c 80ae jlnz 0x80ae -} -80b4 02df ret -} - -//direct jump here from /ZeldaUcode (normal,sms,dma(wii) type)/AX/AXWII/ -> all except Zelda Light (Luigi/IPL) -void 80b5_BootUcode()() -{ -80b5 8e00 set16 -80b6 8100 clr $ACC0 -80b7 8900 clr $ACC1 -80b8 1ff9 mrr $AC1.M, $AX1.L -80b9 b900 tst $ACC1 -80ba 0295 80ce jz 0x80ce -{ // DRAM upload - 80bc 00fa ffce sr @DSMAH, $AX0.H - 80be 00f8 ffcf sr @DSMAL, $AX0.L - 80c0 009e 0000 lri $AC0.M, #0x0000 - 80c2 00fe ffc9 sr @DSCR, $AC0.M // CPU->DMEM - 80c4 00fb ffcd sr @DSPA, $AX1.H - 80c6 00f9 ffcb sr @DSBL, $AX1.L - 80c8 00de ffc9 lr $AC0.M, @DSCR // wait for DMA completion - 80ca 02a0 0004 andf $AC0.M, #0x0004 - 80cc 029c 80c8 jlnz 0x80c8 -} -80ce 8900 clr $ACC1 -80cf 1fe7 mrr $AC1.M, $IX3 -80d0 b900 tst $ACC1 -80d1 0295 80e5 jz 0x80e5 -{ // IRAM upload - 80d3 00e4 ffce sr @DSMAH, $IX0 - 80d5 00e5 ffcf sr @DSMAL, $IX1 - 80d7 009e 0002 lri $AC0.M, #0x0002 - 80d9 00fe ffc9 sr @DSCR, $AC0.M // CPU->IMEM (ucode upload) - 80db 00e6 ffcd sr @DSPA, $IX2 - 80dd 00e7 ffcb sr @DSBL, $IX3 - 80df 00de ffc9 lr $AC0.M, @DSCR // wait for DMA completion - 80e1 02a0 0004 andf $AC0.M, #0x0004 - 80e3 029c 80df jlnz 0x80df -} -80e5 170f jmpr $AR0 // m_CurrentUCode.m_StartPC -80e6 0021 halt -} - -// Large mixer function - called a lot by AX -// Prolly simple Stereo Mixer -{ -80e7 8150 clr'l $ACC0 : $AX0.H, @$AR0 -80e8 8949 clr'l $ACC1 : $AX1.L, @$AR1 -80e9 b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -80ea 8962 clr'l $ACC1 : $AC0.L, @$AR2 -80eb f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -80ec 191a lrri $AX0.H, @$AR0 -80ed b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -80ee 9100 asr16 $ACC0 -80ef f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -80f0 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -80f1 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -80f2 195c lrri $AC0.L, @$AR2 -80f3 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -80f4 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -80f5 917a asr16'l $ACC0 : $AC1.M, @$AR2 -80f6 195d lrri $AC1.L, @$AR2 -80f7 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -80f8 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -80f9 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -80fa 195c lrri $AC0.L, @$AR2 -80fb f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -80fc b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -80fd 917a asr16'l $ACC0 : $AC1.M, @$AR2 -80fe 195d lrri $AC1.L, @$AR2 -80ff f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8100 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8101 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8102 195c lrri $AC0.L, @$AR2 -8103 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8104 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8105 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8106 195d lrri $AC1.L, @$AR2 -8107 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8108 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8109 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -810a 195c lrri $AC0.L, @$AR2 -810b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -810c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -810d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -810e 195d lrri $AC1.L, @$AR2 -810f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8110 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8111 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8112 195c lrri $AC0.L, @$AR2 -8113 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8114 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8115 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8116 195d lrri $AC1.L, @$AR2 -8117 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8118 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8119 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -811a 195c lrri $AC0.L, @$AR2 -811b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -811c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -811d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -811e 195d lrri $AC1.L, @$AR2 -811f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8120 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8121 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8122 195c lrri $AC0.L, @$AR2 -8123 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8124 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8125 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8126 195d lrri $AC1.L, @$AR2 -8127 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8128 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8129 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -812a 195c lrri $AC0.L, @$AR2 -812b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -812c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -812d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -812e 195d lrri $AC1.L, @$AR2 -812f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8130 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8131 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8132 195c lrri $AC0.L, @$AR2 -8133 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8134 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8135 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8136 195d lrri $AC1.L, @$AR2 -8137 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8138 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8139 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -813a 195c lrri $AC0.L, @$AR2 -813b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -813c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -813d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -813e 195d lrri $AC1.L, @$AR2 -813f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8140 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8141 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8142 195c lrri $AC0.L, @$AR2 -8143 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8144 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8145 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8146 195d lrri $AC1.L, @$AR2 -8147 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8148 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8149 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -814a 195c lrri $AC0.L, @$AR2 -814b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -814c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -814d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -814e 195d lrri $AC1.L, @$AR2 -814f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8150 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8151 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8152 195c lrri $AC0.L, @$AR2 -8153 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8154 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8155 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8156 195d lrri $AC1.L, @$AR2 -8157 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8158 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8159 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -815a 195c lrri $AC0.L, @$AR2 -815b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -815c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -815d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -815e 195d lrri $AC1.L, @$AR2 -815f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8160 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8161 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8162 195c lrri $AC0.L, @$AR2 -8163 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8164 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8165 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8166 195d lrri $AC1.L, @$AR2 -8167 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8168 1b7c srri @$AR3, $AC0.L -8169 6e00 movp $ACC0 -816a b512 mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX0.L, $AC0.M -816b 9909 asr16'ir $ACC1 : $AR1 -816c 1b7f srri @$AR3, $AC1.M -816d 812b clr's $ACC0 : @$AR3, $AC1.L -816e 1c04 mrr $AR0, $IX0 -816f 1c45 mrr $AR2, $IX1 -8170 1c62 mrr $AR3, $AR2 -8171 8150 clr'l $ACC0 : $AX0.H, @$AR0 -8172 8949 clr'l $ACC1 : $AX1.L, @$AR1 -8173 b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -8174 8962 clr'l $ACC1 : $AC0.L, @$AR2 -8175 f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -8176 191a lrri $AX0.H, @$AR0 -8177 b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -8178 9100 asr16 $ACC0 -8179 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -817a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -817b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -817c 195c lrri $AC0.L, @$AR2 -817d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -817e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -817f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8180 195d lrri $AC1.L, @$AR2 -8181 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8182 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8183 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8184 195c lrri $AC0.L, @$AR2 -8185 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8186 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8187 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8188 195d lrri $AC1.L, @$AR2 -8189 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -818a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -818b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -818c 195c lrri $AC0.L, @$AR2 -818d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -818e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -818f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8190 195d lrri $AC1.L, @$AR2 -8191 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8192 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8193 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8194 195c lrri $AC0.L, @$AR2 -8195 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8196 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8197 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8198 195d lrri $AC1.L, @$AR2 -8199 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -819a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -819b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -819c 195c lrri $AC0.L, @$AR2 -819d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -819e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -819f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81a0 195d lrri $AC1.L, @$AR2 -81a1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81a2 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81a3 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81a4 195c lrri $AC0.L, @$AR2 -81a5 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81a6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81a7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81a8 195d lrri $AC1.L, @$AR2 -81a9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81aa b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81ab 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81ac 195c lrri $AC0.L, @$AR2 -81ad f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81ae b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81af 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81b0 195d lrri $AC1.L, @$AR2 -81b1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81b2 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81b3 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81b4 195c lrri $AC0.L, @$AR2 -81b5 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81b6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81b7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81b8 195d lrri $AC1.L, @$AR2 -81b9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81ba b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81bb 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81bc 195c lrri $AC0.L, @$AR2 -81bd f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81be b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81bf 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81c0 195d lrri $AC1.L, @$AR2 -81c1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81c2 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81c3 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81c4 195c lrri $AC0.L, @$AR2 -81c5 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81c6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81c7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81c8 195d lrri $AC1.L, @$AR2 -81c9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81ca b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81cb 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81cc 195c lrri $AC0.L, @$AR2 -81cd f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81ce b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81cf 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81d0 195d lrri $AC1.L, @$AR2 -81d1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81d2 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81d3 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81d4 195c lrri $AC0.L, @$AR2 -81d5 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81d6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81d7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81d8 195d lrri $AC1.L, @$AR2 -81d9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81da b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81db 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81dc 195c lrri $AC0.L, @$AR2 -81dd f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81de b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81df 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81e0 195d lrri $AC1.L, @$AR2 -81e1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81e2 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81e3 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81e4 195c lrri $AC0.L, @$AR2 -81e5 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81e6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81e7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81e8 195d lrri $AC1.L, @$AR2 -81e9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81ea b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -81eb 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -81ec 195c lrri $AC0.L, @$AR2 -81ed f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -81ee b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -81ef 917a asr16'l $ACC0 : $AC1.M, @$AR2 -81f0 195d lrri $AC1.L, @$AR2 -81f1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -81f2 1b7c srri @$AR3, $AC0.L -81f3 6e00 movp $ACC0 -81f4 b51e mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX1.H, $AC0.M -81f5 9909 asr16'ir $ACC1 : $AR1 -81f6 1b7f srri @$AR3, $AC1.M -81f7 812b clr's $ACC0 : @$AR3, $AC1.L -81f8 02df ret -} - -// Second big mixer function? -{ -81f9 8150 clr'l $ACC0 : $AX0.H, @$AR0 -81fa 8949 clr'l $ACC1 : $AX1.L, @$AR1 -81fb b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -81fc 8962 clr'l $ACC1 : $AC0.L, @$AR2 -81fd f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -81fe 191a lrri $AX0.H, @$AR0 -81ff b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -8200 9100 asr16 $ACC0 -8201 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8202 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8203 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8204 195c lrri $AC0.L, @$AR2 -8205 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8206 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8207 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8208 195d lrri $AC1.L, @$AR2 -8209 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -820a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -820b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -820c 195c lrri $AC0.L, @$AR2 -820d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -820e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -820f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8210 195d lrri $AC1.L, @$AR2 -8211 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8212 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8213 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8214 195c lrri $AC0.L, @$AR2 -8215 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8216 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8217 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8218 195d lrri $AC1.L, @$AR2 -8219 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -821a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -821b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -821c 195c lrri $AC0.L, @$AR2 -821d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -821e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -821f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8220 195d lrri $AC1.L, @$AR2 -8221 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8222 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8223 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8224 195c lrri $AC0.L, @$AR2 -8225 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8226 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8227 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8228 195d lrri $AC1.L, @$AR2 -8229 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -822a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -822b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -822c 195c lrri $AC0.L, @$AR2 -822d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -822e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -822f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8230 195d lrri $AC1.L, @$AR2 -8231 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8232 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8233 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8234 195c lrri $AC0.L, @$AR2 -8235 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8236 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8237 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8238 195d lrri $AC1.L, @$AR2 -8239 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -823a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -823b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -823c 195c lrri $AC0.L, @$AR2 -823d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -823e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -823f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8240 195d lrri $AC1.L, @$AR2 -8241 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8242 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8243 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8244 195c lrri $AC0.L, @$AR2 -8245 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8246 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8247 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8248 195d lrri $AC1.L, @$AR2 -8249 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -824a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -824b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -824c 195c lrri $AC0.L, @$AR2 -824d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -824e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -824f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8250 195d lrri $AC1.L, @$AR2 -8251 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8252 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8253 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8254 195c lrri $AC0.L, @$AR2 -8255 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8256 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8257 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8258 195d lrri $AC1.L, @$AR2 -8259 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -825a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -825b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -825c 195c lrri $AC0.L, @$AR2 -825d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -825e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -825f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8260 195d lrri $AC1.L, @$AR2 -8261 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8262 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8263 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8264 195c lrri $AC0.L, @$AR2 -8265 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8266 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8267 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8268 195d lrri $AC1.L, @$AR2 -8269 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -826a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -826b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -826c 195c lrri $AC0.L, @$AR2 -826d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -826e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -826f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8270 195d lrri $AC1.L, @$AR2 -8271 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8272 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8273 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8274 195c lrri $AC0.L, @$AR2 -8275 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8276 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8277 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8278 195d lrri $AC1.L, @$AR2 -8279 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -827a 1b7c srri @$AR3, $AC0.L -827b 6e00 movp $ACC0 -827c b512 mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX0.L, $AC0.M -827d 9909 asr16'ir $ACC1 : $AR1 -827e 1b7f srri @$AR3, $AC1.M -827f 812b clr's $ACC0 : @$AR3, $AC1.L -8280 1f63 mrr $AX1.H, $AR3 -8281 02df ret -} - -// 3rd big mixer function -{ -8282 1ce3 mrr $IX3, $AR3 -8283 8100 clr $ACC0 -8284 8971 clr'l $ACC1 : $AC0.M, @$AR1 -8285 18bf lrrd $AC1.M, @$AR1 -8286 1b7e srri @$AR3, $AC0.M -8287 4c00 add $ACC0, $ACC1 -8288 1b7e srri @$AR3, $AC0.M -8289 4c00 add $ACC0, $ACC1 -828a 1b7e srri @$AR3, $AC0.M -828b 4c00 add $ACC0, $ACC1 -828c 1b7e srri @$AR3, $AC0.M -828d 4c00 add $ACC0, $ACC1 -828e 1b7e srri @$AR3, $AC0.M -828f 4c00 add $ACC0, $ACC1 -8290 1b7e srri @$AR3, $AC0.M -8291 4c00 add $ACC0, $ACC1 -8292 1b7e srri @$AR3, $AC0.M -8293 4c00 add $ACC0, $ACC1 -8294 1b7e srri @$AR3, $AC0.M -8295 4c00 add $ACC0, $ACC1 -8296 1b7e srri @$AR3, $AC0.M -8297 4c00 add $ACC0, $ACC1 -8298 1b7e srri @$AR3, $AC0.M -8299 4c00 add $ACC0, $ACC1 -829a 1b7e srri @$AR3, $AC0.M -829b 4c00 add $ACC0, $ACC1 -829c 1b7e srri @$AR3, $AC0.M -829d 4c00 add $ACC0, $ACC1 -829e 1b7e srri @$AR3, $AC0.M -829f 4c00 add $ACC0, $ACC1 -82a0 1b7e srri @$AR3, $AC0.M -82a1 4c00 add $ACC0, $ACC1 -82a2 1b7e srri @$AR3, $AC0.M -82a3 4c00 add $ACC0, $ACC1 -82a4 1b7e srri @$AR3, $AC0.M -82a5 4c00 add $ACC0, $ACC1 -82a6 1b7e srri @$AR3, $AC0.M -82a7 4c00 add $ACC0, $ACC1 -82a8 1b7e srri @$AR3, $AC0.M -82a9 4c00 add $ACC0, $ACC1 -82aa 1b7e srri @$AR3, $AC0.M -82ab 4c00 add $ACC0, $ACC1 -82ac 1b7e srri @$AR3, $AC0.M -82ad 4c00 add $ACC0, $ACC1 -82ae 1b7e srri @$AR3, $AC0.M -82af 4c00 add $ACC0, $ACC1 -82b0 1b7e srri @$AR3, $AC0.M -82b1 4c00 add $ACC0, $ACC1 -82b2 1b7e srri @$AR3, $AC0.M -82b3 4c00 add $ACC0, $ACC1 -82b4 1b7e srri @$AR3, $AC0.M -82b5 4c00 add $ACC0, $ACC1 -82b6 1b7e srri @$AR3, $AC0.M -82b7 4c00 add $ACC0, $ACC1 -82b8 1b7e srri @$AR3, $AC0.M -82b9 4c00 add $ACC0, $ACC1 -82ba 1b7e srri @$AR3, $AC0.M -82bb 4c00 add $ACC0, $ACC1 -82bc 1b7e srri @$AR3, $AC0.M -82bd 4c00 add $ACC0, $ACC1 -82be 1b7e srri @$AR3, $AC0.M -82bf 4c00 add $ACC0, $ACC1 -82c0 1b7e srri @$AR3, $AC0.M -82c1 4c00 add $ACC0, $ACC1 -82c2 1b7e srri @$AR3, $AC0.M -82c3 4c00 add $ACC0, $ACC1 -82c4 1b7e srri @$AR3, $AC0.M -82c5 4c00 add $ACC0, $ACC1 -82c6 8931 clr's $ACC1 : @$AR1, $AC0.M -82c7 8109 clr'ir $ACC0 : $AR1 -82c8 193e lrri $AC0.M, @$AR1 -82c9 18bf lrrd $AC1.M, @$AR1 -82ca 1b7e srri @$AR3, $AC0.M -82cb 4c00 add $ACC0, $ACC1 -82cc 1b7e srri @$AR3, $AC0.M -82cd 4c00 add $ACC0, $ACC1 -82ce 1b7e srri @$AR3, $AC0.M -82cf 4c00 add $ACC0, $ACC1 -82d0 1b7e srri @$AR3, $AC0.M -82d1 4c00 add $ACC0, $ACC1 -82d2 1b7e srri @$AR3, $AC0.M -82d3 4c00 add $ACC0, $ACC1 -82d4 1b7e srri @$AR3, $AC0.M -82d5 4c00 add $ACC0, $ACC1 -82d6 1b7e srri @$AR3, $AC0.M -82d7 4c00 add $ACC0, $ACC1 -82d8 1b7e srri @$AR3, $AC0.M -82d9 4c00 add $ACC0, $ACC1 -82da 1b7e srri @$AR3, $AC0.M -82db 4c00 add $ACC0, $ACC1 -82dc 1b7e srri @$AR3, $AC0.M -82dd 4c00 add $ACC0, $ACC1 -82de 1b7e srri @$AR3, $AC0.M -82df 4c00 add $ACC0, $ACC1 -82e0 1b7e srri @$AR3, $AC0.M -82e1 4c00 add $ACC0, $ACC1 -82e2 1b7e srri @$AR3, $AC0.M -82e3 4c00 add $ACC0, $ACC1 -82e4 1b7e srri @$AR3, $AC0.M -82e5 4c00 add $ACC0, $ACC1 -82e6 1b7e srri @$AR3, $AC0.M -82e7 4c00 add $ACC0, $ACC1 -82e8 1b7e srri @$AR3, $AC0.M -82e9 4c00 add $ACC0, $ACC1 -82ea 1b7e srri @$AR3, $AC0.M -82eb 4c00 add $ACC0, $ACC1 -82ec 1b7e srri @$AR3, $AC0.M -82ed 4c00 add $ACC0, $ACC1 -82ee 1b7e srri @$AR3, $AC0.M -82ef 4c00 add $ACC0, $ACC1 -82f0 1b7e srri @$AR3, $AC0.M -82f1 4c00 add $ACC0, $ACC1 -82f2 1b7e srri @$AR3, $AC0.M -82f3 4c00 add $ACC0, $ACC1 -82f4 1b7e srri @$AR3, $AC0.M -82f5 4c00 add $ACC0, $ACC1 -82f6 1b7e srri @$AR3, $AC0.M -82f7 4c00 add $ACC0, $ACC1 -82f8 1b7e srri @$AR3, $AC0.M -82f9 4c00 add $ACC0, $ACC1 -82fa 1b7e srri @$AR3, $AC0.M -82fb 4c00 add $ACC0, $ACC1 -82fc 1b7e srri @$AR3, $AC0.M -82fd 4c00 add $ACC0, $ACC1 -82fe 1b7e srri @$AR3, $AC0.M -82ff 4c00 add $ACC0, $ACC1 -8300 1b7e srri @$AR3, $AC0.M -8301 4c00 add $ACC0, $ACC1 -8302 1b7e srri @$AR3, $AC0.M -8303 4c00 add $ACC0, $ACC1 -8304 1b7e srri @$AR3, $AC0.M -8305 4c00 add $ACC0, $ACC1 -8306 1b7e srri @$AR3, $AC0.M -8307 4c00 add $ACC0, $ACC1 -8308 1b7e srri @$AR3, $AC0.M -8309 4c00 add $ACC0, $ACC1 -830a 1b3e srri @$AR1, $AC0.M -830b 1c27 mrr $AR1, $IX3 -830c 1c62 mrr $AR3, $AR2 -830d 8150 clr'l $ACC0 : $AX0.H, @$AR0 -830e 8949 clr'l $ACC1 : $AX1.L, @$AR1 -830f b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -8310 8962 clr'l $ACC1 : $AC0.L, @$AR2 -8311 f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -8312 191a lrri $AX0.H, @$AR0 -8313 1939 lrri $AX1.L, @$AR1 -8314 b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -8315 9100 asr16 $ACC0 -8316 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8317 1939 lrri $AX1.L, @$AR1 -8318 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8319 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -831a 195c lrri $AC0.L, @$AR2 -831b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -831c 1939 lrri $AX1.L, @$AR1 -831d b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -831e 917a asr16'l $ACC0 : $AC1.M, @$AR2 -831f 195d lrri $AC1.L, @$AR2 -8320 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8321 1939 lrri $AX1.L, @$AR1 -8322 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8323 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8324 195c lrri $AC0.L, @$AR2 -8325 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8326 1939 lrri $AX1.L, @$AR1 -8327 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8328 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8329 195d lrri $AC1.L, @$AR2 -832a f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -832b 1939 lrri $AX1.L, @$AR1 -832c b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -832d 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -832e 195c lrri $AC0.L, @$AR2 -832f f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8330 1939 lrri $AX1.L, @$AR1 -8331 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8332 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8333 195d lrri $AC1.L, @$AR2 -8334 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8335 1939 lrri $AX1.L, @$AR1 -8336 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8337 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8338 195c lrri $AC0.L, @$AR2 -8339 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -833a 1939 lrri $AX1.L, @$AR1 -833b b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -833c 917a asr16'l $ACC0 : $AC1.M, @$AR2 -833d 195d lrri $AC1.L, @$AR2 -833e f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -833f 1939 lrri $AX1.L, @$AR1 -8340 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8341 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8342 195c lrri $AC0.L, @$AR2 -8343 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8344 1939 lrri $AX1.L, @$AR1 -8345 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8346 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8347 195d lrri $AC1.L, @$AR2 -8348 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8349 1939 lrri $AX1.L, @$AR1 -834a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -834b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -834c 195c lrri $AC0.L, @$AR2 -834d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -834e 1939 lrri $AX1.L, @$AR1 -834f b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8350 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8351 195d lrri $AC1.L, @$AR2 -8352 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8353 1939 lrri $AX1.L, @$AR1 -8354 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8355 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8356 195c lrri $AC0.L, @$AR2 -8357 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8358 1939 lrri $AX1.L, @$AR1 -8359 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -835a 917a asr16'l $ACC0 : $AC1.M, @$AR2 -835b 195d lrri $AC1.L, @$AR2 -835c f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -835d 1939 lrri $AX1.L, @$AR1 -835e b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -835f 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8360 195c lrri $AC0.L, @$AR2 -8361 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8362 1939 lrri $AX1.L, @$AR1 -8363 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8364 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8365 195d lrri $AC1.L, @$AR2 -8366 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8367 1939 lrri $AX1.L, @$AR1 -8368 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8369 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -836a 195c lrri $AC0.L, @$AR2 -836b f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -836c 1939 lrri $AX1.L, @$AR1 -836d b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -836e 917a asr16'l $ACC0 : $AC1.M, @$AR2 -836f 195d lrri $AC1.L, @$AR2 -8370 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8371 1939 lrri $AX1.L, @$AR1 -8372 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8373 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8374 195c lrri $AC0.L, @$AR2 -8375 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8376 1939 lrri $AX1.L, @$AR1 -8377 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8378 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8379 195d lrri $AC1.L, @$AR2 -837a f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -837b 1939 lrri $AX1.L, @$AR1 -837c b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -837d 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -837e 195c lrri $AC0.L, @$AR2 -837f f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8380 1939 lrri $AX1.L, @$AR1 -8381 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8382 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8383 195d lrri $AC1.L, @$AR2 -8384 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8385 1939 lrri $AX1.L, @$AR1 -8386 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8387 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8388 195c lrri $AC0.L, @$AR2 -8389 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -838a 1939 lrri $AX1.L, @$AR1 -838b b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -838c 917a asr16'l $ACC0 : $AC1.M, @$AR2 -838d 195d lrri $AC1.L, @$AR2 -838e f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -838f 1939 lrri $AX1.L, @$AR1 -8390 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8391 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8392 195c lrri $AC0.L, @$AR2 -8393 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8394 1939 lrri $AX1.L, @$AR1 -8395 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8396 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8397 195d lrri $AC1.L, @$AR2 -8398 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8399 1939 lrri $AX1.L, @$AR1 -839a b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -839b 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -839c 195c lrri $AC0.L, @$AR2 -839d f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -839e 1939 lrri $AX1.L, @$AR1 -839f b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83a0 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83a1 195d lrri $AC1.L, @$AR2 -83a2 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83a3 1939 lrri $AX1.L, @$AR1 -83a4 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83a5 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83a6 195c lrri $AC0.L, @$AR2 -83a7 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83a8 1939 lrri $AX1.L, @$AR1 -83a9 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83aa 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83ab 195d lrri $AC1.L, @$AR2 -83ac f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83ad 1b7c srri @$AR3, $AC0.L -83ae 6e00 movp $ACC0 -83af b512 mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX0.L, $AC0.M -83b0 9900 asr16 $ACC1 -83b1 1b7f srri @$AR3, $AC1.M -83b2 812b clr's $ACC0 : @$AR3, $AC1.L -83b3 1c04 mrr $AR0, $IX0 -83b4 1c45 mrr $AR2, $IX1 -83b5 1c62 mrr $AR3, $AR2 -83b6 8150 clr'l $ACC0 : $AX0.H, @$AR0 -83b7 8949 clr'l $ACC1 : $AX1.L, @$AR1 -83b8 b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -83b9 8962 clr'l $ACC1 : $AC0.L, @$AR2 -83ba f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -83bb 191a lrri $AX0.H, @$AR0 -83bc 1939 lrri $AX1.L, @$AR1 -83bd b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -83be 9100 asr16 $ACC0 -83bf f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83c0 1939 lrri $AX1.L, @$AR1 -83c1 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83c2 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83c3 195c lrri $AC0.L, @$AR2 -83c4 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83c5 1939 lrri $AX1.L, @$AR1 -83c6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83c7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83c8 195d lrri $AC1.L, @$AR2 -83c9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83ca 1939 lrri $AX1.L, @$AR1 -83cb b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83cc 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83cd 195c lrri $AC0.L, @$AR2 -83ce f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83cf 1939 lrri $AX1.L, @$AR1 -83d0 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83d1 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83d2 195d lrri $AC1.L, @$AR2 -83d3 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83d4 1939 lrri $AX1.L, @$AR1 -83d5 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83d6 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83d7 195c lrri $AC0.L, @$AR2 -83d8 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83d9 1939 lrri $AX1.L, @$AR1 -83da b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83db 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83dc 195d lrri $AC1.L, @$AR2 -83dd f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83de 1939 lrri $AX1.L, @$AR1 -83df b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83e0 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83e1 195c lrri $AC0.L, @$AR2 -83e2 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83e3 1939 lrri $AX1.L, @$AR1 -83e4 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83e5 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83e6 195d lrri $AC1.L, @$AR2 -83e7 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83e8 1939 lrri $AX1.L, @$AR1 -83e9 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83ea 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83eb 195c lrri $AC0.L, @$AR2 -83ec f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83ed 1939 lrri $AX1.L, @$AR1 -83ee b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83ef 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83f0 195d lrri $AC1.L, @$AR2 -83f1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83f2 1939 lrri $AX1.L, @$AR1 -83f3 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83f4 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83f5 195c lrri $AC0.L, @$AR2 -83f6 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -83f7 1939 lrri $AX1.L, @$AR1 -83f8 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -83f9 917a asr16'l $ACC0 : $AC1.M, @$AR2 -83fa 195d lrri $AC1.L, @$AR2 -83fb f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -83fc 1939 lrri $AX1.L, @$AR1 -83fd b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -83fe 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -83ff 195c lrri $AC0.L, @$AR2 -8400 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8401 1939 lrri $AX1.L, @$AR1 -8402 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8403 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8404 195d lrri $AC1.L, @$AR2 -8405 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8406 1939 lrri $AX1.L, @$AR1 -8407 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8408 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8409 195c lrri $AC0.L, @$AR2 -840a f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -840b 1939 lrri $AX1.L, @$AR1 -840c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -840d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -840e 195d lrri $AC1.L, @$AR2 -840f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8410 1939 lrri $AX1.L, @$AR1 -8411 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8412 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8413 195c lrri $AC0.L, @$AR2 -8414 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8415 1939 lrri $AX1.L, @$AR1 -8416 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8417 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8418 195d lrri $AC1.L, @$AR2 -8419 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -841a 1939 lrri $AX1.L, @$AR1 -841b b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -841c 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -841d 195c lrri $AC0.L, @$AR2 -841e f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -841f 1939 lrri $AX1.L, @$AR1 -8420 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8421 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8422 195d lrri $AC1.L, @$AR2 -8423 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8424 1939 lrri $AX1.L, @$AR1 -8425 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8426 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8427 195c lrri $AC0.L, @$AR2 -8428 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8429 1939 lrri $AX1.L, @$AR1 -842a b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -842b 917a asr16'l $ACC0 : $AC1.M, @$AR2 -842c 195d lrri $AC1.L, @$AR2 -842d f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -842e 1939 lrri $AX1.L, @$AR1 -842f b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8430 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8431 195c lrri $AC0.L, @$AR2 -8432 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8433 1939 lrri $AX1.L, @$AR1 -8434 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8435 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8436 195d lrri $AC1.L, @$AR2 -8437 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8438 1939 lrri $AX1.L, @$AR1 -8439 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -843a 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -843b 195c lrri $AC0.L, @$AR2 -843c f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -843d 1939 lrri $AX1.L, @$AR1 -843e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -843f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8440 195d lrri $AC1.L, @$AR2 -8441 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8442 1939 lrri $AX1.L, @$AR1 -8443 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8444 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8445 195c lrri $AC0.L, @$AR2 -8446 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8447 1939 lrri $AX1.L, @$AR1 -8448 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8449 917a asr16'l $ACC0 : $AC1.M, @$AR2 -844a 195d lrri $AC1.L, @$AR2 -844b f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -844c 1939 lrri $AX1.L, @$AR1 -844d b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -844e 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -844f 195c lrri $AC0.L, @$AR2 -8450 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8451 1939 lrri $AX1.L, @$AR1 -8452 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8453 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8454 195d lrri $AC1.L, @$AR2 -8455 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8456 1b7c srri @$AR3, $AC0.L -8457 6e00 movp $ACC0 -8458 b51e mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX1.H, $AC0.M -8459 9900 asr16 $ACC1 -845a 1b7f srri @$AR3, $AC1.M -845b 812b clr's $ACC0 : @$AR3, $AC1.L -845c 02df ret -} - -// Don't know what this is, looks like more mixing -{ -845d 1ce3 mrr $IX3, $AR3 -845e 8100 clr $ACC0 -845f 8971 clr'l $ACC1 : $AC0.M, @$AR1 -8460 18bf lrrd $AC1.M, @$AR1 -8461 1b7e srri @$AR3, $AC0.M -8462 4c00 add $ACC0, $ACC1 -8463 1b7e srri @$AR3, $AC0.M -8464 4c00 add $ACC0, $ACC1 -8465 1b7e srri @$AR3, $AC0.M -8466 4c00 add $ACC0, $ACC1 -8467 1b7e srri @$AR3, $AC0.M -8468 4c00 add $ACC0, $ACC1 -8469 1b7e srri @$AR3, $AC0.M -846a 4c00 add $ACC0, $ACC1 -846b 1b7e srri @$AR3, $AC0.M -846c 4c00 add $ACC0, $ACC1 -846d 1b7e srri @$AR3, $AC0.M -846e 4c00 add $ACC0, $ACC1 -846f 1b7e srri @$AR3, $AC0.M -8470 4c00 add $ACC0, $ACC1 -8471 1b7e srri @$AR3, $AC0.M -8472 4c00 add $ACC0, $ACC1 -8473 1b7e srri @$AR3, $AC0.M -8474 4c00 add $ACC0, $ACC1 -8475 1b7e srri @$AR3, $AC0.M -8476 4c00 add $ACC0, $ACC1 -8477 1b7e srri @$AR3, $AC0.M -8478 4c00 add $ACC0, $ACC1 -8479 1b7e srri @$AR3, $AC0.M -847a 4c00 add $ACC0, $ACC1 -847b 1b7e srri @$AR3, $AC0.M -847c 4c00 add $ACC0, $ACC1 -847d 1b7e srri @$AR3, $AC0.M -847e 4c00 add $ACC0, $ACC1 -847f 1b7e srri @$AR3, $AC0.M -8480 4c00 add $ACC0, $ACC1 -8481 1b7e srri @$AR3, $AC0.M -8482 4c00 add $ACC0, $ACC1 -8483 1b7e srri @$AR3, $AC0.M -8484 4c00 add $ACC0, $ACC1 -8485 1b7e srri @$AR3, $AC0.M -8486 4c00 add $ACC0, $ACC1 -8487 1b7e srri @$AR3, $AC0.M -8488 4c00 add $ACC0, $ACC1 -8489 1b7e srri @$AR3, $AC0.M -848a 4c00 add $ACC0, $ACC1 -848b 1b7e srri @$AR3, $AC0.M -848c 4c00 add $ACC0, $ACC1 -848d 1b7e srri @$AR3, $AC0.M -848e 4c00 add $ACC0, $ACC1 -848f 1b7e srri @$AR3, $AC0.M -8490 4c00 add $ACC0, $ACC1 -8491 1b7e srri @$AR3, $AC0.M -8492 4c00 add $ACC0, $ACC1 -8493 1b7e srri @$AR3, $AC0.M -8494 4c00 add $ACC0, $ACC1 -8495 1b7e srri @$AR3, $AC0.M -8496 4c00 add $ACC0, $ACC1 -8497 1b7e srri @$AR3, $AC0.M -8498 4c00 add $ACC0, $ACC1 -8499 1b7e srri @$AR3, $AC0.M -849a 4c00 add $ACC0, $ACC1 -849b 1b7e srri @$AR3, $AC0.M -849c 4c00 add $ACC0, $ACC1 -849d 1b7e srri @$AR3, $AC0.M -849e 4c00 add $ACC0, $ACC1 -849f 1b7e srri @$AR3, $AC0.M -84a0 4c00 add $ACC0, $ACC1 -84a1 8931 clr's $ACC1 : @$AR1, $AC0.M -84a2 1c27 mrr $AR1, $IX3 -84a3 1c62 mrr $AR3, $AR2 -84a4 8150 clr'l $ACC0 : $AX0.H, @$AR0 -84a5 1939 lrri $AX1.L, @$AR1 -84a6 b072 mulx'l $AX0.H, $AX1.L : $AC0.M, @$AR2 -84a7 8962 clr'l $ACC1 : $AC0.L, @$AR2 -84a8 f07a lsl16'l $ACC0 : $AC1.M, @$AR2 -84a9 191a lrri $AX0.H, @$AR0 -84aa 1939 lrri $AX1.L, @$AR1 -84ab b46a mulxac'l $AX0.H, $AX1.L, $ACC0 : $AC1.L, @$AR2 -84ac 9100 asr16 $ACC0 -84ad f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84ae 1939 lrri $AX1.L, @$AR1 -84af b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84b0 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84b1 195c lrri $AC0.L, @$AR2 -84b2 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84b3 1939 lrri $AX1.L, @$AR1 -84b4 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84b5 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84b6 195d lrri $AC1.L, @$AR2 -84b7 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84b8 1939 lrri $AX1.L, @$AR1 -84b9 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84ba 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84bb 195c lrri $AC0.L, @$AR2 -84bc f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84bd 1939 lrri $AX1.L, @$AR1 -84be b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84bf 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84c0 195d lrri $AC1.L, @$AR2 -84c1 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84c2 1939 lrri $AX1.L, @$AR1 -84c3 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84c4 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84c5 195c lrri $AC0.L, @$AR2 -84c6 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84c7 1939 lrri $AX1.L, @$AR1 -84c8 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84c9 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84ca 195d lrri $AC1.L, @$AR2 -84cb f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84cc 1939 lrri $AX1.L, @$AR1 -84cd b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84ce 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84cf 195c lrri $AC0.L, @$AR2 -84d0 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84d1 1939 lrri $AX1.L, @$AR1 -84d2 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84d3 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84d4 195d lrri $AC1.L, @$AR2 -84d5 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84d6 1939 lrri $AX1.L, @$AR1 -84d7 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84d8 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84d9 195c lrri $AC0.L, @$AR2 -84da f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84db 1939 lrri $AX1.L, @$AR1 -84dc b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84dd 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84de 195d lrri $AC1.L, @$AR2 -84df f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84e0 1939 lrri $AX1.L, @$AR1 -84e1 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84e2 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84e3 195c lrri $AC0.L, @$AR2 -84e4 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84e5 1939 lrri $AX1.L, @$AR1 -84e6 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84e7 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84e8 195d lrri $AC1.L, @$AR2 -84e9 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84ea 1939 lrri $AX1.L, @$AR1 -84eb b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84ec 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84ed 195c lrri $AC0.L, @$AR2 -84ee f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84ef 1939 lrri $AX1.L, @$AR1 -84f0 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84f1 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84f2 195d lrri $AC1.L, @$AR2 -84f3 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84f4 1939 lrri $AX1.L, @$AR1 -84f5 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -84f6 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -84f7 195c lrri $AC0.L, @$AR2 -84f8 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -84f9 1939 lrri $AX1.L, @$AR1 -84fa b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -84fb 917a asr16'l $ACC0 : $AC1.M, @$AR2 -84fc 195d lrri $AC1.L, @$AR2 -84fd f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -84fe 1939 lrri $AX1.L, @$AR1 -84ff b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8500 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8501 195c lrri $AC0.L, @$AR2 -8502 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8503 1939 lrri $AX1.L, @$AR1 -8504 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8505 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8506 195d lrri $AC1.L, @$AR2 -8507 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8508 1939 lrri $AX1.L, @$AR1 -8509 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -850a 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -850b 195c lrri $AC0.L, @$AR2 -850c f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -850d 1939 lrri $AX1.L, @$AR1 -850e b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -850f 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8510 195d lrri $AC1.L, @$AR2 -8511 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8512 1939 lrri $AX1.L, @$AR1 -8513 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8514 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8515 195c lrri $AC0.L, @$AR2 -8516 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8517 1939 lrri $AX1.L, @$AR1 -8518 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8519 917a asr16'l $ACC0 : $AC1.M, @$AR2 -851a 195d lrri $AC1.L, @$AR2 -851b f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -851c 1939 lrri $AX1.L, @$AR1 -851d b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -851e 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -851f 195c lrri $AC0.L, @$AR2 -8520 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8521 1939 lrri $AX1.L, @$AR1 -8522 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8523 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8524 195d lrri $AC1.L, @$AR2 -8525 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8526 1939 lrri $AX1.L, @$AR1 -8527 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8528 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8529 195c lrri $AC0.L, @$AR2 -852a f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -852b 1939 lrri $AX1.L, @$AR1 -852c b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -852d 917a asr16'l $ACC0 : $AC1.M, @$AR2 -852e 195d lrri $AC1.L, @$AR2 -852f f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8530 1939 lrri $AX1.L, @$AR1 -8531 b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -8532 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -8533 195c lrri $AC0.L, @$AR2 -8534 f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -8535 1939 lrri $AX1.L, @$AR1 -8536 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8537 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8538 195d lrri $AC1.L, @$AR2 -8539 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -853a 1939 lrri $AX1.L, @$AR1 -853b b523 mulxac's $AX0.H, $AX1.L, $ACC1 : @$AR3, $AC0.L -853c 9972 asr16'l $ACC1 : $AC0.M, @$AR2 -853d 195c lrri $AC0.L, @$AR2 -853e f0a1 lsl16'ls $ACC0 : $AX0.H, $AC1.M -853f 1939 lrri $AX1.L, @$AR1 -8540 b42b mulxac's $AX0.H, $AX1.L, $ACC0 : @$AR3, $AC1.L -8541 917a asr16'l $ACC0 : $AC1.M, @$AR2 -8542 195d lrri $AC1.L, @$AR2 -8543 f1a0 lsl16'ls $ACC1 : $AX0.H, $AC0.M -8544 1b7c srri @$AR3, $AC0.L -8545 6e00 movp $ACC0 -8546 b512 mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX0.L, $AC0.M -8547 9900 asr16 $ACC1 -8548 1b7f srri @$AR3, $AC1.M -8549 812b clr's $ACC0 : @$AR3, $AC1.L -854a 02df ret -} - -// Don't know what this is. There's deadbeef and 1234 in it. Suspicious. -{ -854b 8e00 set16 -854c 0080 0800 lri $AR0, #0x0800 -854e 0092 00ff lri $CR, #0x00ff -8550 00c4 0403 lr $IX0, @0x0403 -8552 1fe4 mrr $AC1.M, $IX0 -8553 0503 addis $AC1.M, #0x03 -8554 156e lsr $ACC1, #-18 -8555 1502 lsl $ACC1, #2 -8556 29c9 srs @DSCR, $AX1.L -8557 00de 0400 lr $AC0.M, @0x0400 -8559 2ece srs @DSMAH, $AC0.M -855a 00de 0401 lr $AC0.M, @0x0401 -855c 2ecf srs @DSMAL, $AC0.M -855d 00e0 ffcd sr @DSPA, $AR0 -855f 2dcb srs @DSBL, $AC1.L -8560 02bf 863d call 0x863d -8562 29d1 srs @SampleFormat, $AX1.L -8563 29d4 srs @ACSAH, $AX1.L -8564 29d5 srs @ACSAL, $AX1.L -8565 16d6 01ff si @ACEAH, #0x01ff -8567 16d7 ffff si @ACEAL, #0xffff -8569 00df 0404 lr $AC1.M, @0x0404 -856b 00dd 0405 lr $AC1.L, @0x0405 -856d 157f lsr $ACC1, #-1 -856e 0360 8000 ori $AC1.M, #0x8000 -8570 2fd8 srs @ACCAH, $AC1.M -8571 2dd9 srs @ACCAL, $AC1.L -8572 0082 ffd3 lri $AR2, #0xffd3 -8574 0086 0000 lri $IX2, #0x0000 -8576 1fe4 mrr $AC1.M, $IX0 -8577 03c0 0001 andcf $AC1.M, #0x0001 -8579 157f lsr $ACC1, #-1 -857a 1cbf mrr $IX1, $AC1.M -857b 009a fff8 lri $AX0.H, #0xfff8 -857d 009b 0018 lri $AX1.H, #0x0018 -857f 8178 clr'l $ACC0 : $AC1.M, @$AR0 -8580 0065 8586 bloop $IX1, 0x8586 -8582 35be lsrnrx'sn $ACC1, $AX0.H : @$AR2, $AC1.M -8583 3793 lsrnrx'mv $ACC1, $AX1.H : $AX0.L, $AC1.M -8584 f500 lsr16 $ACC1 -8585 7017 addaxl'mv $ACC0, $AX0.L : $AX1.L, $AC1.M -8586 7278 addaxl'l $ACC0, $AX1.L : $AC1.M, @$AR0 -8587 029c 858c jlnz 0x858c -8589 35be lsrnrx'sn $ACC1, $AX0.H : @$AR2, $AC1.M -858a 1f1f mrr $AX0.L, $AC1.M -858b 7000 addaxl $ACC0, $AX0.L -858c 6d00 mov $ACC1, $ACC0 -858d 0080 0408 lri $AR0, #0x0408 -858f 009a 12df lri $AX0.H, #0x12df -8591 0098 acbd lri $AX0.L, #0xacbd -8593 4800 addax $ACC0, $AX0 -8594 1b1e srri @$AR0, $AC0.M -8595 1b1c srri @$AR0, $AC0.L -8596 009e fbca lri $AC0.M, #0xfbca -8598 1b1e srri @$AR0, $AC0.M -8599 009e deb0 lri $AC0.M, #0xdeb0 -859b 1b1e srri @$AR0, $AC0.M -859c 009e fde1 lri $AC0.M, #0xfde1 -859e 1b1e srri @$AR0, $AC0.M -859f 009e facb lri $AC0.M, #0xfacb -85a1 1b1e srri @$AR0, $AC0.M -85a2 009e dead lri $AC0.M, #0xdead -85a4 1b1e srri @$AR0, $AC0.M -85a5 009e beef lri $AC0.M, #0xbeef -85a7 080d lris $AX0.L, #0x0d -85a8 7130 addaxl's $ACC1, $AX0.L : @$AR0, $AC0.M -85a9 1b1d srri @$AR0, $AC1.L -85aa 1b11 srri @$AR0, $AC1.H -85ab 0080 0800 lri $AR0, #0x0800 -85ad 0081 0409 lri $AR1, #0x0409 -85af 0082 040f lri $AR2, #0x040f -85b1 0085 0410 lri $IX1, #0x0410 -85b3 0086 040e lri $IX2, #0x040e -85b5 0087 fffe lri $IX3, #0xfffe -85b7 16d1 0005 si @SampleFormat, #0x0005 -85b9 16d4 0000 si @ACSAH, #0x0000 -85bb 16d5 0000 si @ACSAL, #0x0000 -85bd 16d6 0000 si @ACEAH, #0x0000 -85bf 16d7 00ff si @ACEAL, #0x00ff -85c1 16d8 0000 si @ACCAH, #0x0000 -85c3 16d9 0000 si @ACCAL, #0x0000 -85c5 16da 0000 si @pred_scale, #0x0000 -85c7 16a0 f9b8 si @COEF_A1_0, #0xf9b8 -85c9 16a1 fec7 si @COEF_A2_0, #0xfec7 -85cb 16de 0800 si @GAIN, #0x0800 -85cd 16db 0000 si @yn1, #0x0000 -85cf 16dc 0000 si @yn2, #0x0000 -85d1 1fe4 mrr $AC1.M, $IX0 -85d2 1918 lrri $AX0.L, @$AR0 -85d3 00f8 ffdf sr @0xffdf, $AX0.L -85d5 1c65 mrr $AR3, $IX1 -85d6 18bc lrrd $AC0.L, @$AR1 -85d7 193e lrri $AC0.M, @$AR1 -85d8 00d8 ffdd lr $AX0.L, @ARAM -85da 7000 addaxl $ACC0, $AX0.L -85db 1abc srrd @$AR1, $AC0.L -85dc 7931 decm's $AC1.M : @$AR1, $AC0.M -85dd 157f lsr $ACC1, #-1 -85de 007f 85fd bloop $AC1.M, 0x85fd -85e0 02bf 8611 call 0x8611 -85e2 191e lrri $AC0.M, @$AR0 -85e3 3160 xorr'l $AC1.M, $AX0.H : $AC0.L, @$AR0 -85e4 1478 lsr $ACC0, #-8 -85e5 00fc ffdf sr @0xffdf, $AC0.L -85e7 1c65 mrr $AR3, $IX1 -85e8 18bc lrrd $AC0.L, @$AR1 -85e9 3371 xorr'l $AC1.M, $AX1.H : $AC0.M, @$AR1 -85ea 00d8 ffdd lr $AX0.L, @ARAM -85ec 702a addaxl's $ACC0, $AX0.L : @$AR2, $AC1.L -85ed 1a5f srr @$AR2, $AC1.M -85ee 1abc srrd @$AR1, $AC0.L -85ef 1b3e srri @$AR1, $AC0.M -85f0 02bf 8611 call 0x8611 -85f2 3140 xorr'l $AC1.M, $AX0.H : $AX0.L, @$AR0 -85f3 00f8 ffdf sr @0xffdf, $AX0.L -85f5 1c65 mrr $AR3, $IX1 -85f6 18bc lrrd $AC0.L, @$AR1 -85f7 3371 xorr'l $AC1.M, $AX1.H : $AC0.M, @$AR1 -85f8 00d8 ffdd lr $AX0.L, @ARAM -85fa 702a addaxl's $ACC0, $AX0.L : @$AR2, $AC1.L -85fb 1a5f srr @$AR2, $AC1.M -85fc 1abc srrd @$AR1, $AC0.L -85fd 1b3e srri @$AR1, $AC0.M -85fe 029d 8602 jlz 0x8602 -8600 02bf 8611 call 0x8611 -8602 16c9 0001 si @DSCR, #0x0001 // DMEM->CPU -8604 00de 0406 lr $AC0.M, @0x0406 -8606 2ece srs @DSMAH, $AC0.M -8607 00de 0407 lr $AC0.M, @0x0407 -8609 2ecf srs @DSMAL, $AC0.M -860a 16cd 040a si @DSPA, #0x040a -860c 16cb 0004 si @DSBL, #0x0004 -860e 02bf 863d call 0x863d -8610 02df ret -} - -// No idea what this is either. -{ -8611 18da lrrd $AX0.H, @$AR2 -8612 18db lrrd $AX1.H, @$AR2 -8613 18dd lrrd $AC1.L, @$AR2 -8614 18df lrrd $AC1.M, @$AR2 -8615 4c04 add'dr $ACC0, $ACC1 : $AR0 -8616 1ffc mrr $AC1.M, $AC0.L -8617 3143 xorr'l $AC1.M, $AX0.H : $AX0.L, @$AR3 -8618 f563 lsr16'l $ACC1 : $AC0.L, @$AR3 -8619 1ffe mrr $AC1.M, $AC0.M -861a 7607 inc'dr $ACC0 : $AR3 -861b 3323 xorr's $AC1.M, $AX1.H : @$AR3, $AC0.L -861c 7042 addaxl'l $ACC0, $AX0.L : $AX0.L, @$AR2 -861d 1423 lsl $ACC0, #-29 -861e 146d lsr $ACC0, #-19 -861f 1f5e mrr $AX0.H, $AC0.M -8620 04e0 addis $AC0.M, #0xe0 -8621 6c1e mov'mv $ACC0, $ACC1 : $AX1.H, $AC0.M -8622 1c66 mrr $AR3, $IX2 -8623 3486 lsrnrx'dr $ACC0, $AX0.H : $AR2 -8624 3786 lsrnrx'dr $ACC1, $AX1.H : $AR2 -8625 4c52 add'l $ACC0, $ACC1 : $AX0.H, @$AR2 -8626 486b addax'l $ACC0, $AX0 : $AC1.L, @$AR3 -8627 1adc srrd @$AR2, $AC0.L -8628 1a5e srr @$AR2, $AC0.M -8629 183e lrr $AC0.M, @$AR1 -862a 18bf lrrd $AC1.M, @$AR1 -862b 33d2 not'l $AC1.M : $AX0.H, @$AR2 -862c 195b lrri $AX1.H, @$AR2 -862d 365f andr'ln $AC0.M, $AX1.H : $AX1.H, @$AR3 -862e 371e andr'mv $AC1.M, $AX1.H : $AX1.H, $AC0.M -862f 3b1d orr'mv $AC1.M, $AX1.H : $AX1.H, $AC1.L -8630 1aff srrd @$AR3, $AC1.M -8631 183e lrr $AC0.M, @$AR1 -8632 3479 andr'l $AC0.M, $AX0.H : $AC1.M, @$AR1 -8633 339a not'mv $AC1.M : $AX0.H, $AC0.M -8634 3705 andr'dr $AC1.M, $AX1.H : $AR1 -8635 390a orr'ir $AC1.M, $AX0.H : $AR2 -8636 1bff srrn @$AR3, $AC1.M -8637 197b lrri $AX1.H, @$AR3 -8638 3359 xorr'l $AC1.M, $AX1.H : $AX1.H, @$AR1 -8639 335a xorr'l $AC1.M, $AX1.H : $AX1.H, @$AR2 -863a f557 lsr16'ln $ACC1 : $AX0.H, @$AR3 -863b 197f lrri $AC1.M, @$AR3 -863c 02df ret -} - -// waits for DMA completion. -void 863d_WaitForDMAend() -{ -863d 00df ffc9 lr $AC1.M, @DSCR -863f 03c0 0004 andcf $AC1.M, #0x0004 -8641 029d 863d jlz 0x863d -8643 02df ret -} - -// This one does some DMA-ing. -// jump here from ZeldaLightTypeUcode (light type... Luigi Mansion, Pikmin 1 (U), IPL ucode) -void 8644_Irom() -{ -8644 8e00 set16 -8645 0081 0800 lri $AR1, #0x0800 -8647 0092 00ff lri $CR, #0x00ff -8649 00df 0403 lr $AC1.M, @0x0403 -864b 0503 addis $AC1.M, #0x03 -864c 156e lsr $ACC1, #-18 -864d 1502 lsl $ACC1, #2 -864e 29c9 srs @DSCR, $AX1.L -864f 00de 0400 lr $AC0.M, @0x0400 -8651 2ece srs @DSMAH, $AC0.M -8652 00de 0401 lr $AC0.M, @0x0401 -8654 2ecf srs @DSMAL, $AC0.M -8655 00e1 ffcd sr @DSPA, $AR1 -8657 2dcb srs @DSBL, $AC1.L - -8658 02bf 863d call 0x863d -865a 29d1 srs @SampleFormat, $AX1.L -865b 29d4 srs @ACSAH, $AX1.L -865c 29d5 srs @ACSAL, $AX1.L -865d 16d6 01ff si @ACEAH, #0x01ff -865f 16d7 ffff si @ACEAL, #0xffff -8661 00df 0404 lr $AC1.M, @0x0404 -8663 00dd 0405 lr $AC1.L, @0x0405 -8665 157f lsr $ACC1, #-1 -8666 0360 8000 ori $AC1.M, #0x8000 -8668 2fd8 srs @ACCAH, $AC1.M -8669 2dd9 srs @ACCAL, $AC1.L -866a 0080 ffd3 lri $AR0, #0xffd3 -866c 0084 0000 lri $IX0, #0x0000 -866e 00df 0403 lr $AC1.M, @0x0403 -8670 03c0 0001 andcf $AC1.M, #0x0001 -8672 157f lsr $ACC1, #-1 -8673 1cdf mrr $IX2, $AC1.M -8674 009a fff8 lri $AX0.H, #0xfff8 -8676 009b 0018 lri $AX1.H, #0x0018 -8678 8179 clr'l $ACC0 : $AC1.M, @$AR1 -8679 0066 867f bloop $IX2, 0x867f -{ - 867b 35bc lsrnrx'sn $ACC1, $AX0.H : @$AR0, $AC1.M - 867c 3793 lsrnrx'mv $ACC1, $AX1.H : $AX0.L, $AC1.M - 867d f500 lsr16 $ACC1 - 867e 7017 addaxl'mv $ACC0, $AX0.L : $AX1.L, $AC1.M - 867f 7279 addaxl'l $ACC0, $AX1.L : $AC1.M, @$AR1 -} -8680 029c 8685 jlnz 0x8685 -8682 35bc lsrnrx'sn $ACC1, $AX0.H : @$AR0, $AC1.M -8683 1f1f mrr $AX0.L, $AC1.M -8684 7000 addaxl $ACC0, $AX0.L -8685 6d00 mov $ACC1, $ACC0 -8686 0081 0408 lri $AR1, #0x0408 -8688 009a 170a lri $AX0.H, #0x170a -868a 0098 7489 lri $AX0.L, #0x7489 -868c 4800 addax $ACC0, $AX0 -868d 1b3e srri @$AR1, $AC0.M -868e 1b3c srri @$AR1, $AC0.L -868f 009e 05ef lri $AC0.M, #0x05ef -8691 1b3e srri @$AR1, $AC0.M -8692 009e e0aa lri $AC0.M, #0xe0aa -8694 1b3e srri @$AR1, $AC0.M -8695 009e daf4 lri $AC0.M, #0xdaf4 -8697 1b3e srri @$AR1, $AC0.M -8698 009e b157 lri $AC0.M, #0xb157 -869a 1b3e srri @$AR1, $AC0.M -869b 009e 6bbe lri $AC0.M, #0x6bbe -869d 1b3e srri @$AR1, $AC0.M -869e 009e c3b6 lri $AC0.M, #0xc3b6 -86a0 0808 lris $AX0.L, #0x08 -86a1 7131 addaxl's $ACC1, $AX0.L : @$AR1, $AC0.M -86a2 1b3d srri @$AR1, $AC1.L -86a3 1b31 srri @$AR1, $AC1.H -86a4 28d1 srs @SampleFormat, $AX0.L -86a5 28d4 srs @ACSAH, $AX0.L -86a6 28d5 srs @ACSAL, $AX0.L -86a7 16d6 07ff si @ACEAH, #0x07ff -86a9 16d7 ffff si @ACEAL, #0xffff -86ab 00de 0404 lr $AC0.M, @0x0404 -86ad 00dc 0405 lr $AC0.L, @0x0405 -86af 1401 lsl $ACC0, #1 -86b0 2ed8 srs @ACCAH, $AC0.M -86b1 2cd9 srs @ACCAL, $AC0.L -86b2 0081 0409 lri $AR1, #0x0409 -86b4 0082 040e lri $AR2, #0x040e -86b6 0085 0410 lri $IX1, #0x0410 -86b8 0087 fffe lri $IX3, #0xfffe -86ba 0088 040e lri $WR0, #0x040e -86bc 00df 0403 lr $AC1.M, @0x0403 -86be 7900 decm $AC1.M -86bf 157f lsr $ACC1, #-1 -86c0 1f3f mrr $AX1.L, $AC1.M -86c1 199d lrrn $AC1.L, @$AR0 -86c2 199a lrrn $AX0.H, @$AR0 -86c3 1c65 mrr $AR3, $IX1 -86c4 0079 86cf bloop $AX1.L, 0x86cf -{ - 86c6 02bf 86e5 call 0x86e5 - 86c8 1fb9 mrr $AC1.L, $AX1.L - 86c9 1f46 mrr $AX0.H, $IX2 - 86ca 1c65 mrr $AR3, $IX1 - 86cb 02bf 86e5 call 0x86e5 - 86cd 1fb9 mrr $AC1.L, $AX1.L - 86ce 1f46 mrr $AX0.H, $IX2 - 86cf 1c65 mrr $AR3, $IX1 -} -86d0 029d 86d4 jlz 0x86d4 -86d2 02bf 86e5 call 0x86e5 -86d4 0088 ffff lri $WR0, #0xffff -86d6 16c9 0001 si @DSCR, #0x0001 // DMEM->CPU -86d8 00de 0406 lr $AC0.M, @0x0406 -86da 2ece srs @DSMAH, $AC0.M -86db 00de 0407 lr $AC0.M, @0x0407 -86dd 2ecf srs @DSMAL, $AC0.M -86de 16cd 040a si @DSPA, #0x040a -86e0 16cb 0004 si @DSBL, #0x0004 -86e2 02bf 863d call 0x863d -86e4 02df ret -} - -//used by 8644_Irom() (Zelda Light) -{ -86e5 1999 lrrn $AX1.L, @$AR0 -86e6 199c lrrn $AC0.L, @$AR0 -86e7 1cdc mrr $IX2, $AC0.L -86e8 1414 lsl $ACC0, #20 -86e9 385a orr'l $AC0.M, $AX0.H : $AX1.H, @$AR2 -86ea f052 lsl16'l $ACC0 : $AX0.H, @$AR2 -86eb 9106 asr16'dr $ACC0 : $AR2 -86ec 1518 lsl $ACC1, #24 -86ed 3086 xorc'dr $AC0.M, $AC1.M : $AR2 -86ee 1ff9 mrr $AC1.M, $AX1.L -86ef 150c lsl $ACC1, #12 -86f0 3086 xorc'dr $AC0.M, $AC1.M : $AR2 -86f1 1f1e mrr $AX0.L, $AC0.M -86f2 18bc lrrd $AC0.L, @$AR1 -86f3 193e lrri $AC0.M, @$AR1 -86f4 7000 addaxl $ACC0, $AX0.L -86f5 1abc srrd @$AR1, $AC0.L -86f6 18df lrrd $AC1.M, @$AR2 -86f7 3131 xorr's $AC1.M, $AX0.H : @$AR1, $AC0.M -86f8 f543 lsr16'l $ACC1 : $AX0.L, @$AR3 -86f9 18df lrrd $AC1.M, @$AR2 -86fa 3300 xorr $AC1.M, $AX1.H -86fb 4d63 add'l $ACC1, $ACC0 : $AC0.L, @$AR3 -86fc 7607 inc'dr $ACC0 : $AR3 -86fd 1b7c srri @$AR3, $AC0.L -86fe 7042 addaxl'l $ACC0, $AX0.L : $AX0.L, @$AR2 -86ff 1423 lsl $ACC0, #-29 -8700 145d lsr $ACC0, #29 -8701 7c00 neg $ACC0 -8702 f000 lsl16 $ACC0 -8703 04f8 addis $AC0.M, #0xf8 -8704 1f5e mrr $AX0.H, $AC0.M -8705 0428 addis $AC0.M, #0x28 -8706 6c1e mov'mv $ACC0, $ACC1 : $AX1.H, $AC0.M -8707 1408 lsl $ACC0, #8 -8708 1c68 mrr $AR3, $WR0 -8709 3486 lsrnrx'dr $ACC0, $AX0.H : $AR2 -870a 3786 lsrnrx'dr $ACC1, $AX1.H : $AR2 -870b 4c52 add'l $ACC0, $ACC1 : $AX0.H, @$AR2 -870c 486b addax'l $ACC0, $AX0 : $AC1.L, @$AR3 -870d 1adc srrd @$AR2, $AC0.L -870e 1a5e srr @$AR2, $AC0.M -870f 183e lrr $AC0.M, @$AR1 -8710 18bf lrrd $AC1.M, @$AR1 -8711 33d2 not'l $AC1.M : $AX0.H, @$AR2 -8712 19fb lrrn $AX1.H, @$AR3 -8713 365a andr'l $AC0.M, $AX1.H : $AX1.H, @$AR2 -8714 371e andr'mv $AC1.M, $AX1.H : $AX1.H, $AC0.M -8715 3b1d orr'mv $AC1.M, $AX1.H : $AX1.H, $AC1.L -8716 1aff srrd @$AR3, $AC1.M -8717 183e lrr $AC0.M, @$AR1 -8718 3679 andr'l $AC0.M, $AX1.H : $AC1.M, @$AR1 -8719 339e not'mv $AC1.M : $AX1.H, $AC0.M -871a 3505 andr'dr $AC1.M, $AX0.H : $AR1 -871b 3b0a orr'ir $AC1.M, $AX1.H : $AR2 -871c 1bff srrn @$AR3, $AC1.M -871d 197b lrri $AX1.H, @$AR3 -871e 3359 xorr'l $AC1.M, $AX1.H : $AX1.H, @$AR1 -871f 335a xorr'l $AC1.M, $AX1.H : $AX1.H, @$AR2 -8720 f557 lsr16'ln $ACC1 : $AX0.H, @$AR3 -8721 197f lrri $AC1.M, @$AR3 -8722 312a xorr's $AC1.M, $AX0.H : @$AR2, $AC1.L -8723 3300 xorr $AC1.M, $AX1.H -8724 1adf srrd @$AR2, $AC1.M -8725 02df ret -} - -{ -8726 8e00 set16 -8727 0081 0800 lri $AR1, #0x0800 -8729 0092 00ff lri $CR, #0x00ff -872b 00df 0403 lr $AC1.M, @0x0403 -872d f500 lsr16 $ACC1 -872e 29c9 srs @DSCR, $AX1.L -872f 00de 0400 lr $AC0.M, @0x0400 -8731 2ece srs @DSMAH, $AC0.M -8732 00de 0401 lr $AC0.M, @0x0401 -8734 2ecf srs @DSMAL, $AC0.M -8735 00e1 ffcd sr @DSPA, $AR1 -8737 2dcb srs @DSBL, $AC1.L -8738 02bf 863d call 0x863d -873a 29d1 srs @SampleFormat, $AX1.L -873b 29d4 srs @ACSAH, $AX1.L -873c 29d5 srs @ACSAL, $AX1.L -873d 16d6 01ff si @ACEAH, #0x01ff -873f 16d7 ffff si @ACEAL, #0xffff -8741 00df 0404 lr $AC1.M, @0x0404 -8743 00dd 0405 lr $AC1.L, @0x0405 -8745 157f lsr $ACC1, #-1 -8746 0360 8000 ori $AC1.M, #0x8000 -8748 2fd8 srs @ACCAH, $AC1.M -8749 2dd9 srs @ACCAL, $AC1.L -874a 0080 ffd3 lri $AR0, #0xffd3 -874c 0084 0000 lri $IX0, #0x0000 -874e 00df 0403 lr $AC1.M, @0x0403 -8750 157f lsr $ACC1, #-1 -8751 1cdf mrr $IX2, $AC1.M -8752 009a fff8 lri $AX0.H, #0xfff8 -8754 009b 0018 lri $AX1.H, #0x0018 -8756 8179 clr'l $ACC0 : $AC1.M, @$AR1 -8757 0066 875d bloop $IX2, 0x875d -{ - 8759 35bc lsrnrx'sn $ACC1, $AX0.H : @$AR0, $AC1.M - 875a 3793 lsrnrx'mv $ACC1, $AX1.H : $AX0.L, $AC1.M - 875b f500 lsr16 $ACC1 - 875c 7017 addaxl'mv $ACC0, $AX0.L : $AX1.L, $AC1.M - 875d 7279 addaxl'l $ACC0, $AX1.L : $AC1.M, @$AR1 -} -875e 6d00 mov $ACC1, $ACC0 -875f 0081 0408 lri $AR1, #0x0408 -8761 009a 298f lri $AX0.H, #0x298f -8763 0098 0b7f lri $AX0.L, #0x0b7f -8765 4800 addax $ACC0, $AX0 -8766 1b3e srri @$AR1, $AC0.M -8767 1b3c srri @$AR1, $AC0.L -8768 009e 4bf9 lri $AC0.M, #0x4bf9 -876a 1b3e srri @$AR1, $AC0.M -876b 009e c9b1 lri $AC0.M, #0xc9b1 -876d 1b3e srri @$AR1, $AC0.M -876e 009e d30d lri $AC0.M, #0xd30d -8770 1b3e srri @$AR1, $AC0.M -8771 009e 6b99 lri $AC0.M, #0x6b99 -8773 1b3e srri @$AR1, $AC0.M -8774 009e 191d lri $AC0.M, #0x191d -8776 1b3e srri @$AR1, $AC0.M -8777 009e 31dd lri $AC0.M, #0x31dd -8779 0812 lris $AX0.L, #0x12 -877a 7131 addaxl's $ACC1, $AX0.L : @$AR1, $AC0.M -877b 1b3d srri @$AR1, $AC1.L -877c 1b31 srri @$AR1, $AC1.H -877d 28d1 srs @SampleFormat, $AX0.L -877e 28d4 srs @ACSAH, $AX0.L -877f 28d5 srs @ACSAL, $AX0.L -8780 16d6 07ff si @ACEAH, #0x07ff -8782 16d7 ffff si @ACEAL, #0xffff -8784 00de 0404 lr $AC0.M, @0x0404 -8786 00dc 0405 lr $AC0.L, @0x0405 -8788 7600 inc $ACC0 -8789 1401 lsl $ACC0, #1 -878a 2ed8 srs @ACCAH, $AC0.M -878b 2cd9 srs @ACCAL, $AC0.L -878c 00de 0800 lr $AC0.M, @0x0800 -878e 1478 lsr $ACC0, #-8 -878f 2eda srs @pred_scale, $AC0.M -8790 16a0 01ba si @COEF_A1_0, #0x01ba -8792 16a1 04b0 si @COEF_A2_0, #0x04b0 -8794 16a2 044d si @COEF_A1_1, #0x044d -8796 16a3 01e7 si @COEF_A2_1, #0x01e7 -8798 16a4 02da si @COEF_A1_2, #0x02da -879a 16a5 0452 si @COEF_A2_2, #0x0452 -879c 16a6 057a si @COEF_A1_3, #0x057a -879e 16a7 01bf si @COEF_A2_3, #0x01bf -87a0 28db srs @yn1, $AX0.L -87a1 28dc srs @yn2, $AX0.L -87a2 0080 ffdd lri $AR0, #0xffdd -87a4 0081 0409 lri $AR1, #0x0409 -87a6 0082 040f lri $AR2, #0x040f -87a8 0085 0410 lri $IX1, #0x0410 -87aa 0086 ffff lri $IX2, #0xffff -87ac 0087 fffe lri $IX3, #0xfffe -87ae 8b00 m0 -87af 8c00 clr15 -87b0 00de 0403 lr $AC0.M, @0x0403 -87b2 147d lsr $ACC0, #-3 -87b3 0a07 lris $AX0.H, #0x07 -87b4 c000 mulc $AC0.M, $AX0.H -87b5 6e00 movp $ACC0 -87b6 7a00 dec $ACC0 -87b7 1f3c mrr $AX1.L, $AC0.L -87b8 199d lrrn $AC1.L, @$AR0 -87b9 18bc lrrd $AC0.L, @$AR1 -87ba 193e lrri $AC0.M, @$AR1 -87bb 19da lrrn $AX0.H, @$AR2 -87bc 1c65 mrr $AR3, $IX1 -87bd 199f lrrn $AC1.M, @$AR0 -87be 4c5e add'ln $ACC0, $ACC1 : $AX1.H, @$AR2 -87bf 1abc srrd @$AR1, $AC0.L -87c0 1b3e srri @$AR1, $AC0.M -87c1 0079 87cd bloop $AX1.L, 0x87cd -{ - 87c3 02bf 87df call 0x87df - 87c5 199d lrrn $AC1.L, @$AR0 - 87c6 18bc lrrd $AC0.L, @$AR1 - 87c7 193e lrri $AC0.M, @$AR1 - 87c8 19da lrrn $AX0.H, @$AR2 - 87c9 1c65 mrr $AR3, $IX1 - 87ca 199f lrrn $AC1.M, @$AR0 - 87cb 4c5e add'ln $ACC0, $ACC1 : $AX1.H, @$AR2 - 87cc 1abc srrd @$AR1, $AC0.L - 87cd 1b3e srri @$AR1, $AC0.M -} -87ce 02bf 87df call 0x87df -87d0 16c9 0001 si @DSCR, #0x0001 // DMEM->CPU -87d2 00de 0406 lr $AC0.M, @0x0406 -87d4 2ece srs @DSMAH, $AC0.M -87d5 00de 0407 lr $AC0.M, @0x0407 -87d7 2ecf srs @DSMAL, $AC0.M -87d8 16cd 040a si @DSPA, #0x040a -87da 16cb 0004 si @DSBL, #0x0004 -87dc 02bf 863d call 0x863d -87de 02df ret -} - -{ -87df 1ffc mrr $AC1.M, $AC0.L -87e0 3166 xorr'ln $AC1.M, $AX0.H : $AC0.L, @$AR2 -87e1 f543 lsr16'l $ACC1 : $AX0.L, @$AR3 -87e2 1ffe mrr $AC1.M, $AC0.M -87e3 3376 xorr'ln $AC1.M, $AX1.H : $AC0.M, @$AR2 -87e4 4d63 add'l $ACC1, $ACC0 : $AC0.L, @$AR3 -87e5 7607 inc'dr $ACC0 : $AR3 -87e6 1b7c srri @$AR3, $AC0.L -87e7 7046 addaxl'ln $ACC0, $AX0.L : $AX0.L, @$AR2 -87e8 1423 lsl $ACC0, #-29 -87e9 145d lsr $ACC0, #29 -87ea 7c0f neg'nr $ACC0 : $AR3 -87eb f00f lsl16'nr $ACC0 : $AR3 -87ec 04f8 addis $AC0.M, #0xf8 -87ed 1f5e mrr $AX0.H, $AC0.M -87ee 0428 addis $AC0.M, #0x28 -87ef 6c1e mov'mv $ACC0, $ACC1 : $AX1.H, $AC0.M -87f0 1408 lsl $ACC0, #8 -87f1 3485 lsrnrx'dr $ACC0, $AX0.H : $AR1 -87f2 37d9 lsrnrx'l $ACC1, $AX1.H : $AX1.H, @$AR1 -87f3 4c52 add'l $ACC0, $ACC1 : $AX0.H, @$AR2 -87f4 4853 addax'l $ACC0, $AX0 : $AX0.H, @$AR3 -87f5 1bdc srrn @$AR2, $AC0.L -87f6 1b5e srri @$AR2, $AC0.M -87f7 325f xorr'ln $AC0.M, $AX1.H : $AX1.H, @$AR3 -87f8 3051 xorr'l $AC0.M, $AX0.H : $AX0.H, @$AR1 -87f9 000a iar $AR2 -87fa f032 lsl16's $ACC0 : @$AR2, $AC0.M -87fb 3005 xorr'dr $AC0.M, $AX0.H : $AR1 -87fc 320f xorr'nr $AC0.M, $AX1.H : $AR3 -87fd 1b5e srri @$AR2, $AC0.M -87fe 183b lrr $AX1.H, @$AR1 -87ff 3653 andr'l $AC0.M, $AX1.H : $AX0.H, @$AR3 -8800 18bf lrrd $AC1.M, @$AR1 -8801 339e not'mv $AC1.M : $AX1.H, $AC0.M -8802 3571 andr'l $AC1.M, $AX0.H : $AC0.M, @$AR1 -8803 3b05 orr'dr $AC1.M, $AX1.H : $AR1 -8804 f557 lsr16'ln $ACC1 : $AX0.H, @$AR3 -8805 193f lrri $AC1.M, @$AR1 -8806 345f andr'ln $AC0.M, $AX0.H : $AX1.H, @$AR3 -8807 339a not'mv $AC1.M : $AX0.H, $AC0.M -8808 370a andr'ir $AC1.M, $AX1.H : $AR2 -8809 392e orr'sn $AC1.M, $AX0.H : @$AR2, $AC1.L -880a 1b5f srri @$AR2, $AC1.M -880b 02df ret -} - -{ -880c 8e00 set16 -880d 0081 0800 lri $AR1, #0x0800 -880f 0092 00ff lri $CR, #0x00ff -8811 00df 0403 lr $AC1.M, @0x0403 -8813 0503 addis $AC1.M, #0x03 -8814 156e lsr $ACC1, #-18 -8815 1502 lsl $ACC1, #2 -8816 29c9 srs @DSCR, $AX1.L -8817 00de 0400 lr $AC0.M, @0x0400 -8819 2ece srs @DSMAH, $AC0.M -881a 00de 0401 lr $AC0.M, @0x0401 -881c 2ecf srs @DSMAL, $AC0.M -881d 00e1 ffcd sr @DSPA, $AR1 -881f 2dcb srs @DSBL, $AC1.L -8820 02bf 863d call 0x863d -8822 29d1 srs @SampleFormat, $AX1.L -8823 29d4 srs @ACSAH, $AX1.L -8824 29d5 srs @ACSAL, $AX1.L -8825 16d6 01ff si @ACEAH, #0x01ff -8827 16d7 ffff si @ACEAL, #0xffff -8829 00df 0404 lr $AC1.M, @0x0404 -882b 00dd 0405 lr $AC1.L, @0x0405 -882d 157f lsr $ACC1, #-1 -882e 0360 8000 ori $AC1.M, #0x8000 -8830 2fd8 srs @ACCAH, $AC1.M -8831 2dd9 srs @ACCAL, $AC1.L -8832 0080 ffd3 lri $AR0, #0xffd3 -8834 0084 0000 lri $IX0, #0x0000 -8836 00df 0403 lr $AC1.M, @0x0403 -8838 03c0 0001 andcf $AC1.M, #0x0001 -883a 157f lsr $ACC1, #-1 -883b 1cdf mrr $IX2, $AC1.M -883c 009a fff8 lri $AX0.H, #0xfff8 -883e 009b 0018 lri $AX1.H, #0x0018 -8840 8179 clr'l $ACC0 : $AC1.M, @$AR1 -8841 0066 8847 bloop $IX2, 0x8847 -8843 35bc lsrnrx'sn $ACC1, $AX0.H : @$AR0, $AC1.M -8844 3793 lsrnrx'mv $ACC1, $AX1.H : $AX0.L, $AC1.M -8845 f500 lsr16 $ACC1 -8846 7017 addaxl'mv $ACC0, $AX0.L : $AX1.L, $AC1.M -8847 7279 addaxl'l $ACC0, $AX1.L : $AC1.M, @$AR1 -8848 029c 884d jlnz 0x884d -884a 35bc lsrnrx'sn $ACC1, $AX0.H : @$AR0, $AC1.M -884b 1f1f mrr $AX0.L, $AC1.M -884c 7000 addaxl $ACC0, $AX0.L -884d 6d00 mov $ACC1, $ACC0 -884e 0081 0408 lri $AR1, #0x0408 -8850 009a 4ea2 lri $AX0.H, #0x4ea2 -8852 0098 1e71 lri $AX0.L, #0x1e71 -8854 4800 addax $ACC0, $AX0 -8855 1b3e srri @$AR1, $AC0.M -8856 1b3c srri @$AR1, $AC0.L -8857 009e cc0a lri $AC0.M, #0xcc0a -8859 1b3e srri @$AR1, $AC0.M -885a 009e 144b lri $AC0.M, #0x144b -885c 1b3e srri @$AR1, $AC0.M -885d 009e f541 lri $AC0.M, #0xf541 -885f 1b3e srri @$AR1, $AC0.M -8860 009e 878d lri $AC0.M, #0x878d -8862 1b3e srri @$AR1, $AC0.M -8863 009e a3bc lri $AC0.M, #0xa3bc -8865 1b3e srri @$AR1, $AC0.M -8866 009e 64e4 lri $AC0.M, #0x64e4 -8868 0803 lris $AX0.L, #0x03 -8869 7131 addaxl's $ACC1, $AX0.L : @$AR1, $AC0.M -886a 1b3d srri @$AR1, $AC1.L -886b 1b31 srri @$AR1, $AC1.H -886c 16d1 0018 si @SampleFormat, #0x0018 -886e 28d4 srs @ACSAH, $AX0.L -886f 28d5 srs @ACSAL, $AX0.L -8870 16d6 07ff si @ACEAH, #0x07ff -8872 16d7 ffff si @ACEAL, #0xffff -8874 00de 0404 lr $AC0.M, @0x0404 -8876 00dc 0405 lr $AC0.L, @0x0405 -8878 1401 lsl $ACC0, #1 -8879 2ed8 srs @ACCAH, $AC0.M -887a 2cd9 srs @ACCAL, $AC0.L -887b 28da srs @pred_scale, $AX0.L -887c 16a0 0978 si @COEF_A1_0, #0x0978 -887e 16a1 e541 si @COEF_A2_0, #0xe541 -8880 16de fc82 si @GAIN, #0xfc82 -8882 28db srs @yn1, $AX0.L -8883 0080 ffdd lri $AR0, #0xffdd -8885 0081 0409 lri $AR1, #0x0409 -8887 0082 040f lri $AR2, #0x040f -8889 0085 0410 lri $IX1, #0x0410 -888b 0086 ffff lri $IX2, #0xffff -888d 0087 fffc lri $IX3, #0xfffc -888f 28dc srs @yn2, $AX0.L -8890 00de 0403 lr $AC0.M, @0x0403 -8892 7800 decm $AC0.M -8893 1f3e mrr $AX1.L, $AC0.M -8894 199f lrrn $AC1.M, @$AR0 -8895 18bc lrrd $AC0.L, @$AR1 -8896 193e lrri $AC0.M, @$AR1 -8897 19da lrrn $AX0.H, @$AR2 -8898 1c65 mrr $AR3, $IX1 -8899 199d lrrn $AC1.L, @$AR0 -889a 4c5a add'l $ACC0, $ACC1 : $AX1.H, @$AR2 -889b 1abc srrd @$AR1, $AC0.L -889c 1b3e srri @$AR1, $AC0.M -889d 0079 88a9 bloop $AX1.L, 0x88a9 -{ - 889f 02bf 88bb call 0x88bb - 88a1 199f lrrn $AC1.M, @$AR0 - 88a2 18bc lrrd $AC0.L, @$AR1 - 88a3 193e lrri $AC0.M, @$AR1 - 88a4 19da lrrn $AX0.H, @$AR2 - 88a5 1c65 mrr $AR3, $IX1 - 88a6 199d lrrn $AC1.L, @$AR0 - 88a7 4c5a add'l $ACC0, $ACC1 : $AX1.H, @$AR2 - 88a8 1abc srrd @$AR1, $AC0.L - 88a9 1b3e srri @$AR1, $AC0.M -} -88aa 02bf 88bb call 0x88bb -88ac 16c9 0001 si @DSCR, #0x0001 // DMEM->CPU -88ae 00de 0406 lr $AC0.M, @0x0406 -88b0 2ece srs @DSMAH, $AC0.M -88b1 00de 0407 lr $AC0.M, @0x0407 -88b3 2ecf srs @DSMAL, $AC0.M -88b4 16cd 040a si @DSPA, #0x040a -88b6 16cb 0004 si @DSBL, #0x0004 -88b8 02bf 863d call 0x863d -88ba 02df ret -} - -{ -88bb 19d8 lrrn $AX0.L, @$AR2 -88bc 19da lrrn $AX0.H, @$AR2 -88bd 4856 addax'ln $ACC0, $AX0 : $AX0.H, @$AR2 -88be 1ffc mrr $AC1.M, $AC0.L -88bf 3156 xorr'ln $AC1.M, $AX0.H : $AX0.H, @$AR2 -88c0 f543 lsr16'l $ACC1 : $AX0.L, @$AR3 -88c1 1ffe mrr $AC1.M, $AC0.M -88c2 3163 xorr'l $AC1.M, $AX0.H : $AC0.L, @$AR3 -88c3 7607 inc'dr $ACC0 : $AR3 -88c4 1b7c srri @$AR3, $AC0.L -88c5 7046 addaxl'ln $ACC0, $AX0.L : $AX0.L, @$AR2 -88c6 1423 lsl $ACC0, #-29 -88c7 146d lsr $ACC0, #-19 -88c8 1f5e mrr $AX0.H, $AC0.M -88c9 04e0 addis $AC0.M, #0xe0 -88ca 001f addarn $AR3, $IX3 -88cb 6c1e mov'mv $ACC0, $ACC1 : $AX1.H, $AC0.M -88cc 3485 lsrnrx'dr $ACC0, $AX0.H : $AR1 -88cd 37d9 lsrnrx'l $ACC1, $AX1.H : $AX1.H, @$AR1 -88ce 4c52 add'l $ACC0, $ACC1 : $AX0.H, @$AR2 -88cf 4853 addax'l $ACC0, $AX0 : $AX0.H, @$AR3 -88d0 1bdc srrn @$AR2, $AC0.L -88d1 1b5e srri @$AR2, $AC0.M -88d2 325f xorr'ln $AC0.M, $AX1.H : $AX1.H, @$AR3 -88d3 3051 xorr'l $AC0.M, $AX0.H : $AX0.H, @$AR1 -88d4 000a iar $AR2 -88d5 f032 lsl16's $ACC0 : @$AR2, $AC0.M -88d6 3005 xorr'dr $AC0.M, $AX0.H : $AR1 -88d7 3200 xorr $AC0.M, $AX1.H -88d8 1b5e srri @$AR2, $AC0.M -88d9 183f lrr $AC1.M, @$AR1 -88da 339e not'mv $AC1.M : $AX1.H, $AC0.M -88db 18be lrrd $AC0.M, @$AR1 -88dc 3753 andr'l $AC1.M, $AX1.H : $AX0.H, @$AR3 -88dd 341f andr'mv $AC0.M, $AX0.H : $AX1.H, $AC1.M -88de 3a79 orr'l $AC0.M, $AX1.H : $AC1.M, @$AR1 -88df f405 lsr16'dr $ACC0 : $AR1 -88e0 33d3 not'l $AC1.M : $AX0.H, @$AR3 -88e1 3571 andr'l $AC1.M, $AX0.H : $AC0.M, @$AR1 -88e2 0009 iar $AR1 -88e3 183b lrr $AX1.H, @$AR1 -88e4 361b andr'mv $AC0.M, $AX1.H : $AX0.H, $AC1.M -88e5 387a orr'l $AC0.M, $AX0.H : $AC1.M, @$AR2 -88e6 18dd lrrd $AC1.L, @$AR2 -88e7 4c05 add'dr $ACC0, $ACC1 : $AR1 -88e8 1b5e srri @$AR2, $AC0.M -88e9 1a5c srr @$AR2, $AC0.L -88ea 02df ret -} - -88eb 0000 nop -88ec 0000 nop -88ed 0000 nop -88ee 0000 nop -88ef 0000 nop - -// 08f0 to 0ffd = invalid data - -8ffe 06e2 cmpis $ACC0, #0xe2 -8fff 8845 nx'ln : $AX0.L, @$AR1