small build fix in debug mode, misc cleanup

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1604 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2008-12-20 11:20:47 +00:00
parent 4f4edc05a0
commit f0bb8f430a
9 changed files with 459 additions and 435 deletions

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@ -189,6 +189,7 @@ namespace CPUCompare
jo.fpAccurateFlags = true;
jo.optimizeGatherPipe = true;
jo.fastInterrupts = false;
jo.accurateSinglePrecision = true;
gpr.SetEmitter(this);
fpr.SetEmitter(this);
@ -328,6 +329,9 @@ namespace CPUCompare
if (emaddress == 0)
PanicAlert("ERROR : Trying to compile at 0. LR=%08x", LR);
// if (emaddress == 0x800aa278)
// DebugBreak();
int size;
js.isLastInstruction = false;
js.blockStart = emaddress;
@ -433,6 +437,7 @@ namespace CPUCompare
CALL(thunks.ProtectFunction((void *)&GPFifo::CheckGatherPipe, 0));
}
if (!ops[i].skip)
PPCTables::CompileInstruction(ops[i].inst);
gpr.SanityCheck();

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@ -19,6 +19,14 @@
// See comments in Jit.cpp.
// ========================
// Mystery: Capcom vs SNK 800aa278
// CR flags approach:
// * Store that "N+Z flag contains CR0" or "S+Z flag contains CR3".
// * All flag altering instructions flush this
// * A flush simply does a conditional write to the appropriate CRx.
// * If flag available, branch code can become absolutely trivial.
#ifndef _JIT_H
#define _JIT_H
@ -128,6 +136,7 @@ private:
bool enableFastMem;
bool optimizeGatherPipe;
bool fastInterrupts;
bool accurateSinglePrecision;
};

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@ -70,7 +70,6 @@ using namespace Gen;
{
LOG(DYNA_REC, "JIT Statistics =======================");
LOG(DYNA_REC, "Number of blocks currently: %i", numBlocks);
LOG(DYNA_REC, "Code cache size: %i b", GetCodePtr() - codeCache);
LOG(DYNA_REC, "======================================");
}

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@ -14,6 +14,7 @@
// Official SVN repository and contact information can be found at
// http://code.google.com/p/dolphin-emu/
#include "../PowerPC.h"
#include "../PPCTables.h"
#include "../PPCAnalyst.h"
@ -22,12 +23,9 @@
#include "JitAsm.h"
#include "JitRegCache.h"
using namespace Gen;
using namespace PowerPC;
void RegCache::Start(PPCAnalyst::BlockRegStats &stats)
{
for (int i = 0; i < NUMXREGS; i++)

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@ -148,4 +148,3 @@
};
#endif

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@ -202,6 +202,7 @@
if (!merge_branch) {
// Keep the normal code separate for clarity.
CMP(32, gpr.R(a), comparand);
FixupBranch pLesser = J_CC(less_than);
FixupBranch pGreater = J_CC(greater_than);
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2)); // _x86Reg == 0
@ -216,42 +217,45 @@
} else {
int test_bit = 8 >> (js.next_inst.BI & 3);
bool condition = (js.next_inst.BO & 8) ? false : true;
u32 destination;
if (js.next_inst.AA)
destination = SignExt16(js.next_inst.BD << 2);
else
destination = js.next_compilerPC + SignExt16(js.next_inst.BD << 2);
CMP(32, gpr.R(a), comparand);
gpr.UnlockAll();
u32 destination1;
if (js.next_inst.AA)
destination1 = SignExt16(js.next_inst.BD << 2);
else
destination1 = js.next_compilerPC + SignExt16(js.next_inst.BD << 2);
u32 destination2 = js.next_compilerPC + 4;
// Test swapping (in the future, will be used to inline across branches the right way)
// if (rand() & 1)
// std::swap(destination1, destination2), condition = !condition;
gpr.Flush(FLUSH_ALL);
fpr.Flush(FLUSH_ALL);
FixupBranch pLesser = J_CC(less_than);
FixupBranch pGreater = J_CC(greater_than);
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2)); // _x86Reg == 0
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x2)); // == 0
FixupBranch continue1 = J();
SetJumpTarget(pGreater);
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x4)); // _x86Reg > 0
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x4)); // > 0
FixupBranch continue2 = J();
SetJumpTarget(pLesser);
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x8)); // _x86Reg < 0
MOV(8, M(&PowerPC::ppcState.cr_fast[crf]), Imm8(0x8)); // < 0
FixupBranch continue3;
if (!!(8 & test_bit) == condition) continue3 = J();
//if (!!(8 & test_bit) != condition) SetJumpTarget(continue3);
if (!!(4 & test_bit) != condition) SetJumpTarget(continue2);
if (!!(2 & test_bit) != condition) SetJumpTarget(continue1);
WriteExit(destination, 0);
WriteExit(destination1, 0);
if (!!(8 & test_bit) == condition) SetJumpTarget(continue3);
if (!!(4 & test_bit) == condition) SetJumpTarget(continue2);
if (!!(2 & test_bit) == condition) SetJumpTarget(continue1);
WriteExit(js.next_compilerPC + 4, 1);
WriteExit(destination2, 1);
js.cancel = true;
}

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@ -139,11 +139,18 @@ void Jit64::WriteFloatToConstRamAddress(const Gen::X64Reg& xmm_reg, u32 address)
void Jit64::ForceSinglePrecisionS(X64Reg xmm) {
// Most games don't need these. Zelda requires it though - some platforms get stuck without them.
if (jo.accurateSinglePrecision)
{
CVTSD2SS(xmm, R(xmm));
CVTSS2SD(xmm, R(xmm));
}
}
void Jit64::ForceSinglePrecisionP(X64Reg xmm) {
// Most games don't need these. Zelda requires it though - some platforms get stuck without them.
if (jo.accurateSinglePrecision)
{
CVTPD2PS(xmm, R(xmm));
CVTPS2PD(xmm, R(xmm));
}
}

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@ -313,6 +313,7 @@ bool Flatten(u32 address, int *realsize, BlockStats *st, BlockRegStats *gpa, Blo
code[i].inst = inst;
code[i].branchTo = -1;
code[i].branchToIndex = -1;
code[i].skip = false;
GekkoOPInfo *opinfo = GetOpInfo(inst);
if (opinfo)
numCycles += opinfo->numCyclesMinusOne + 1;
@ -345,6 +346,7 @@ bool Flatten(u32 address, int *realsize, BlockStats *st, BlockRegStats *gpa, Blo
}
else
{
code[i].skip = true;
address = destination;
}
}

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@ -49,6 +49,7 @@ struct CodeOp //16B
bool outputCR0;
bool outputCR1;
bool outputPS1;
bool skip; // followed BL-s for example
};
struct BlockStats