MMU: Make use of UPTE_Lo and UReg_SR in TranslatePageAddress()
Allows us to get rid of a bit of masking in exchange for stating the bits being accessed or written to directly.
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@ -1308,34 +1308,39 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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// TLB cache
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// This catches 99%+ of lookups in practice, so the actual page table entry code below doesn't
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// benefit much from optimization.
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u32 translatedAddress = 0;
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TLBLookupResult res = LookupTLBPageAddress(flag, address, &translatedAddress, wi);
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u32 translated_address = 0;
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const TLBLookupResult res = LookupTLBPageAddress(flag, address, &translated_address, wi);
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if (res == TLBLookupResult::Found)
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{
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED,
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translatedAddress};
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translated_address};
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}
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u32 sr = PowerPC::ppcState.sr[EA_SR(address)];
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const auto sr = UReg_SR{ppcState.sr[EA_SR(address)]};
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if (sr & 0x80000000)
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if (sr.T != 0)
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return TranslateAddressResult{TranslateAddressResultEnum::DIRECT_STORE_SEGMENT, 0};
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// TODO: Handle KS/KP segment register flags.
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// No-execute segment register flag.
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if ((flag == XCheckTLBFlag::Opcode || flag == XCheckTLBFlag::OpcodeNoException) &&
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(sr & 0x10000000))
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if ((flag == XCheckTLBFlag::Opcode || flag == XCheckTLBFlag::OpcodeNoException) && sr.N != 0)
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{
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_FAULT, 0};
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}
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u32 offset = EA_Offset(address); // 12 bit
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u32 page_index = EA_PageIndex(address); // 16 bit
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u32 VSID = SR_VSID(sr); // 24 bit
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u32 api = EA_API(address); // 6 bit (part of page_index)
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const u32 offset = EA_Offset(address); // 12 bit
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const u32 page_index = EA_PageIndex(address); // 16 bit
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const u32 VSID = sr.VSID; // 24 bit
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const u32 api = EA_API(address); // 6 bit (part of page_index)
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// hash function no 1 "xor" .360
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u32 hash = (VSID ^ page_index);
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u32 pte1 = (VSID << 7) | api | PTE1_V;
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UPTE_Lo pte1;
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pte1.VSID = VSID;
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pte1.API = api;
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pte1.V = 1;
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for (int hash_func = 0; hash_func < 2; hash_func++)
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{
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@ -1343,7 +1348,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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if (hash_func == 1)
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{
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hash = ~hash;
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pte1 |= PTE1_H;
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pte1.H = 1;
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}
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u32 pteg_addr =
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@ -1353,7 +1358,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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{
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const u32 pteg = Memory::Read_U32(pteg_addr);
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if (pte1 == pteg)
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if (pte1.Hex == pteg)
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{
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UPTE_Hi pte2(Memory::Read_U32(pteg_addr + 4));
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