Merge pull request #4770 from degasus/fifo
CommandProcessor: Limit scope of ugly SCPFifoStruct.
This commit is contained in:
commit
ede9c6255a
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@ -486,4 +486,43 @@ void SetCpClearRegister()
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{
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{
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}
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}
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void HandleUnknownOpcode(u8 cmd_byte, void* buffer, bool preprocess)
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{
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// TODO(Omega): Maybe dump FIFO to file on this error
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PanicAlertT("GFX FIFO: Unknown Opcode (0x%02x @ %p, %s).\n"
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"This means one of the following:\n"
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"* The emulated GPU got desynced, disabling dual core can help\n"
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"* Command stream corrupted by some spurious memory bug\n"
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"* This really is an unknown opcode (unlikely)\n"
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"* Some other sort of bug\n\n"
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"Further errors will be sent to the Video Backend log and\n"
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"Dolphin will now likely crash or hang. Enjoy.",
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cmd_byte, buffer, preprocess ? "preprocess=true" : "preprocess=false");
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{
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PanicAlert("Illegal command %02x\n"
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"CPBase: 0x%08x\n"
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"CPEnd: 0x%08x\n"
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"CPHiWatermark: 0x%08x\n"
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"CPLoWatermark: 0x%08x\n"
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"CPReadWriteDistance: 0x%08x\n"
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"CPWritePointer: 0x%08x\n"
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"CPReadPointer: 0x%08x\n"
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"CPBreakpoint: 0x%08x\n"
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"bFF_GPReadEnable: %s\n"
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"bFF_BPEnable: %s\n"
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"bFF_BPInt: %s\n"
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"bFF_Breakpoint: %s\n"
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"bFF_GPLinkEnable: %s\n"
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"bFF_HiWatermarkInt: %s\n"
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"bFF_LoWatermarkInt: %s\n",
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cmd_byte, fifo.CPBase, fifo.CPEnd, fifo.CPHiWatermark, fifo.CPLoWatermark,
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fifo.CPReadWriteDistance, fifo.CPWritePointer, fifo.CPReadPointer, fifo.CPBreakpoint,
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fifo.bFF_GPReadEnable ? "true" : "false", fifo.bFF_BPEnable ? "true" : "false",
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fifo.bFF_BPInt ? "true" : "false", fifo.bFF_Breakpoint ? "true" : "false",
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fifo.bFF_GPLinkEnable ? "true" : "false", fifo.bFF_HiWatermarkInt ? "true" : "false",
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fifo.bFF_LoWatermarkInt ? "true" : "false");
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}
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}
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} // end of namespace CommandProcessor
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} // end of namespace CommandProcessor
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@ -15,7 +15,35 @@ class Mapping;
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namespace CommandProcessor
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namespace CommandProcessor
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{
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{
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extern SCPFifoStruct fifo; // This one is shared between gfx thread and emulator thread.
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struct SCPFifoStruct
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{
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// fifo registers
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volatile u32 CPBase;
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volatile u32 CPEnd;
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u32 CPHiWatermark;
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u32 CPLoWatermark;
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volatile u32 CPReadWriteDistance;
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volatile u32 CPWritePointer;
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volatile u32 CPReadPointer;
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volatile u32 CPBreakpoint;
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volatile u32 SafeCPReadPointer;
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volatile u32 bFF_GPLinkEnable;
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volatile u32 bFF_GPReadEnable;
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volatile u32 bFF_BPEnable;
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volatile u32 bFF_BPInt;
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volatile u32 bFF_Breakpoint;
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volatile u32 bFF_LoWatermarkInt;
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volatile u32 bFF_HiWatermarkInt;
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volatile u32 bFF_LoWatermark;
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volatile u32 bFF_HiWatermark;
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};
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// This one is shared between gfx thread and emulator thread.
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// It is only used by the Fifo and by the CommandProcessor.
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extern SCPFifoStruct fifo;
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// internal hardware addresses
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// internal hardware addresses
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enum
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enum
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@ -138,4 +166,6 @@ void SetCpClearRegister();
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void SetCpControlRegister();
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void SetCpControlRegister();
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void SetCpStatusRegister();
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void SetCpStatusRegister();
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void HandleUnknownOpcode(u8 cmd_byte, void* buffer, bool preprocess);
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} // namespace CommandProcessor
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} // namespace CommandProcessor
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@ -324,7 +324,7 @@ void RunGpuLoop()
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}
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}
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else
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else
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{
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{
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SCPFifoStruct& fifo = CommandProcessor::fifo;
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CommandProcessor::SCPFifoStruct& fifo = CommandProcessor::fifo;
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AsyncRequests::GetInstance()->PullEvents();
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AsyncRequests::GetInstance()->PullEvents();
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@ -414,7 +414,7 @@ void GpuMaySleep()
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bool AtBreakpoint()
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bool AtBreakpoint()
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{
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{
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SCPFifoStruct& fifo = CommandProcessor::fifo;
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CommandProcessor::SCPFifoStruct& fifo = CommandProcessor::fifo;
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return fifo.bFF_BPEnable && (fifo.CPReadPointer == fifo.CPBreakpoint);
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return fifo.bFF_BPEnable && (fifo.CPReadPointer == fifo.CPBreakpoint);
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}
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}
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@ -442,7 +442,7 @@ void RunGpu()
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static int RunGpuOnCpu(int ticks)
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static int RunGpuOnCpu(int ticks)
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{
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{
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SCPFifoStruct& fifo = CommandProcessor::fifo;
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CommandProcessor::SCPFifoStruct& fifo = CommandProcessor::fifo;
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bool reset_simd_state = false;
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bool reset_simd_state = false;
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int available_ticks = int(ticks * SConfig::GetInstance().fSyncGpuOverclock) + s_sync_ticks.load();
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int available_ticks = int(ticks * SConfig::GetInstance().fSyncGpuOverclock) + s_sync_ticks.load();
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while (fifo.bFF_GPReadEnable && fifo.CPReadWriteDistance && !AtBreakpoint() &&
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while (fifo.bFF_GPReadEnable && fifo.CPReadWriteDistance && !AtBreakpoint() &&
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@ -75,47 +75,6 @@ static void InterpretDisplayListPreprocess(u32 address, u32 size)
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}
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}
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}
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}
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static void UnknownOpcode(u8 cmd_byte, void* buffer, bool preprocess)
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{
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// TODO(Omega): Maybe dump FIFO to file on this error
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PanicAlertT("GFX FIFO: Unknown Opcode (0x%02x @ %p, %s).\n"
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"This means one of the following:\n"
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"* The emulated GPU got desynced, disabling dual core can help\n"
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"* Command stream corrupted by some spurious memory bug\n"
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"* This really is an unknown opcode (unlikely)\n"
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"* Some other sort of bug\n\n"
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"Further errors will be sent to the Video Backend log and\n"
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"Dolphin will now likely crash or hang. Enjoy.",
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cmd_byte, buffer, preprocess ? "preprocess=true" : "preprocess=false");
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{
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SCPFifoStruct& fifo = CommandProcessor::fifo;
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PanicAlert("Illegal command %02x\n"
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"CPBase: 0x%08x\n"
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"CPEnd: 0x%08x\n"
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"CPHiWatermark: 0x%08x\n"
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"CPLoWatermark: 0x%08x\n"
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"CPReadWriteDistance: 0x%08x\n"
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"CPWritePointer: 0x%08x\n"
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"CPReadPointer: 0x%08x\n"
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"CPBreakpoint: 0x%08x\n"
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"bFF_GPReadEnable: %s\n"
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"bFF_BPEnable: %s\n"
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"bFF_BPInt: %s\n"
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"bFF_Breakpoint: %s\n"
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"bFF_GPLinkEnable: %s\n"
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"bFF_HiWatermarkInt: %s\n"
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"bFF_LoWatermarkInt: %s\n",
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cmd_byte, fifo.CPBase, fifo.CPEnd, fifo.CPHiWatermark, fifo.CPLoWatermark,
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fifo.CPReadWriteDistance, fifo.CPWritePointer, fifo.CPReadPointer, fifo.CPBreakpoint,
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fifo.bFF_GPReadEnable ? "true" : "false", fifo.bFF_BPEnable ? "true" : "false",
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fifo.bFF_BPInt ? "true" : "false", fifo.bFF_Breakpoint ? "true" : "false",
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fifo.bFF_GPLinkEnable ? "true" : "false", fifo.bFF_HiWatermarkInt ? "true" : "false",
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fifo.bFF_LoWatermarkInt ? "true" : "false");
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}
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}
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void Init()
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void Init()
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{
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{
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s_bFifoErrorSeen = false;
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s_bFifoErrorSeen = false;
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@ -277,7 +236,7 @@ u8* Run(DataReader src, u32* cycles, bool in_display_list)
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else
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else
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{
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{
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if (!s_bFifoErrorSeen)
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if (!s_bFifoErrorSeen)
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UnknownOpcode(cmd_byte, opcodeStart, is_preprocess);
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CommandProcessor::HandleUnknownOpcode(cmd_byte, opcodeStart, is_preprocess);
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ERROR_LOG(VIDEO, "FIFO: Unknown Opcode(0x%02x @ %p, preprocessing = %s)", cmd_byte,
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ERROR_LOG(VIDEO, "FIFO: Unknown Opcode(0x%02x @ %p, preprocessing = %s)", cmd_byte,
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opcodeStart, is_preprocess ? "yes" : "no");
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opcodeStart, is_preprocess ? "yes" : "no");
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s_bFifoErrorSeen = true;
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s_bFifoErrorSeen = true;
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@ -31,32 +31,6 @@ enum class EFBAccessType
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PokeColor
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PokeColor
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};
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};
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struct SCPFifoStruct
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{
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// fifo registers
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volatile u32 CPBase;
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volatile u32 CPEnd;
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u32 CPHiWatermark;
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u32 CPLoWatermark;
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volatile u32 CPReadWriteDistance;
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volatile u32 CPWritePointer;
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volatile u32 CPReadPointer;
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volatile u32 CPBreakpoint;
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volatile u32 SafeCPReadPointer;
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volatile u32 bFF_GPLinkEnable;
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volatile u32 bFF_GPReadEnable;
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volatile u32 bFF_BPEnable;
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volatile u32 bFF_BPInt;
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volatile u32 bFF_Breakpoint;
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volatile u32 bFF_LoWatermarkInt;
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volatile u32 bFF_HiWatermarkInt;
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volatile u32 bFF_LoWatermark;
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volatile u32 bFF_HiWatermark;
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};
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class VideoBackendBase
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class VideoBackendBase
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{
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{
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public:
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public:
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