[AArch64] Change the vertex loader over to using unscaled loadstores.
In nearly all direct loadstore cases we can use unscaled loadstores. Still have a fallback in case we hit a situation that we /can't/ do a unscaled loadstore.
This commit is contained in:
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120df4c688
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ed008c3a69
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@ -2,7 +2,6 @@
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "VideoCommon/VertexLoaderARM64.h"
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using namespace Arm64Gen;
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@ -78,26 +77,40 @@ void VertexLoaderARM64::GetVertexAddr(int array, u64 attribute, ARM64Reg reg)
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s32 VertexLoaderARM64::GetAddressImm(int array, u64 attribute, Arm64Gen::ARM64Reg reg, u32 align)
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{
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if (attribute & MASK_INDEXED || (m_src_ofs & (align - 1)))
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if (attribute & MASK_INDEXED ||
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(m_src_ofs > 255 && (m_src_ofs & (align - 1))))
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GetVertexAddr(array, attribute, reg);
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else
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return m_src_ofs;
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return -1;
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}
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int VertexLoaderARM64::ReadVertex(u64 attribute, int format, int count_in, int count_out, bool dequantize, u8 scaling_exponent, AttributeFormat* native_format)
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int VertexLoaderARM64::ReadVertex(u64 attribute, int format, int count_in, int count_out, bool dequantize, u8 scaling_exponent, AttributeFormat* native_format, s32 offset)
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{
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ARM64Reg coords = count_in == 3 ? Q31 : D31;
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ARM64Reg scale = count_in == 3 ? Q30 : D30;
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int elem_size = 1 << (format / 2);
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int load_bytes = elem_size * count_in;
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int load_size = load_bytes == 1 ? 1 : load_bytes <= 2 ? 2 : load_bytes <= 4 ? 4 : load_bytes <= 8 ? 8 : 16;
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load_size <<= 3;
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elem_size <<= 3;
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if (count_in == 1)
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m_float_emit.LDR(elem_size, INDEX_UNSIGNED, coords, EncodeRegTo64(scratch1_reg), 0);
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if (offset == -1)
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{
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if (count_in == 1)
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m_float_emit.LDR(elem_size, INDEX_UNSIGNED, coords, EncodeRegTo64(scratch1_reg), 0);
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else
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m_float_emit.LD1(elem_size, 1, coords, EncodeRegTo64(scratch1_reg));
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}
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else if (offset & (load_size - 1)) // Not aligned - unscaled
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{
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m_float_emit.LDUR(load_size, coords, src_reg, offset);
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}
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else
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m_float_emit.LD1(elem_size, 1, coords, EncodeRegTo64(scratch1_reg));
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{
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m_float_emit.LDR(load_size, INDEX_UNSIGNED, coords, src_reg, offset);
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}
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if (format != FORMAT_FLOAT)
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{
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@ -137,10 +150,13 @@ int VertexLoaderARM64::ReadVertex(u64 attribute, int format, int count_in, int c
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const u32 write_size = count_out == 3 ? 128 : count_out * 32;
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const u32 mask = count_out == 3 ? 0xF : count_out == 2 ? 0x7 : 0x3;
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if (!(m_dst_ofs & mask))
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if (m_dst_ofs < 256)
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{
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m_float_emit.STUR(write_size, coords, dst_reg, m_dst_ofs);
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}
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else if (!(m_dst_ofs & mask))
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{
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m_float_emit.STR(write_size, INDEX_UNSIGNED, coords, dst_reg, m_dst_ofs);
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}
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else
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{
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@ -171,8 +187,10 @@ void VertexLoaderARM64::ReadColor(u64 attribute, int format, s32 offset)
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case FORMAT_32B_8888:
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if (offset == -1)
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LDR(INDEX_UNSIGNED, scratch2_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 3) // Not aligned - unscaled
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LDUR(scratch2_reg, src_reg, offset);
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else
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LDR(INDEX_UNSIGNED, scratch2_reg, src_reg, m_src_ofs);
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LDR(INDEX_UNSIGNED, scratch2_reg, src_reg, offset);
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if (format != FORMAT_32B_8888)
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ORR(scratch2_reg, scratch2_reg, 8, 7); // 0xFF000000
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@ -185,8 +203,10 @@ void VertexLoaderARM64::ReadColor(u64 attribute, int format, s32 offset)
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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LDRH(INDEX_UNSIGNED, scratch3_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 1) // Not aligned - unscaled
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LDURH(scratch2_reg, src_reg, offset);
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else
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LDRH(INDEX_UNSIGNED, scratch3_reg, src_reg, m_src_ofs);
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LDRH(INDEX_UNSIGNED, scratch3_reg, src_reg, offset);
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REV16(scratch3_reg, scratch3_reg);
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@ -220,8 +240,10 @@ void VertexLoaderARM64::ReadColor(u64 attribute, int format, s32 offset)
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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LDRH(INDEX_UNSIGNED, scratch3_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 1) // Not aligned - unscaled
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LDURH(scratch2_reg, src_reg, offset);
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else
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LDRH(INDEX_UNSIGNED, scratch3_reg, src_reg, m_src_ofs);
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LDRH(INDEX_UNSIGNED, scratch3_reg, src_reg, offset);
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// R
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UBFM(scratch1_reg, scratch3_reg, 4, 7);
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@ -250,6 +272,8 @@ void VertexLoaderARM64::ReadColor(u64 attribute, int format, s32 offset)
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// AAAAAAAA BBBBBBBB GGGGGGGG RRRRRRRR
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if (offset == -1)
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LDR(INDEX_UNSIGNED, scratch3_reg, EncodeRegTo64(scratch1_reg), 0);
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else if (offset & 3) // Not aligned - unscaled
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LDUR(scratch2_reg, src_reg, offset);
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else
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LDR(INDEX_UNSIGNED, scratch3_reg, src_reg, m_src_ofs);
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@ -338,27 +362,47 @@ void VertexLoaderARM64::GenerateVertexLoader()
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texmatidx_ofs[i] = m_src_ofs++;
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}
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GetVertexAddr(ARRAY_POSITION, m_VtxDesc.Position, EncodeRegTo64(scratch1_reg));
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ReadVertex(m_VtxDesc.Position, m_VtxAttr.PosFormat, m_VtxAttr.PosElements + 2, 3,
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m_VtxAttr.ByteDequant, m_VtxAttr.PosFrac, &m_native_vtx_decl.position);
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// Position
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{
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int elem_size = 1 << (m_VtxAttr.PosFormat / 2);
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int load_bytes = elem_size * (m_VtxAttr.PosElements + 2);
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int load_size = load_bytes == 1 ? 1 : load_bytes <= 2 ? 2 : load_bytes <= 4 ? 4 : load_bytes <= 8 ? 8 : 16;
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load_size <<= 3;
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s32 offset = GetAddressImm(ARRAY_POSITION, m_VtxDesc.Position, EncodeRegTo64(scratch1_reg), load_size);
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ReadVertex(m_VtxDesc.Position, m_VtxAttr.PosFormat, m_VtxAttr.PosElements + 2, 3,
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m_VtxAttr.ByteDequant, m_VtxAttr.PosFrac, &m_native_vtx_decl.position, offset);
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}
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if (m_VtxDesc.Normal)
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{
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static const u8 map[8] = {7, 6, 15, 14};
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u8 scaling_exponent = map[m_VtxAttr.NormalFormat];
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s32 offset = -1;
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for (int i = 0; i < (m_VtxAttr.NormalElements ? 3 : 1); i++)
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{
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if (!i || m_VtxAttr.NormalIndex3)
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{
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GetVertexAddr(ARRAY_NORMAL, m_VtxDesc.Normal, EncodeRegTo64(scratch1_reg));
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int elem_size = 1 << (m_VtxAttr.NormalFormat / 2);
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ADD(EncodeRegTo64(scratch1_reg), EncodeRegTo64(scratch1_reg), i * elem_size * 3);
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int load_bytes = elem_size * 3;
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int load_size = load_bytes == 1 ? 1 : load_bytes <= 2 ? 2 : load_bytes <= 4 ? 4 : load_bytes <= 8 ? 8 : 16;
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offset = GetAddressImm(ARRAY_NORMAL, m_VtxDesc.Normal, EncodeRegTo64(scratch1_reg), load_size << 3);
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if (offset == -1)
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ADD(EncodeRegTo64(scratch1_reg), EncodeRegTo64(scratch1_reg), i * elem_size * 3);
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else
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offset += i * elem_size * 3;
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}
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int bytes_read = ReadVertex(m_VtxDesc.Normal, m_VtxAttr.NormalFormat, 3, 3,
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true, scaling_exponent, &m_native_vtx_decl.normals[i]);
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true, scaling_exponent, &m_native_vtx_decl.normals[i], offset);
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ADD(EncodeRegTo64(scratch1_reg), EncodeRegTo64(scratch1_reg), bytes_read);
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if (offset == -1)
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ADD(EncodeRegTo64(scratch1_reg), EncodeRegTo64(scratch1_reg), bytes_read);
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else
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offset += bytes_read;
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}
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m_native_components |= VB_HAS_NRM0;
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@ -407,10 +451,16 @@ void VertexLoaderARM64::GenerateVertexLoader()
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if (tc[i])
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{
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m_native_components |= VB_HAS_UV0 << i;
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GetVertexAddr(ARRAY_TEXCOORD0 + i, tc[i], EncodeRegTo64(scratch1_reg));
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int elem_size = 1 << (m_VtxAttr.texCoord[i].Format / 2);
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int load_bytes = elem_size * (elements + 2);
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int load_size = load_bytes == 1 ? 1 : load_bytes <= 2 ? 2 : load_bytes <= 4 ? 4 : load_bytes <= 8 ? 8 : 16;
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load_size <<= 3;
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s32 offset = GetAddressImm(ARRAY_TEXCOORD0 + i, tc[i], EncodeRegTo64(scratch1_reg), load_size);
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u8 scaling_exponent = m_VtxAttr.texCoord[i].Frac;
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ReadVertex(tc[i], m_VtxAttr.texCoord[i].Format, elements, tm[i] ? 2 : elements,
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m_VtxAttr.ByteDequant, scaling_exponent, &m_native_vtx_decl.texcoords[i]);
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m_VtxAttr.ByteDequant, scaling_exponent, &m_native_vtx_decl.texcoords[i], offset);
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}
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if (tm[i])
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{
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@ -432,20 +482,24 @@ void VertexLoaderARM64::GenerateVertexLoader()
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{
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m_native_vtx_decl.texcoords[i].offset = m_dst_ofs;
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if (!(m_dst_ofs & 7))
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if (m_dst_ofs < 256)
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{
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STUR(SP, dst_reg, m_dst_ofs);
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}
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else if (!(m_dst_ofs & 7))
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{
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// If m_dst_ofs isn't 8byte aligned we can't store an 8byte zero register
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// So store two 4byte zero registers
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// The destination is always 4byte aligned
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STR(INDEX_UNSIGNED, WSP, dst_reg, m_dst_ofs);
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STR(INDEX_UNSIGNED, WSP, dst_reg, m_dst_ofs + 4);
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m_float_emit.STR(32, INDEX_UNSIGNED, D31, dst_reg, m_dst_ofs + 8);
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}
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else
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{
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STR(INDEX_UNSIGNED, SP, dst_reg, m_dst_ofs);
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m_float_emit.STR(32, INDEX_UNSIGNED, D31, dst_reg, m_dst_ofs + 8);
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}
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m_float_emit.STR(32, INDEX_UNSIGNED, D31, dst_reg, m_dst_ofs + 8);
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m_dst_ofs += sizeof(float) * 3;
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}
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}
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@ -23,7 +23,7 @@ private:
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Arm64Gen::ARM64FloatEmitter m_float_emit;
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void GetVertexAddr(int array, u64 attribute, Arm64Gen::ARM64Reg reg);
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s32 GetAddressImm(int array, u64 attribute, Arm64Gen::ARM64Reg reg, u32 align);
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int ReadVertex(u64 attribute, int format, int count_in, int count_out, bool dequantize, u8 scaling_exponent, AttributeFormat* native_format);
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int ReadVertex(u64 attribute, int format, int count_in, int count_out, bool dequantize, u8 scaling_exponent, AttributeFormat* native_format, s32 offset = -1);
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void ReadColor(u64 attribute, int format, s32 offset);
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void GenerateVertexLoader();
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};
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