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Interpreter: Fix cycle counting inconsistency between debug mode and regular mode loops.

This commit is contained in:
Admiral H. Curtiss 2021-12-28 05:48:33 +01:00
parent 8d237eb102
commit ebe27e0140
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GPG Key ID: F051B4C4044F33FB
1 changed files with 4 additions and 4 deletions
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8
Source/Core/Core/PowerPC/Interpreter/Interpreter.cpp
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@ -260,8 +260,8 @@ void Interpreter::Run()
while (PowerPC::ppcState.downcount > 0) while (PowerPC::ppcState.downcount > 0)
{ {
m_end_block = false; m_end_block = false;
int i; int cycles = 0;
for (i = 0; !m_end_block; i++) while (!m_end_block)
{ {
#ifdef SHOW_HISTORY #ifdef SHOW_HISTORY
s_pc_vec.push_back(PC); s_pc_vec.push_back(PC);
@ -301,9 +301,9 @@ void Interpreter::Run()
Host_UpdateDisasmDialog(); Host_UpdateDisasmDialog();
return; return;
} }
SingleStepInner(); cycles += SingleStepInner();
} }
PowerPC::ppcState.downcount -= i; PowerPC::ppcState.downcount -= cycles;
} }
} }
else else