Merge pull request #10455 from Pokechu22/directly-map-fifo-breakpoint
CommandProcessor: Add FIFO_BP_LO/HI to directly_mapped_vars
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commit
eb98bcd2ae
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@ -121,11 +121,6 @@ void DoState(PointerWrap& p)
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p.Do(s_interrupt_waiting);
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}
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static inline void WriteLow(std::atomic<u32>& reg, u16 lowbits)
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{
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reg.store((reg.load(std::memory_order_relaxed) & 0xFFFF0000) | lowbits,
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std::memory_order_relaxed);
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}
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static inline void WriteHigh(std::atomic<u32>& reg, u16 highbits)
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{
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reg.store((reg.load(std::memory_order_relaxed) & 0x0000FFFF) | (static_cast<u32>(highbits) << 16),
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@ -205,6 +200,8 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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{FIFO_WRITE_POINTER_HI, MMIO::Utils::HighPart(&fifo.CPWritePointer), false,
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WMASK_HI_RESTRICT},
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// FIFO_READ_POINTER has different code for single/dual core.
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{FIFO_BP_LO, MMIO::Utils::LowPart(&fifo.CPBreakpoint), false, WMASK_LO_ALIGN_32BIT},
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{FIFO_BP_HI, MMIO::Utils::HighPart(&fifo.CPBreakpoint), false, WMASK_HI_RESTRICT},
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};
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for (auto& mapped_var : directly_mapped_vars)
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@ -214,16 +211,6 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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MMIO::DirectWrite<u16>(mapped_var.ptr, mapped_var.wmask));
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}
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mmio->Register(base | FIFO_BP_LO, MMIO::DirectRead<u16>(MMIO::Utils::LowPart(&fifo.CPBreakpoint)),
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MMIO::ComplexWrite<u16>([](u32, u16 val) {
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WriteLow(fifo.CPBreakpoint, val & WMASK_LO_ALIGN_32BIT);
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}));
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mmio->Register(base | FIFO_BP_HI,
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MMIO::DirectRead<u16>(MMIO::Utils::HighPart(&fifo.CPBreakpoint)),
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MMIO::ComplexWrite<u16>([WMASK_HI_RESTRICT](u32, u16 val) {
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WriteHigh(fifo.CPBreakpoint, val & WMASK_HI_RESTRICT);
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}));
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// Timing and metrics MMIOs are stubbed with fixed values.
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struct
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{
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