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DSPCore: Make ExceptionType an enum class 

Makes the values strongly typed and avoids polluting the DSP namespace.
This commit is contained in:
Lioncash 2018-06-17 17:42:50 -04:00
parent 8459d2bc5d
commit eb76dc9600
2 changed files with 14 additions and 12 deletions
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10
Source/Core/Core/DSP/DSPCore.cpp
View File

@ -8,6 +8,7 @@
#include <algorithm>
#include <array>
#include <memory>
#include <type_traits>
#include "Common/CommonTypes.h"
#include "Common/Event.h"
@ -118,7 +119,7 @@ class LLEAccelerator final : public Accelerator
protected:
u8 ReadMemory(u32 address) override { return Host::ReadHostMemory(address); }
void WriteMemory(u32 address, u8 value) override { Host::WriteHostMemory(value, address); }
void OnEndException() override { DSPCore_SetException(EXP_ACCOV); }
void OnEndException() override { DSPCore_SetException(ExceptionType::AcceleratorOverflow); }
};
bool DSPCore_Init(const DSPInitOptions& opts)
@ -204,7 +205,7 @@ void DSPCore_Reset()
void DSPCore_SetException(ExceptionType exception)
{
g_dsp.exceptions |= 1 << exception;
g_dsp.exceptions |= 1 << static_cast<std::underlying_type_t<ExceptionType>>(exception);
}
// Notify that an external interrupt is pending (used by thread mode)
@ -220,7 +221,7 @@ void DSPCore_CheckExternalInterrupt()
return;
// Signal the SPU about new mail
DSPCore_SetException(EXP_INT);
DSPCore_SetException(ExceptionType::ExternalInterrupt);
g_dsp.cr &= ~CR_EXTERNAL_INT;
}
@ -236,7 +237,8 @@ void DSPCore_CheckExceptions()
// Seems exp int are not masked by sr_int_enable
if (g_dsp.exceptions & (1 << i))
{
if (Interpreter::dsp_SR_is_flag_set(SR_INT_ENABLE) || (i == EXP_INT))
if (Interpreter::dsp_SR_is_flag_set(SR_INT_ENABLE) ||
i == static_cast<int>(ExceptionType::ExternalInterrupt))
{
// store pc and sr until RTI
dsp_reg_store_stack(StackRegister::Call, g_dsp.pc);

16
Source/Core/Core/DSP/DSPCore.h
View File

@ -208,15 +208,15 @@ enum : u16
};
// Exception vectors
enum ExceptionType : int
enum class ExceptionType
{
EXP_STOVF = 1, // 0x0002 stack under/over flow
EXP_2 = 2, // 0x0004
EXP_3 = 3, // 0x0006
EXP_4 = 4, // 0x0008
EXP_ACCOV = 5, // 0x000a accelerator address overflow
EXP_6 = 6, // 0x000c
EXP_INT = 7 // 0x000e external int (message from CPU)
StackOverflow = 1, // 0x0002 stack under/over flow
EXP_2 = 2, // 0x0004
EXP_3 = 3, // 0x0006
EXP_4 = 4, // 0x0008
AcceleratorOverflow = 5, // 0x000a accelerator address overflow
EXP_6 = 6, // 0x000c
ExternalInterrupt = 7 // 0x000e external int (message from CPU)
};
struct DSP_Regs