From e6d78bcf3c284fd379ec67d10b0fdcf28460b06a Mon Sep 17 00:00:00 2001 From: nakeee Date: Tue, 30 Jun 2009 17:33:38 +0000 Subject: [PATCH] DSPLLE some more exception clean up, still couldn't get zelda to work:( git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3623 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/Core/Src/HW/DSP.cpp | 16 +++++++++------- Source/Core/DSPCore/Src/DSPAccelerator.cpp | 10 +++++----- Source/Core/DSPCore/Src/DSPCore.cpp | 4 ++-- Source/Core/DSPCore/Src/DSPCore.h | 9 +++++++++ Source/Core/DSPCore/Src/DSPHWInterface.cpp | 6 +++--- 5 files changed, 28 insertions(+), 17 deletions(-) diff --git a/Source/Core/Core/Src/HW/DSP.cpp b/Source/Core/Core/Src/HW/DSP.cpp index 2b1435311d..e7a649a99a 100644 --- a/Source/Core/Core/Src/HW/DSP.cpp +++ b/Source/Core/Core/Src/HW/DSP.cpp @@ -21,14 +21,16 @@ // that is, 4 bytes at 32 khz, which is 32 bytes at 4 khz. We thereforce schedule an // event that runs at 4khz, that eats audio from the fifo. Thus, we have homebrew audio. -// The AID interrupt is set when the fifo STARTS a transfer. It latches address and count -// into internal registers and starts copying. This means that the interrupt handler can simply -// set the registers to where the next buffer is, and start filling it. When the DMA is complete, -// it will automatically relatch and fire a new interrupt. +// The AID interrupt is set when the fifo STARTS a transfer. It latches address +// and count into internal registers and starts copying. This means that the +// interrupt handler can simply set the registers to where the next buffer is, +// and start filling it. When the DMA is complete, it will automatically +// relatch and fire a new interrupt. -// Then there's the DSP... what likely happens is that the fifo-latched-interrupt handler -// kicks off the DSP, requesting it to fill up the just used buffer through the AXList (or -// whatever it might be called in Nintendo games). +// Then there's the DSP... what likely happens is that the +// fifo-latched-interrupt handler kicks off the DSP, requesting it to fill up +// the just used buffer through the AXList (or whatever it might be called in +// Nintendo games). #include "DSP.h" diff --git a/Source/Core/DSPCore/Src/DSPAccelerator.cpp b/Source/Core/DSPCore/Src/DSPAccelerator.cpp index 5a3441c420..61faef389f 100644 --- a/Source/Core/DSPCore/Src/DSPAccelerator.cpp +++ b/Source/Core/DSPCore/Src/DSPAccelerator.cpp @@ -143,12 +143,12 @@ u16 dsp_read_accelerator() Address = (gdsp_ifx_regs[DSP_ACSAH] << 16) | gdsp_ifx_regs[DSP_ACSAL]; // Do we really need both? - DSPCore_SetException(3); - DSPCore_SetException(5); + DSPCore_SetException(EXP_4); + DSPCore_SetException(EXP_ACCOV); - // Somehow, YN1 and YN2 must be initialized with their "loop" values, so yeah, - // it seems likely that we should raise an exception to let the DSP program do that, - // at least if DSP_FORMAT == 0x0A. + // Somehow, YN1 and YN2 must be initialized with their "loop" values, + // so yeah, it seems likely that we should raise an exception to let + // the DSP program do that, at least if DSP_FORMAT == 0x0A. } gdsp_ifx_regs[DSP_ACCAH] = Address >> 16; diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp index 35e7255039..437f24fac9 100644 --- a/Source/Core/DSPCore/Src/DSPCore.cpp +++ b/Source/Core/DSPCore/Src/DSPCore.cpp @@ -155,10 +155,10 @@ void DSPCore_CheckExternalInterrupt() // check if there is an external interrupt if (g_dsp.cr & CR_EXTERNAL_INT) { - if (dsp_SR_is_flag_set(SR_INT_ENABLE)) + if (dsp_SR_is_flag_set(SR_800) && dsp_SR_is_flag_set(SR_INT_ENABLE)) { // level 7 is the interrupt exception. is it? - DSPCore_SetException(7); + DSPCore_SetException(EXP_INT); g_dsp.cr &= ~CR_EXTERNAL_INT; } } diff --git a/Source/Core/DSPCore/Src/DSPCore.h b/Source/Core/DSPCore/Src/DSPCore.h index 2d88a8ccae..462dbc1a05 100644 --- a/Source/Core/DSPCore/Src/DSPCore.h +++ b/Source/Core/DSPCore/Src/DSPCore.h @@ -161,6 +161,15 @@ // This should be the bits affected by CMP. Does not include logic zero. #define SR_CMP_MASK 0x3f +// exceptions vector +#define EXP_RESET 0 // 0x0000 +#define EXP_STOVF 1 // 0x0002 stack under/over flow +#define EXP_4 2 // 0x0004 +#define EXP_6 3 // 0x0006 +#define EXP_8 4 // 0x0008 +#define EXP_ACCOV 5 // 0x000a accelerator address overflow +#define EXP_c 6 // 0x000c +#define EXP_INT 7 // 0x000e external int? (mail?) struct SDSP { diff --git a/Source/Core/DSPCore/Src/DSPHWInterface.cpp b/Source/Core/DSPCore/Src/DSPHWInterface.cpp index 5ef3f5e071..93399d83c1 100644 --- a/Source/Core/DSPCore/Src/DSPHWInterface.cpp +++ b/Source/Core/DSPCore/Src/DSPHWInterface.cpp @@ -81,7 +81,7 @@ void gdsp_mbox_write_h(u8 mbx, u16 val) DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc); } else { // mailbox - DSPCore_SetException(7); + // DSPCore_SetException(EXP_INT); } } @@ -101,7 +101,7 @@ void gdsp_mbox_write_l(u8 mbx, u16 val) DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc); } else { // mailbox - DSPCore_SetException(7); + DSPCore_SetException(EXP_INT); } } @@ -152,7 +152,7 @@ void gdsp_ifx_write(u16 addr, u16 val) break; case 0xd3: // ZeldaUnk (accelerator WRITE) - ERROR_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val); + DEBUG_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val); dsp_write_aram_d3(val); break;