[ARM] slwx/srwx/srawx implementations.

This commit is contained in:
Ryan Houdek 2013-09-14 09:07:34 +00:00
parent 81d7986202
commit e56071f2be
2 changed files with 37 additions and 4 deletions

View File

@ -219,6 +219,7 @@ void JitArm::arith(UGeckoInstruction inst)
case 31: // addcx, addx, subfx
switch(inst.SUBOP10)
{
case 24: // slwx
case 28: // andx
case 60: // andcx
case 124: // norx
@ -227,6 +228,8 @@ void JitArm::arith(UGeckoInstruction inst)
case 412: // orcx
case 444: // orx
case 476: // nandx
case 536: // srwx
case 792: // srawx
if (gpr.IsImm(s))
{
isImm[0] = true;
@ -239,6 +242,7 @@ void JitArm::arith(UGeckoInstruction inst)
}
Rc = inst.Rc;
break;
case 10: // addcx
carry = true;
case 40: // subfx
@ -302,6 +306,10 @@ void JitArm::arith(UGeckoInstruction inst)
case 31: // addcx, addx, subfx
switch(inst.SUBOP10)
{
case 24:
gpr.SetImmediate(a, Imm[0] << Imm[1]);
dest = a;
break;
case 28:
gpr.SetImmediate(a, And(Imm[0], Imm[1]));
dest = a;
@ -340,6 +348,14 @@ void JitArm::arith(UGeckoInstruction inst)
gpr.SetImmediate(a, ~And(Imm[1], Imm[0]));
dest = a;
break;
case 536:
gpr.SetImmediate(a, Imm[0] >> Imm[1]);
dest = a;
break;
case 792:
gpr.SetImmediate(a, ((s32)Imm[0]) >> Imm[1]);
dest = a;
break;
case 10: // addcx
case 266:
case 778: // both addx
@ -428,6 +444,12 @@ void JitArm::arith(UGeckoInstruction inst)
case 31:
switch(inst.SUBOP10)
{
case 24:
RA = gpr.R(a);
RS = gpr.R(s);
RB = gpr.R(b);
LSLS(RA, RS, RB);
break;
case 28:
RA = gpr.R(a);
RS = gpr.R(s);
@ -496,7 +518,18 @@ void JitArm::arith(UGeckoInstruction inst)
AND(RA, RS, RB);
MVNS(RA, RA);
break;
case 536:
RA = gpr.R(a);
RS = gpr.R(s);
RB = gpr.R(b);
LSRS(RA, RS, RB);
break;
case 792:
RA = gpr.R(a);
RS = gpr.R(s);
RB = gpr.R(b);
ASRS(RA, RS, RB);
break;
case 10: // addcx
case 266:
case 778: // both addx

View File

@ -207,10 +207,10 @@ static GekkoOPTemplate table31[] =
{26, &JitArm::cntlzwx}, //"cntlzwx",OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}},
{922, &JitArm::extshx}, //"extshx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}},
{954, &JitArm::extsbx}, //"extsbx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_S | FL_RC_BIT}},
{536, &JitArm::Default}, //"srwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{792, &JitArm::Default}, //"srawx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{536, &JitArm::arith}, //"srwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{792, &JitArm::arith}, //"srawx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{824, &JitArm::srawix}, //"srawix", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{24, &JitArm::Default}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{24, &JitArm::arith}, //"slwx", OPTYPE_INTEGER, FL_OUT_A | FL_IN_B | FL_IN_S | FL_RC_BIT}},
{54, &JitArm::dcbst}, //"dcbst", OPTYPE_DCACHE, 0, 4}},
{86, &JitArm::Default}, //"dcbf", OPTYPE_DCACHE, 0, 4}},