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Some more work on stwcxd and lwarx 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1389 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
XTra.KrazzY 2008-12-04 05:53:10 +00:00
parent 15e3fbc299
commit e3fb58769c
1 changed files with 29 additions and 16 deletions
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41
Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp
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@ -579,30 +579,43 @@ void stwbrx(UGeckoInstruction _inst)
}
// The following two instructions are for inter-cpu communications. On a single CPU, they cannot
// fail unless an interrupt happens in between, which usually won't happen with the JIT, so we just pretend
// they are regular loads and stores for now. If this proves to be a problem, we could add a reservation flag.
// The following two instructions are for inter-cpu communications. On a single
// CPU, they cannot
// fail unless an interrupt happens in between, which usually won't happen with
// the JIT.
bool g_bReserve = false;
u32 g_reserveAddr;
void lwarx(UGeckoInstruction _inst)
{
m_GPR[_inst.RD] = Memory::Read_U32(Helper_Get_EA_X(_inst));
//static bool bFirst = true;
//if (bFirst)
// MessageBox(NULL, "lwarx", "Instruction unimplemented", MB_OK);
//bFirst = false;
u32 uAddress = Helper_Get_EA_X(_inst);
m_GPR[_inst.RD] = Memory::Read_U32(uAddress);
g_bReserve = true;
g_reserveAddr = uAddress;
}
void stwcxd(UGeckoInstruction _inst)
{
// This instruction, too
static bool bFirst = true;
if (bFirst)
PanicAlert("stwcxd - suspicious instruction");
//PanicAlert("stwcxd - suspicious instruction");
// TODO: Stores Word Conditional indeXed
// Stores Word Conditional indeXed
bFirst = false;
u32 uAddress = Helper_Get_EA_X(_inst);
u32 uAddress;
if(g_bReserve) {
uAddress = Helper_Get_EA_X(_inst);
if(uAddress == g_reserveAddr) {
Memory::Write_U32(m_GPR[_inst.RS], uAddress);
g_bReserve = false;
return;
}
}
// TODO: Set CR0 to IS_XER_SO
}
void stwux(UGeckoInstruction _inst)