PowerPC: Convert enum in TranslateAddressResult to enum class.
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@ -99,18 +99,20 @@ static bool IsNoExceptionFlag(XCheckTLBFlag flag)
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return flag == XCheckTLBFlag::NoException || flag == XCheckTLBFlag::OpcodeNoException;
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return flag == XCheckTLBFlag::NoException || flag == XCheckTLBFlag::OpcodeNoException;
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}
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}
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enum class TranslateAddressResultEnum : u8
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{
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BAT_TRANSLATED,
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PAGE_TABLE_TRANSLATED,
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DIRECT_STORE_SEGMENT,
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PAGE_FAULT,
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};
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struct TranslateAddressResult
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struct TranslateAddressResult
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{
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{
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enum
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TranslateAddressResultEnum result;
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{
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BAT_TRANSLATED,
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PAGE_TABLE_TRANSLATED,
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DIRECT_STORE_SEGMENT,
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PAGE_FAULT
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} result;
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u32 address;
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u32 address;
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bool wi; // Set to true if the view of memory is either write-through or cache-inhibited
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bool wi; // Set to true if the view of memory is either write-through or cache-inhibited
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bool Success() const { return result <= PAGE_TABLE_TRANSLATED; }
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bool Success() const { return result <= TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED; }
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};
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};
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template <const XCheckTLBFlag flag>
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template <const XCheckTLBFlag flag>
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static TranslateAddressResult TranslateAddress(u32 address);
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static TranslateAddressResult TranslateAddress(u32 address);
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@ -444,7 +446,7 @@ TryReadInstResult TryReadInstruction(u32 address)
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else
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else
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{
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{
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address = tlb_addr.address;
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address = tlb_addr.address;
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from_bat = tlb_addr.result == TranslateAddressResult::BAT_TRANSLATED;
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from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED;
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}
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}
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}
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}
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@ -1023,14 +1025,14 @@ void ClearCacheLine(u32 address)
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if (MSR.DR)
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if (MSR.DR)
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{
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{
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auto translated_address = TranslateAddress<XCheckTLBFlag::Write>(address);
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auto translated_address = TranslateAddress<XCheckTLBFlag::Write>(address);
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if (translated_address.result == TranslateAddressResult::DIRECT_STORE_SEGMENT)
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if (translated_address.result == TranslateAddressResultEnum::DIRECT_STORE_SEGMENT)
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{
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{
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// dcbz to direct store segments is ignored. This is a little
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// dcbz to direct store segments is ignored. This is a little
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// unintuitive, but this is consistent with both console and the PEM.
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// unintuitive, but this is consistent with both console and the PEM.
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// Advance Game Port crashes if we don't emulate this correctly.
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// Advance Game Port crashes if we don't emulate this correctly.
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return;
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return;
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}
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}
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if (translated_address.result == TranslateAddressResult::PAGE_FAULT)
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if (translated_address.result == TranslateAddressResultEnum::PAGE_FAULT)
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{
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{
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// If translation fails, generate a DSI.
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// If translation fails, generate a DSI.
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GenerateDSIException(address, true);
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GenerateDSIException(address, true);
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@ -1099,7 +1101,7 @@ TranslateResult JitCache_TranslateAddress(u32 address)
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return TranslateResult{false, false, 0};
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return TranslateResult{false, false, 0};
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}
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}
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bool from_bat = tlb_addr.result == TranslateAddressResult::BAT_TRANSLATED;
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bool from_bat = tlb_addr.result == TranslateAddressResultEnum::BAT_TRANSLATED;
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return TranslateResult{true, from_bat, tlb_addr.address};
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return TranslateResult{true, from_bat, tlb_addr.address};
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}
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}
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@ -1343,12 +1345,13 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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u32 translatedAddress = 0;
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u32 translatedAddress = 0;
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TLBLookupResult res = LookupTLBPageAddress(flag, address, &translatedAddress, wi);
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TLBLookupResult res = LookupTLBPageAddress(flag, address, &translatedAddress, wi);
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if (res == TLBLookupResult::Found)
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if (res == TLBLookupResult::Found)
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return TranslateAddressResult{TranslateAddressResult::PAGE_TABLE_TRANSLATED, translatedAddress};
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED,
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translatedAddress};
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u32 sr = PowerPC::ppcState.sr[EA_SR(address)];
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u32 sr = PowerPC::ppcState.sr[EA_SR(address)];
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if (sr & 0x80000000)
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if (sr & 0x80000000)
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return TranslateAddressResult{TranslateAddressResult::DIRECT_STORE_SEGMENT, 0};
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return TranslateAddressResult{TranslateAddressResultEnum::DIRECT_STORE_SEGMENT, 0};
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// TODO: Handle KS/KP segment register flags.
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// TODO: Handle KS/KP segment register flags.
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@ -1356,7 +1359,7 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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if ((flag == XCheckTLBFlag::Opcode || flag == XCheckTLBFlag::OpcodeNoException) &&
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if ((flag == XCheckTLBFlag::Opcode || flag == XCheckTLBFlag::OpcodeNoException) &&
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(sr & 0x10000000))
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(sr & 0x10000000))
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{
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{
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return TranslateAddressResult{TranslateAddressResult::PAGE_FAULT, 0};
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_FAULT, 0};
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}
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}
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u32 offset = EA_Offset(address); // 12 bit
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u32 offset = EA_Offset(address); // 12 bit
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@ -1418,12 +1421,12 @@ static TranslateAddressResult TranslatePageAddress(const u32 address, const XChe
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*wi = (PTE2.WIMG & 0b1100) != 0;
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*wi = (PTE2.WIMG & 0b1100) != 0;
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return TranslateAddressResult{TranslateAddressResult::PAGE_TABLE_TRANSLATED,
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_TABLE_TRANSLATED,
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(PTE2.RPN << 12) | offset};
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(PTE2.RPN << 12) | offset};
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}
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}
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}
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}
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}
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}
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return TranslateAddressResult{TranslateAddressResult::PAGE_FAULT, 0};
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return TranslateAddressResult{TranslateAddressResultEnum::PAGE_FAULT, 0};
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}
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}
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static void UpdateBATs(BatTable& bat_table, u32 base_spr)
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static void UpdateBATs(BatTable& bat_table, u32 base_spr)
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@ -1583,7 +1586,7 @@ static TranslateAddressResult TranslateAddress(u32 address)
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bool wi = false;
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bool wi = false;
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if (TranslateBatAddess(IsOpcodeFlag(flag) ? ibat_table : dbat_table, &address, &wi))
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if (TranslateBatAddess(IsOpcodeFlag(flag) ? ibat_table : dbat_table, &address, &wi))
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return TranslateAddressResult{TranslateAddressResult::BAT_TRANSLATED, address, wi};
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return TranslateAddressResult{TranslateAddressResultEnum::BAT_TRANSLATED, address, wi};
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return TranslatePageAddress(address, flag, &wi);
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return TranslatePageAddress(address, flag, &wi);
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}
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}
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