From e1ddbdd214937e66db48db6f6c2579ffb58bd3d9 Mon Sep 17 00:00:00 2001 From: Pierre Bourdon Date: Sat, 16 Jun 2012 14:38:48 +0200 Subject: [PATCH] Use WriteExceptionExit and implement the change for JitIL --- Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp | 6 ++---- Source/Core/Core/Src/PowerPC/Jit64/Jit.h | 2 +- Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp | 3 ++- Source/Core/Core/Src/PowerPC/Jit64IL/IR.h | 4 ++-- Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp | 3 +++ .../Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp | 2 +- 6 files changed, 11 insertions(+), 9 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp index bc0e671f24..e1692076d1 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.cpp @@ -300,15 +300,13 @@ void Jit64::Cleanup() ABI_CallFunctionCCC((void *)&PowerPC::UpdatePerformanceMonitor, js.downcountAmount, jit->js.numLoadStoreInst, jit->js.numFloatingPointInst); } -void Jit64::WriteExit(u32 destination, int exit_num, bool force_ee_check) +void Jit64::WriteExit(u32 destination, int exit_num) { Cleanup(); // External exceptions are checked when the following instruction sets the <= 0 flag. // If we need to force the check, execute a useless SUB EAX, EAX SUB(32, M(&CoreTiming::downcount), js.downcountAmount > 127 ? Imm32(js.downcountAmount) : Imm8(js.downcountAmount)); - if (force_ee_check) - SUB(32, R(EAX), R(EAX)); //If nobody has taken care of this yet (this can be removed when all branches are done) JitBlock *b = js.curBlock; @@ -317,7 +315,7 @@ void Jit64::WriteExit(u32 destination, int exit_num, bool force_ee_check) // Link opportunity! int block = blocks.GetBlockNumberFromStartAddress(destination); - if (!force_ee_check && block >= 0 && jo.enableBlocklink) + if (block >= 0 && jo.enableBlocklink) { // It exists! Joy of joy! JMP(blocks.GetBlock(block)->checkedEntry, true); diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit.h b/Source/Core/Core/Src/PowerPC/Jit64/Jit.h index 08de7c4609..1ebd476134 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit.h +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit.h @@ -112,7 +112,7 @@ public: // Utilities for use by opcodes - void WriteExit(u32 destination, int exit_num, bool force_ee_check = false); + void WriteExit(u32 destination, int exit_num); void WriteExitDestInEAX(); void WriteExceptionExit(); void WriteExternalExceptionExit(); diff --git a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp index b68f4a926c..5cb7f0e13b 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64/Jit_SystemRegisters.cpp @@ -125,7 +125,8 @@ void Jit64::mtmsr(UGeckoInstruction inst) // Force an external exception when going out of mtmsr in order to check // immediately for interrupts that were delayed because of MSR.EE=0. - WriteExit(js.compilerPC + 4, 0, true); + MOV(32, M(&PC), Imm32(js.compilerPC + 4)); + WriteExceptionExit(); js.firstFPInstructionFound = false; } diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.h b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.h index 77f7d6977b..7fabd946f9 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR.h +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR.h @@ -276,8 +276,8 @@ public: InstLoc EmitLoadMSR() { return FoldZeroOp(LoadMSR, 0); } - InstLoc EmitStoreMSR(InstLoc val) { - return FoldUOp(StoreMSR, val); + InstLoc EmitStoreMSR(InstLoc val, InstLoc pc) { + return FoldBiOp(StoreMSR, val, pc); } InstLoc EmitStoreFPRF(InstLoc value) { return FoldUOp(StoreFPRF, value); diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp index e91291fa90..448f51d1c6 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp @@ -994,8 +994,11 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak break; } case StoreMSR: { + unsigned InstLoc = ibuild->GetImmValue(getOp2(I)); regStoreInstToConstLoc(RI, 32, getOp1(I), &MSR); regNormalRegClear(RI, I); + Jit->MOV(32, M(&PC), Imm32(InstLoc + 4)); + Jit->WriteExceptionExit(); break; } case StoreGQR: { diff --git a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp index f3e25dc2dd..ac914bec94 100644 --- a/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp +++ b/Source/Core/Core/Src/PowerPC/Jit64IL/JitIL_SystemRegisters.cpp @@ -106,7 +106,7 @@ void JitIL::mfspr(UGeckoInstruction inst) // -------------- void JitIL::mtmsr(UGeckoInstruction inst) { - ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS)); + ibuild.EmitStoreMSR(ibuild.EmitLoadGReg(inst.RS), ibuild.EmitIntConst(js.compilerPC)); ibuild.EmitBranchUncond(ibuild.EmitIntConst(js.compilerPC + 4)); } // ==============