[ARM] Disables loadstores with update because they are broken.
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@ -318,6 +318,7 @@ void JitArm::lXX(UGeckoInstruction inst)
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{
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{
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INSTRUCTION_START
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INSTRUCTION_START
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JITDISABLE(bJITLoadStoreOff)
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JITDISABLE(bJITLoadStoreOff)
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u32 a = inst.RA, b = inst.RB, d = inst.RD;
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u32 a = inst.RA, b = inst.RB, d = inst.RD;
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s32 offset = inst.SIMM_16;
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s32 offset = inst.SIMM_16;
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u32 accessSize = 0;
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u32 accessSize = 0;
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@ -401,9 +402,16 @@ void JitArm::lXX(UGeckoInstruction inst)
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accessSize = 16;
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accessSize = 16;
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break;
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break;
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}
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}
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if (update)
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{
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Default(inst);
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return;
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}
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// Check for exception before loading
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// Check for exception before loading
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ARMReg rA = gpr.GetReg(false);
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ARMReg rA = gpr.GetReg(false);
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LDR(rA, R9, PPCSTATE_OFF(Exceptions));
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LDR(rA, R9, PPCSTATE_OFF(Exceptions));
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CMP(rA, EXCEPTION_DSI);
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CMP(rA, EXCEPTION_DSI);
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FixupBranch DoNotLoad = B_CC(CC_EQ);
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FixupBranch DoNotLoad = B_CC(CC_EQ);
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@ -422,9 +430,10 @@ void JitArm::lXX(UGeckoInstruction inst)
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}
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}
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SetJumpTarget(DoNotLoad);
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SetJumpTarget(DoNotLoad);
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// LWZ idle skipping
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// LWZ idle skipping
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bSkipIdle &&
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bSkipIdle &&
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inst.OPCD == 32 &&
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(inst.hex & 0xFFFF0000) == 0x800D0000 &&
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(inst.hex & 0xFFFF0000) == 0x800D0000 &&
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(Memory::ReadUnchecked_U32(js.compilerPC + 4) == 0x28000000 ||
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(Memory::ReadUnchecked_U32(js.compilerPC + 4) == 0x28000000 ||
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(SConfig::GetInstance().m_LocalCoreStartupParameter.bWii && Memory::ReadUnchecked_U32(js.compilerPC + 4) == 0x2C000000)) &&
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(SConfig::GetInstance().m_LocalCoreStartupParameter.bWii && Memory::ReadUnchecked_U32(js.compilerPC + 4) == 0x2C000000)) &&
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