UberShaderPixel: always run indirect stage logic
Hardware testing has confirmed that fb_addprev and wrapping both run even when the indirect stage is disabled.
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@ -148,29 +148,18 @@ void PixelShaderManager::SetConstants()
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for (u32 i = 0; i < (bpmem.genMode.numtevstages + 1); ++i)
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{
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u32 stage = bpmem.tevind[i].bt;
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if (stage < bpmem.genMode.numindstages)
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{
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// We set some extra bits so the ubershader can quickly check if these
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// features are in use.
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if (bpmem.tevind[i].IsActive())
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constants.pack1[stage][3] =
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bpmem.tevindref.getTexCoord(stage) | bpmem.tevindref.getTexMap(stage) << 8 | 1 << 16;
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// Note: a tevind of zero just happens to be a passthrough, so no need
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// to set an extra bit.
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constants.pack1[i][2] = bpmem.tevind[i].hex; // TODO: This match shadergen, but videosw
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// will always wrap.
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// Note: a tevind of zero just happens to be a passthrough, so no need
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// to set an extra bit. Furthermore, wrap and add to previous apply even if there is no
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// indirect stage.
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constants.pack1[i][2] = bpmem.tevind[i].hex;
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// The ubershader uses tevind != 0 as a condition whether to calculate texcoords,
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// even when texture is disabled, instead of the stage < bpmem.genMode.numindstages.
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// We set an unused bit here to indicate that the stage is active, even if it
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// is just a pass-through.
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constants.pack1[i][2] |= 0x80000000;
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}
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else
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{
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constants.pack1[i][2] = 0;
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}
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u32 stage = bpmem.tevind[i].bt;
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// We use an extra bit (1 << 16) to provide a fast way of testing if this feature is in use.
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// Note also that this is indexed by indirect stage, not by TEV stage.
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if (bpmem.tevind[i].IsActive() && stage < bpmem.genMode.numindstages)
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constants.pack1[stage][3] =
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bpmem.tevindref.getTexCoord(stage) | bpmem.tevindref.getTexMap(stage) << 8 | 1 << 16;
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}
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dirty = true;
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@ -287,6 +287,8 @@ ShaderCode GenPixelShader(APIType ApiType, const ShaderHostConfig& host_config,
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// ======================
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const auto LookupIndirectTexture = [&out, stereo](std::string_view out_var_name,
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std::string_view in_index_name) {
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// in_index_name is the indirect stage, not the tev stage
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// bpmem_iref is packed differently from RAS1_IREF
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out.Write("{{\n"
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" uint iref = bpmem_iref({});\n"
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" if ( iref != 0u)\n"
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@ -304,6 +306,10 @@ ShaderCode GenPixelShader(APIType ApiType, const ShaderHostConfig& host_config,
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"[texmap].xy, {})).abg;\n",
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in_index_name, in_index_name, in_index_name, in_index_name, out_var_name,
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stereo ? "float(layer)" : "0.0");
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// There is always a bit set in bpmem_iref if the data is valid (matrix is not off, and the
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// indirect texture stage is enabled). If the matrix is off, the result doesn't matter; if the
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// indirect texture stage is disabled, the result is undefined (and produces a glitchy pattern
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// on hardware, different from this).
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out.Write(" }}\n"
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" else\n"
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" {{\n"
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