Jit64: merge ps_sign into fsign
This commit is contained in:
parent
36d6a16559
commit
df34d43936
|
@ -192,7 +192,6 @@ public:
|
||||||
void reg_imm(UGeckoInstruction inst);
|
void reg_imm(UGeckoInstruction inst);
|
||||||
|
|
||||||
void ps_mr(UGeckoInstruction inst);
|
void ps_mr(UGeckoInstruction inst);
|
||||||
void ps_sign(UGeckoInstruction inst); //aggregate
|
|
||||||
void ps_mergeXX(UGeckoInstruction inst);
|
void ps_mergeXX(UGeckoInstruction inst);
|
||||||
void ps_res(UGeckoInstruction inst);
|
void ps_res(UGeckoInstruction inst);
|
||||||
void ps_rsqrte(UGeckoInstruction inst);
|
void ps_rsqrte(UGeckoInstruction inst);
|
||||||
|
|
|
@ -102,9 +102,9 @@ static GekkoOPTemplate table4[] =
|
||||||
{ //SUBOP10
|
{ //SUBOP10
|
||||||
{0, &Jit64::ps_cmpXX}, // ps_cmpu0
|
{0, &Jit64::ps_cmpXX}, // ps_cmpu0
|
||||||
{32, &Jit64::ps_cmpXX}, // ps_cmpo0
|
{32, &Jit64::ps_cmpXX}, // ps_cmpo0
|
||||||
{40, &Jit64::ps_sign}, // ps_neg
|
{40, &Jit64::fsign}, // ps_neg
|
||||||
{136, &Jit64::ps_sign}, // ps_nabs
|
{136, &Jit64::fsign}, // ps_nabs
|
||||||
{264, &Jit64::ps_sign}, // ps_abs
|
{264, &Jit64::fsign}, // ps_abs
|
||||||
{64, &Jit64::ps_cmpXX}, // ps_cmpu1
|
{64, &Jit64::ps_cmpXX}, // ps_cmpu1
|
||||||
{72, &Jit64::ps_mr}, // ps_mr
|
{72, &Jit64::ps_mr}, // ps_mr
|
||||||
{96, &Jit64::ps_cmpXX}, // ps_cmpo1
|
{96, &Jit64::ps_cmpXX}, // ps_cmpo1
|
||||||
|
|
|
@ -13,6 +13,7 @@ using namespace Gen;
|
||||||
static const u64 GC_ALIGNED16(psSignBits[2]) = {0x8000000000000000ULL, 0x0000000000000000ULL};
|
static const u64 GC_ALIGNED16(psSignBits[2]) = {0x8000000000000000ULL, 0x0000000000000000ULL};
|
||||||
static const u64 GC_ALIGNED16(psSignBits2[2]) = {0x8000000000000000ULL, 0x8000000000000000ULL};
|
static const u64 GC_ALIGNED16(psSignBits2[2]) = {0x8000000000000000ULL, 0x8000000000000000ULL};
|
||||||
static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL};
|
static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL};
|
||||||
|
static const u64 GC_ALIGNED16(psAbsMask2[2]) = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFFFFFFFFFFFULL};
|
||||||
static const double GC_ALIGNED16(half_qnan_and_s32_max[2]) = {0x7FFFFFFF, -0x80000};
|
static const double GC_ALIGNED16(half_qnan_and_s32_max[2]) = {0x7FFFFFFF, -0x80000};
|
||||||
|
|
||||||
void Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single, void (XEmitter::*avxOp)(X64Reg, X64Reg, OpArg),
|
void Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single, void (XEmitter::*avxOp)(X64Reg, X64Reg, OpArg),
|
||||||
|
@ -238,23 +239,22 @@ void Jit64::fsign(UGeckoInstruction inst)
|
||||||
|
|
||||||
int d = inst.FD;
|
int d = inst.FD;
|
||||||
int b = inst.FB;
|
int b = inst.FB;
|
||||||
fpr.Lock(b, d);
|
bool packed = inst.OPCD == 4;
|
||||||
fpr.BindToRegister(d);
|
|
||||||
|
fpr.Lock(b, d);
|
||||||
|
OpArg src = fpr.R(b);
|
||||||
|
fpr.BindToRegister(d, false);
|
||||||
|
|
||||||
if (d != b)
|
|
||||||
MOVSD(fpr.RX(d), fpr.R(b));
|
|
||||||
switch (inst.SUBOP10)
|
switch (inst.SUBOP10)
|
||||||
{
|
{
|
||||||
case 40: // fnegx
|
case 40: // neg
|
||||||
// We can cheat and not worry about clobbering the top half by using masks
|
avx_op(&XEmitter::VPXOR, &XEmitter::PXOR, fpr.RX(d), src, M(packed ? psSignBits2 : psSignBits), packed);
|
||||||
// that don't modify the top half.
|
|
||||||
PXOR(fpr.RX(d), M(psSignBits));
|
|
||||||
break;
|
break;
|
||||||
case 264: // fabsx
|
case 136: // nabs
|
||||||
PAND(fpr.RX(d), M(psAbsMask));
|
avx_op(&XEmitter::VPOR, &XEmitter::POR, fpr.RX(d), src, M(packed ? psSignBits2 : psSignBits), packed);
|
||||||
break;
|
break;
|
||||||
case 136: // fnabs
|
case 264: // abs
|
||||||
POR(fpr.RX(d), M(psSignBits));
|
avx_op(&XEmitter::VPAND, &XEmitter::PAND, fpr.RX(d), src, M(packed ? psAbsMask2 : psAbsMask), packed);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
PanicAlert("fsign bleh");
|
PanicAlert("fsign bleh");
|
||||||
|
|
|
@ -10,9 +10,6 @@
|
||||||
|
|
||||||
using namespace Gen;
|
using namespace Gen;
|
||||||
|
|
||||||
static const u64 GC_ALIGNED16(psSignBits[2]) = {0x8000000000000000ULL, 0x8000000000000000ULL};
|
|
||||||
static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFFFFFFFFFFFULL};
|
|
||||||
|
|
||||||
void Jit64::ps_mr(UGeckoInstruction inst)
|
void Jit64::ps_mr(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
@ -28,34 +25,6 @@ void Jit64::ps_mr(UGeckoInstruction inst)
|
||||||
MOVAPD(fpr.RX(d), fpr.R(b));
|
MOVAPD(fpr.RX(d), fpr.R(b));
|
||||||
}
|
}
|
||||||
|
|
||||||
void Jit64::ps_sign(UGeckoInstruction inst)
|
|
||||||
{
|
|
||||||
INSTRUCTION_START
|
|
||||||
JITDISABLE(bJITPairedOff);
|
|
||||||
FALLBACK_IF(inst.Rc);
|
|
||||||
|
|
||||||
int d = inst.FD;
|
|
||||||
int b = inst.FB;
|
|
||||||
|
|
||||||
fpr.Lock(d, b);
|
|
||||||
fpr.BindToRegister(d, d == b);
|
|
||||||
|
|
||||||
switch (inst.SUBOP10)
|
|
||||||
{
|
|
||||||
case 40: //neg
|
|
||||||
avx_op(&XEmitter::VPXOR, &XEmitter::PXOR, fpr.RX(d), fpr.R(b), M(psSignBits));
|
|
||||||
break;
|
|
||||||
case 136: //nabs
|
|
||||||
avx_op(&XEmitter::VPOR, &XEmitter::POR, fpr.RX(d), fpr.R(b), M(psSignBits));
|
|
||||||
break;
|
|
||||||
case 264: //abs
|
|
||||||
avx_op(&XEmitter::VPAND, &XEmitter::PAND, fpr.RX(d), fpr.R(b), M(psAbsMask));
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
fpr.UnlockAll();
|
|
||||||
}
|
|
||||||
|
|
||||||
void Jit64::ps_sum(UGeckoInstruction inst)
|
void Jit64::ps_sum(UGeckoInstruction inst)
|
||||||
{
|
{
|
||||||
INSTRUCTION_START
|
INSTRUCTION_START
|
||||||
|
|
Loading…
Reference in New Issue