ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Jit64: merge ps_sign into fsign

This commit is contained in:
Tillmann Karras 2015-05-21 12:33:37 +02:00
parent 36d6a16559
commit df34d43936
4 changed files with 15 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Source/Core/Core/PowerPC/Jit64/Jit.h
View File

@ -192,7 +192,6 @@ public:
void reg_imm(UGeckoInstruction inst);
void ps_mr(UGeckoInstruction inst);
void ps_sign(UGeckoInstruction inst); //aggregate
void ps_mergeXX(UGeckoInstruction inst);
void ps_res(UGeckoInstruction inst);
void ps_rsqrte(UGeckoInstruction inst);

6
Source/Core/Core/PowerPC/Jit64/Jit64_Tables.cpp
View File

@ -102,9 +102,9 @@ static GekkoOPTemplate table4[] =
{ //SUBOP10
{0, &Jit64::ps_cmpXX}, // ps_cmpu0
{32, &Jit64::ps_cmpXX}, // ps_cmpo0
{40, &Jit64::ps_sign}, // ps_neg
{136, &Jit64::ps_sign}, // ps_nabs
{264, &Jit64::ps_sign}, // ps_abs
{40, &Jit64::fsign}, // ps_neg
{136, &Jit64::fsign}, // ps_nabs
{264, &Jit64::fsign}, // ps_abs
{64, &Jit64::ps_cmpXX}, // ps_cmpu1
{72, &Jit64::ps_mr}, // ps_mr
{96, &Jit64::ps_cmpXX}, // ps_cmpo1

24
Source/Core/Core/PowerPC/Jit64/Jit_FloatingPoint.cpp
View File

@ -13,6 +13,7 @@ using namespace Gen;
static const u64 GC_ALIGNED16(psSignBits[2]) = {0x8000000000000000ULL, 0x0000000000000000ULL};
static const u64 GC_ALIGNED16(psSignBits2[2]) = {0x8000000000000000ULL, 0x8000000000000000ULL};
static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFFFULL};
static const u64 GC_ALIGNED16(psAbsMask2[2]) = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFFFFFFFFFFFULL};
static const double GC_ALIGNED16(half_qnan_and_s32_max[2]) = {0x7FFFFFFF, -0x80000};
void Jit64::fp_tri_op(int d, int a, int b, bool reversible, bool single, void (XEmitter::*avxOp)(X64Reg, X64Reg, OpArg),
@ -238,23 +239,22 @@ void Jit64::fsign(UGeckoInstruction inst)
int d = inst.FD;
int b = inst.FB;
fpr.Lock(b, d);
fpr.BindToRegister(d);
bool packed = inst.OPCD == 4;
fpr.Lock(b, d);
OpArg src = fpr.R(b);
fpr.BindToRegister(d, false);
if (d != b)
MOVSD(fpr.RX(d), fpr.R(b));
switch (inst.SUBOP10)
{
case 40: // fnegx
// We can cheat and not worry about clobbering the top half by using masks
// that don't modify the top half.
PXOR(fpr.RX(d), M(psSignBits));
case 40: // neg
avx_op(&XEmitter::VPXOR, &XEmitter::PXOR, fpr.RX(d), src, M(packed ? psSignBits2 : psSignBits), packed);
break;
case 264: // fabsx
PAND(fpr.RX(d), M(psAbsMask));
case 136: // nabs
avx_op(&XEmitter::VPOR, &XEmitter::POR, fpr.RX(d), src, M(packed ? psSignBits2 : psSignBits), packed);
break;
case 136: // fnabs
POR(fpr.RX(d), M(psSignBits));
case 264: // abs
avx_op(&XEmitter::VPAND, &XEmitter::PAND, fpr.RX(d), src, M(packed ? psAbsMask2 : psAbsMask), packed);
break;
default:
PanicAlert("fsign bleh");

31
Source/Core/Core/PowerPC/Jit64/Jit_Paired.cpp
View File

@ -10,9 +10,6 @@
using namespace Gen;
static const u64 GC_ALIGNED16(psSignBits[2]) = {0x8000000000000000ULL, 0x8000000000000000ULL};
static const u64 GC_ALIGNED16(psAbsMask[2]) = {0x7FFFFFFFFFFFFFFFULL, 0x7FFFFFFFFFFFFFFFULL};
void Jit64::ps_mr(UGeckoInstruction inst)
{
INSTRUCTION_START
@ -28,34 +25,6 @@ void Jit64::ps_mr(UGeckoInstruction inst)
MOVAPD(fpr.RX(d), fpr.R(b));
}
void Jit64::ps_sign(UGeckoInstruction inst)
{
INSTRUCTION_START
JITDISABLE(bJITPairedOff);
FALLBACK_IF(inst.Rc);
int d = inst.FD;
int b = inst.FB;
fpr.Lock(d, b);
fpr.BindToRegister(d, d == b);
switch (inst.SUBOP10)
{
case 40: //neg
avx_op(&XEmitter::VPXOR, &XEmitter::PXOR, fpr.RX(d), fpr.R(b), M(psSignBits));
break;
case 136: //nabs
avx_op(&XEmitter::VPOR, &XEmitter::POR, fpr.RX(d), fpr.R(b), M(psSignBits));
break;
case 264: //abs
avx_op(&XEmitter::VPAND, &XEmitter::PAND, fpr.RX(d), fpr.R(b), M(psAbsMask));
break;
}
fpr.UnlockAll();
}
void Jit64::ps_sum(UGeckoInstruction inst)
{
INSTRUCTION_START