From beabd56ff8bcdf9f7b37799f8810c2e4ab41cf62 Mon Sep 17 00:00:00 2001 From: aldelaro5 Date: Mon, 27 Dec 2021 02:12:06 -0500 Subject: [PATCH] GDB Stub: Fix the id of the registers returned by p and P packets The stub was made with the assumption that the GDB architecture is rs6000:6000, but the closest is actually powerpc:750 which features much more SPR that the gekko supports, but it also has slightly different ID. This commit now assumes the more proper powerpc:750. --- Source/Core/Core/PowerPC/GDBStub.cpp | 256 ++++++++++++++++++++++++++- Source/Core/Core/PowerPC/Gekko.h | 10 ++ 2 files changed, 260 insertions(+), 6 deletions(-) diff --git a/Source/Core/Core/PowerPC/GDBStub.cpp b/Source/Core/Core/PowerPC/GDBStub.cpp index 45896ec4ab..2796fc5e56 100644 --- a/Source/Core/Core/PowerPC/GDBStub.cpp +++ b/Source/Core/Core/PowerPC/GDBStub.cpp @@ -390,6 +390,14 @@ static void ReadRegister() { wbe64hex(reply, rPS(id - 32).PS0AsU64()); } + else if (id >= 71 && id < 87) + { + wbe32hex(reply, PowerPC::ppcState.sr[id - 71]); + } + else if (id >= 88 && id < 104) + { + wbe32hex(reply, PowerPC::ppcState.spr[SPR_IBAT0U + id - 88]); + } else { switch (id) @@ -413,11 +421,125 @@ static void ReadRegister() wbe32hex(reply, PowerPC::ppcState.spr[SPR_XER]); break; case 70: - wbe32hex(reply, 0x0BADC0DE); - break; - case 71: wbe32hex(reply, FPSCR.Hex); break; + case 87: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_PVR]); + break; + case 104: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SDR]); + break; + case 105: + wbe64hex(reply, PowerPC::ppcState.spr[SPR_ASR]); + break; + case 106: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_DAR]); + break; + case 107: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_DSISR]); + break; + case 108: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SPRG0]); + break; + case 109: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SPRG1]); + break; + case 110: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SPRG2]); + break; + case 111: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SPRG3]); + break; + case 112: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SRR0]); + break; + case 113: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SRR1]); + break; + case 114: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_TL]); + break; + case 115: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_TU]); + break; + case 116: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_DEC]); + break; + case 117: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_DABR]); + break; + case 118: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_EAR]); + break; + case 119: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_HID0]); + break; + case 120: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_HID1]); + break; + case 121: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_IABR]); + break; + case 122: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_DABR]); + break; + case 124: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UMMCR0]); + break; + case 125: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UPMC1]); + break; + case 126: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UPMC2]); + break; + case 127: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_USIA]); + break; + case 128: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UMMCR1]); + break; + case 129: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UPMC3]); + break; + case 130: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_UPMC4]); + break; + case 131: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_MMCR0]); + break; + case 132: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_PMC1]); + break; + case 133: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_PMC2]); + break; + case 134: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_SIA]); + break; + case 135: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_MMCR1]); + break; + case 136: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_PMC3]); + break; + case 137: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_PMC4]); + break; + case 138: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_L2CR]); + break; + case 139: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_ICTC]); + break; + case 140: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_THRM1]); + break; + case 141: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_THRM2]); + break; + case 142: + wbe32hex(reply, PowerPC::ppcState.spr[SPR_THRM3]); + break; default: return SendReply("E01"); break; @@ -480,6 +602,14 @@ static void WriteRegister() { rPS(id - 32).SetPS0(re64hex(bufptr)); } + else if (id >= 71 && id < 87) + { + PowerPC::ppcState.sr[id - 71] = re32hex(bufptr); + } + else if (id >= 88 && id < 104) + { + PowerPC::ppcState.sr[SPR_IBAT0U + id - 88] = re32hex(bufptr); + } else { switch (id) @@ -503,11 +633,125 @@ static void WriteRegister() PowerPC::ppcState.spr[SPR_XER] = re32hex(bufptr); break; case 70: - // do nothing, we dont have MQ - break; - case 71: FPSCR.Hex = re32hex(bufptr); break; + case 87: + PowerPC::ppcState.spr[SPR_PVR] = re32hex(bufptr); + break; + case 104: + PowerPC::ppcState.spr[SPR_SDR] = re32hex(bufptr); + break; + case 105: + PowerPC::ppcState.spr[SPR_ASR] = re64hex(bufptr); + break; + case 106: + PowerPC::ppcState.spr[SPR_DAR] = re32hex(bufptr); + break; + case 107: + PowerPC::ppcState.spr[SPR_DSISR] = re32hex(bufptr); + break; + case 108: + PowerPC::ppcState.spr[SPR_SPRG0] = re32hex(bufptr); + break; + case 109: + PowerPC::ppcState.spr[SPR_SPRG1] = re32hex(bufptr); + break; + case 110: + PowerPC::ppcState.spr[SPR_SPRG2] = re32hex(bufptr); + break; + case 111: + PowerPC::ppcState.spr[SPR_SPRG3] = re32hex(bufptr); + break; + case 112: + PowerPC::ppcState.spr[SPR_SRR0] = re32hex(bufptr); + break; + case 113: + PowerPC::ppcState.spr[SPR_SRR1] = re32hex(bufptr); + break; + case 114: + PowerPC::ppcState.spr[SPR_TL] = re32hex(bufptr); + break; + case 115: + PowerPC::ppcState.spr[SPR_TU] = re32hex(bufptr); + break; + case 116: + PowerPC::ppcState.spr[SPR_DEC] = re32hex(bufptr); + break; + case 117: + PowerPC::ppcState.spr[SPR_DABR] = re32hex(bufptr); + break; + case 118: + PowerPC::ppcState.spr[SPR_EAR] = re32hex(bufptr); + break; + case 119: + PowerPC::ppcState.spr[SPR_HID0] = re32hex(bufptr); + break; + case 120: + PowerPC::ppcState.spr[SPR_HID1] = re32hex(bufptr); + break; + case 121: + PowerPC::ppcState.spr[SPR_IABR] = re32hex(bufptr); + break; + case 122: + PowerPC::ppcState.spr[SPR_DABR] = re32hex(bufptr); + break; + case 124: + PowerPC::ppcState.spr[SPR_UMMCR0] = re32hex(bufptr); + break; + case 125: + PowerPC::ppcState.spr[SPR_UPMC1] = re32hex(bufptr); + break; + case 126: + PowerPC::ppcState.spr[SPR_UPMC2] = re32hex(bufptr); + break; + case 127: + PowerPC::ppcState.spr[SPR_USIA] = re32hex(bufptr); + break; + case 128: + PowerPC::ppcState.spr[SPR_UMMCR1] = re32hex(bufptr); + break; + case 129: + PowerPC::ppcState.spr[SPR_UPMC3] = re32hex(bufptr); + break; + case 130: + PowerPC::ppcState.spr[SPR_UPMC4] = re32hex(bufptr); + break; + case 131: + PowerPC::ppcState.spr[SPR_MMCR0] = re32hex(bufptr); + break; + case 132: + PowerPC::ppcState.spr[SPR_PMC1] = re32hex(bufptr); + break; + case 133: + PowerPC::ppcState.spr[SPR_PMC2] = re32hex(bufptr); + break; + case 134: + PowerPC::ppcState.spr[SPR_SIA] = re32hex(bufptr); + break; + case 135: + PowerPC::ppcState.spr[SPR_MMCR1] = re32hex(bufptr); + break; + case 136: + PowerPC::ppcState.spr[SPR_PMC3] = re32hex(bufptr); + break; + case 137: + PowerPC::ppcState.spr[SPR_PMC4] = re32hex(bufptr); + break; + case 138: + PowerPC::ppcState.spr[SPR_L2CR] = re32hex(bufptr); + break; + case 139: + PowerPC::ppcState.spr[SPR_ICTC] = re32hex(bufptr); + break; + case 140: + PowerPC::ppcState.spr[SPR_THRM1] = re32hex(bufptr); + break; + case 141: + PowerPC::ppcState.spr[SPR_THRM2] = re32hex(bufptr); + break; + case 142: + PowerPC::ppcState.spr[SPR_THRM3] = re32hex(bufptr); + break; default: return SendReply("E01"); break; diff --git a/Source/Core/Core/PowerPC/Gekko.h b/Source/Core/Core/PowerPC/Gekko.h index f8dc7e87af..65a02c798d 100644 --- a/Source/Core/Core/PowerPC/Gekko.h +++ b/Source/Core/Core/PowerPC/Gekko.h @@ -834,6 +834,7 @@ enum SPR_TU = 269, SPR_TL_W = 284, SPR_TU_W = 285, + SPR_ASR = 280, SPR_PVR = 287, SPR_SPRG0 = 272, SPR_SPRG1 = 273, @@ -877,13 +878,22 @@ enum SPR_HID1 = 1009, SPR_HID2 = 920, SPR_HID4 = 1011, + SPR_IABR = 1010, + SPR_DABR = 1013, SPR_WPAR = 921, SPR_DMAU = 922, SPR_DMAL = 923, SPR_ECID_U = 924, SPR_ECID_M = 925, SPR_ECID_L = 926, + SPR_UPMC1 = 937, + SPR_UPMC2 = 938, + SPR_UPMC3 = 941, + SPR_UPMC4 = 942, + SPR_USIA = 939, + SPR_SIA = 955, SPR_L2CR = 1017, + SPR_ICTC = 1019, SPR_UMMCR0 = 936, SPR_MMCR0 = 952,