ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

DSPJit: Sign-extend acS.h to 32 bits 

Thus, the 40-bit accumulator is treated as properly sign-extended when read as a 64-bit number.  This affects e.g. overflow detection.
This commit is contained in:
Pokechu22 2021-08-18 15:34:22 -07:00
parent 74440c468f
commit dc2eab1778
1 changed files with 3 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
Source/Core/Core/DSP/Jit/x64/DSPJitRegCache.cpp
View File

@ -704,23 +704,6 @@ OpArg DSPJitRegCache::GetReg(int reg, bool load)
const OpArg oparg = m_regs[real_reg].loc; const OpArg oparg = m_regs[real_reg].loc;
m_regs[real_reg].used = true; m_regs[real_reg].used = true;
// do some register specific fixup
switch (reg)
{
case DSP_REG_ACC0_64:
case DSP_REG_ACC1_64:
if (load)
{
// need to do this because interpreter only does 48 bits
// (and PutReg does the same)
m_emitter.SHL(64, oparg, Imm8(64 - 40)); // sign extend
m_emitter.SAR(64, oparg, Imm8(64 - 40));
}
break;
default:
break;
}
return oparg; return oparg;
} }
@ -738,15 +721,13 @@ void DSPJitRegCache::PutReg(int reg, bool dirty)
case DSP_REG_ACH1: case DSP_REG_ACH1:
if (dirty) if (dirty)
{ {
// no need to extend to full 64bit here until interpreter
// uses that
if (oparg.IsSimpleReg()) if (oparg.IsSimpleReg())
{ {
// register is already shifted correctly // register is already shifted correctly
// (if at all) // (if at all)
// sign extend from the bottom 8 bits. // sign extend from the bottom 8 bits.
m_emitter.MOVSX(16, 8, oparg.GetSimpleReg(), oparg); m_emitter.MOVSX(32, 8, oparg.GetSimpleReg(), oparg);
} }
else if (oparg.IsImm()) else if (oparg.IsImm())
{ {
@ -759,8 +740,8 @@ void DSPJitRegCache::PutReg(int reg, bool dirty)
// of real_reg, since it has the right loc // of real_reg, since it has the right loc
X64Reg tmp = GetFreeXReg(); X64Reg tmp = GetFreeXReg();
// Sign extend from the bottom 8 bits. // Sign extend from the bottom 8 bits.
m_emitter.MOVSX(16, 8, tmp, m_regs[reg].loc); m_emitter.MOVSX(32, 8, tmp, m_regs[reg].loc);
m_emitter.MOV(16, m_regs[reg].loc, R(tmp)); m_emitter.MOV(32, m_regs[reg].loc, R(tmp));
PutXReg(tmp); PutXReg(tmp);
} }
} }