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Merge pull request #7990 from MerryMage/fprf 

EmuCodeBlock: Correct zero handling in SetFPRF for SSE4.1
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Markus Wick 2019-04-16 22:13:05 +02:00 committed by GitHub
parent 80d21b8ffb e4d83a56a5
commit dbfdb16fbb
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 2 deletions
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Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp
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@ -986,7 +986,6 @@ void EmuCodeBlock::ConvertSingleToDouble(X64Reg dst, X64Reg src, bool src_is_gpr
alignas(16) static const u64 psDoubleExp[2] = {0x7FF0000000000000ULL, 0}; alignas(16) static const u64 psDoubleExp[2] = {0x7FF0000000000000ULL, 0};
alignas(16) static const u64 psDoubleFrac[2] = {0x000FFFFFFFFFFFFFULL, 0}; alignas(16) static const u64 psDoubleFrac[2] = {0x000FFFFFFFFFFFFFULL, 0};
alignas(16) static const u64 psDoubleNoSign[2] = {0x7FFFFFFFFFFFFFFFULL, 0}; alignas(16) static const u64 psDoubleNoSign[2] = {0x7FFFFFFFFFFFFFFFULL, 0};
alignas(16) static const u64 psWhole[2] = {0xFFFFFFFFFFFFFFFFULL, 0};
// TODO: it might be faster to handle FPRF in the same way as CR is currently handled for integer, // TODO: it might be faster to handle FPRF in the same way as CR is currently handled for integer,
// storing // storing
@ -1032,7 +1031,7 @@ void EmuCodeBlock::SetFPRF(Gen::X64Reg xmm)
continue3 = J(); continue3 = J();
SetJumpTarget(zeroExponent); SetJumpTarget(zeroExponent);
PTEST(xmm, MConst(psWhole)); PTEST(xmm, MConst(psDoubleNoSign));
FixupBranch zero = J_CC(CC_Z); FixupBranch zero = J_CC(CC_Z);
// No exponent + mantissa: sign ? PPC_FPCLASS_ND : PPC_FPCLASS_PD; // No exponent + mantissa: sign ? PPC_FPCLASS_ND : PPC_FPCLASS_PD;