From d905cbfd5d05b7c22ae6a28fd27208f0aa53e3d2 Mon Sep 17 00:00:00 2001 From: magumagu Date: Sat, 14 Jun 2014 21:22:34 -0700 Subject: [PATCH] Don't set DAZ on x86 in non-IEEE mode. I have no idea why we were using it in the first place; it doesn't match the behavior of PPC NI flag. --- Source/Core/Common/CPUDetect.h | 1 - Source/Core/Common/x64CPUDetect.cpp | 29 +++----------------------- Source/Core/Common/x64FPURoundMode.cpp | 11 +--------- Source/Core/Core/Core.cpp | 4 ---- 4 files changed, 4 insertions(+), 41 deletions(-) diff --git a/Source/Core/Common/CPUDetect.h b/Source/Core/Common/CPUDetect.h index e5feb20f88..38cfa4be17 100644 --- a/Source/Core/Common/CPUDetect.h +++ b/Source/Core/Common/CPUDetect.h @@ -77,7 +77,6 @@ struct CPUInfo // Turn the cpu info into a string we can show std::string Summarize(); - bool IsUnsafe(); private: // Detects the various cpu features diff --git a/Source/Core/Common/x64CPUDetect.cpp b/Source/Core/Common/x64CPUDetect.cpp index e64cd9d1ee..8340344481 100644 --- a/Source/Core/Common/x64CPUDetect.cpp +++ b/Source/Core/Common/x64CPUDetect.cpp @@ -162,32 +162,10 @@ void CPUInfo::Detect() if ((cpu_id[2] >> 22) & 1) bMOVBE = true; if ((cpu_id[2] >> 25) & 1) bAES = true; - // To check DAZ support, we first need to check FXSAVE support. if ((cpu_id[3] >> 24) & 1) { // We can use FXSAVE. bFXSR = true; - - GC_ALIGNED16(u8 fx_state[512]); - memset(fx_state, 0, sizeof(fx_state)); -#ifdef _WIN32 -#if _M_X86_32 - _fxsave(fx_state); -#elif _M_X86_64 - _fxsave64(fx_state); -#endif -#else - __asm__("fxsave %0" : "=m" (fx_state)); -#endif - - // lowest byte of MXCSR_MASK - if ((fx_state[0x1C] >> 6) & 1) - { - // On x86, the FTZ field (supported since SSE1) only flushes denormal _outputs_ to zero, - // now that we checked DAZ support (flushing denormal _inputs_ to zero), - // we can set our generic flag. - bFlushToZero = true; - } } // AVX support requires 3 separate checks: @@ -204,6 +182,9 @@ void CPUInfo::Detect() } } } + + bFlushToZero = bSSE; + if (max_ex_fn >= 0x80000004) { // Extract brand string __cpuid(cpu_id, 0x80000002); @@ -269,7 +250,3 @@ std::string CPUInfo::Summarize() return sum; } -bool CPUInfo::IsUnsafe() -{ - return !bFlushToZero; -} diff --git a/Source/Core/Common/x64FPURoundMode.cpp b/Source/Core/Common/x64FPURoundMode.cpp index 403473ab1a..83b50ddb63 100644 --- a/Source/Core/Common/x64FPURoundMode.cpp +++ b/Source/Core/Common/x64FPURoundMode.cpp @@ -62,8 +62,6 @@ namespace FPURoundMode { // OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register) const u32 EXCEPTION_MASK = 0x1F80; - // Denormals-Are-Zero (non-IEEE mode: denormal inputs are set to +/- 0) - const u32 DAZ = 0x40; // Flush-To-Zero (non-IEEE mode: denormal outputs are set to +/- 0) const u32 FTZ = 0x8000; // lookup table for FPSCR.RN-to-MXCSR.RC translation @@ -76,16 +74,9 @@ namespace FPURoundMode }; u32 csr = simd_rounding_table[rounding_mode]; - // Some initial steppings of Pentium 4 CPUs support FTZ but not DAZ. - // They will not flush input operands but flushing outputs only is better than nothing. - static const u32 denormalLUT[2] = - { - FTZ, // flush-to-zero only - FTZ | DAZ, // flush-to-zero and denormals-are-zero (may not be supported) - }; if (non_ieee_mode) { - csr |= denormalLUT[cpu_info.bFlushToZero]; + csr |= FTZ; } _mm_setcsr(csr); } diff --git a/Source/Core/Core/Core.cpp b/Source/Core/Core/Core.cpp index 5e5dc7318c..c6e1bc64ac 100644 --- a/Source/Core/Core/Core.cpp +++ b/Source/Core/Core/Core.cpp @@ -379,10 +379,6 @@ void EmuThread() DisplayMessage(cpu_info.brand_string, 8000); DisplayMessage(cpu_info.Summarize(), 8000); DisplayMessage(_CoreParameter.m_strFilename, 3000); - if (cpu_info.IsUnsafe() && (NetPlay::IsNetPlayRunning() || Movie::IsRecordingInput() || Movie::IsPlayingInput())) - { - PanicAlertT("Warning: Netplay/movies will desync because your CPU does not support DAZ and Dolphin does not emulate it anymore."); - } Movie::Init();