Merge pull request #1935 from Sonicadvance1/AArch64_fix_fp_loadstore
[AArch64] Fix bugs in floating point loadstores.
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commit
d86eaea393
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@ -63,9 +63,18 @@ bool JitArm64::DisasmLoadStore(const u8* ptr, u32* flags, ARM64Reg* reg)
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{
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{
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*flags &= ~BackPatchInfo::FLAG_SIZE_32;
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*flags &= ~BackPatchInfo::FLAG_SIZE_32;
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*flags |= BackPatchInfo::FLAG_SIZE_F32;
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*flags |= BackPatchInfo::FLAG_SIZE_F32;
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// Loads directly in to the target register
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// Duplicates bottom result in to top register
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*reg = (ARM64Reg)(inst & 0x1F);
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}
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else // 64-bit float
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{
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// Real register is in the INS instruction
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u32 ins_inst = *(u32*)(ptr + 8);
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*reg = (ARM64Reg)(ins_inst & 0x1F);
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}
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}
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*flags |= BackPatchInfo::FLAG_LOAD;
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*flags |= BackPatchInfo::FLAG_LOAD;
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*reg = (ARM64Reg)(inst & 0x1F);
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return true;
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return true;
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}
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}
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else if (op == 0xF4) // NEON STR
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else if (op == 0xF4) // NEON STR
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@ -74,9 +83,17 @@ bool JitArm64::DisasmLoadStore(const u8* ptr, u32* flags, ARM64Reg* reg)
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{
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{
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*flags &= ~BackPatchInfo::FLAG_SIZE_32;
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*flags &= ~BackPatchInfo::FLAG_SIZE_32;
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*flags |= BackPatchInfo::FLAG_SIZE_F32;
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*flags |= BackPatchInfo::FLAG_SIZE_F32;
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// Real register is in the first FCVT conversion instruction
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u32 fcvt_inst = *(u32*)(ptr - 8);
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*reg = (ARM64Reg)((fcvt_inst >> 5) & 0x1F);
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}
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else // 64-bit float
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{
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// Real register is in the previous REV64 instruction
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*reg = (ARM64Reg)((prev_inst >> 5) & 0x1F);
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}
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}
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*flags |= BackPatchInfo::FLAG_STORE;
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*flags |= BackPatchInfo::FLAG_STORE;
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*reg = (ARM64Reg)(inst & 0x1F);
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return true;
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return true;
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}
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}
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else if (op == 0xE5) // Load
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else if (op == 0xE5) // Load
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@ -200,14 +217,14 @@ u32 JitArm64::EmitBackpatchRoutine(ARM64XEmitter* emit, u32 flags, bool fastmem,
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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if (flags & BackPatchInfo::FLAG_SIZE_F32)
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{
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{
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float_emit.FCVT(32, 64, Q0, RS);
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float_emit.FCVT(32, 64, Q0, RS);
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float_emit.FMOV(32, false, W0, Q0);
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float_emit.UMOV(32, W0, Q0, 0);
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emit->MOVI2R(X30, (u64)&Memory::Write_U32);
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emit->MOVI2R(X30, (u64)&Memory::Write_U32);
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emit->BLR(X30);
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emit->BLR(X30);
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}
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}
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else
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else
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{
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{
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emit->MOVI2R(X30, (u64)&Memory::Write_F64);
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emit->MOVI2R(X30, (u64)&Memory::Write_U64);
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float_emit.DUP(64, Q0, RS);
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float_emit.UMOV(64, X0, RS, 0);
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emit->BLR(X30);
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emit->BLR(X30);
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}
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}
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@ -260,11 +260,7 @@ void JitArm64::stfXX(UGeckoInstruction inst)
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bool is_immediate = false;
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bool is_immediate = false;
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ARM64Reg V0 = fpr.R(inst.FS);
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ARM64Reg V0 = fpr.R(inst.FS);
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ARM64Reg addr_reg;
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ARM64Reg addr_reg = W1;
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if (flags & BackPatchInfo::FLAG_SIZE_F64)
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addr_reg = W0;
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else
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addr_reg = W1;
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gpr.Lock(W0, W1, W30);
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gpr.Lock(W0, W1, W30);
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fpr.Lock(Q0);
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fpr.Lock(Q0);
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