From d7fabf37d67c0779ff2ee1a8e7d4124727cc4b65 Mon Sep 17 00:00:00 2001
From: "Admiral H. Curtiss" <pikachu025@gmail.com>
Date: Sun, 26 Mar 2023 14:59:08 +0200
Subject: [PATCH] PowerPC/MMU: Clean up old comments.

---
 Source/Core/Core/PowerPC/MMU.cpp | 72 ++++++++++----------------------
 1 file changed, 22 insertions(+), 50 deletions(-)

diff --git a/Source/Core/Core/PowerPC/MMU.cpp b/Source/Core/Core/PowerPC/MMU.cpp
index 2b3706ae27..800cd2ff13 100644
--- a/Source/Core/Core/PowerPC/MMU.cpp
+++ b/Source/Core/Core/PowerPC/MMU.cpp
@@ -1,6 +1,28 @@
 // Copyright 2003 Dolphin Emulator Project
 // SPDX-License-Identifier: GPL-2.0-or-later
 
+// Some of the code in this file was originally based on PearPC, though it has been modified since.
+// We have been given permission by the author to re-license the code under GPLv2+.
+/*
+ * PearPC
+ * ppc_mmu.cc
+ *
+ * Copyright (C) 2003, 2004 Sebastian Biallas (sb@biallas.net)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
 #include "Core/PowerPC/MMU.h"
 
 #include <bit>
@@ -30,25 +52,6 @@
 
 namespace PowerPC
 {
-// EFB RE
-/*
-GXPeekZ
-80322de8: rlwinm    r0, r3, 2, 14, 29 (0003fffc)   a =  x << 2 & 0x3fffc
-80322dec: oris      r0, r0, 0xC800                 a |= 0xc8000000
-80322df0: rlwinm    r3, r0, 0, 20, 9 (ffc00fff)    x = a & 0xffc00fff
-80322df4: rlwinm    r0, r4, 12, 4, 19 (0ffff000)   a = (y << 12) & 0x0ffff000;
-80322df8: or        r0, r3, r0                     a |= x;
-80322dfc: rlwinm    r0, r0, 0, 10, 7 (ff3fffff)    a &= 0xff3fffff
-80322e00: oris      r3, r0, 0x0040                 x = a | 0x00400000
-80322e04: lwz       r0, 0 (r3)                     r0 = *r3
-80322e08: stw       r0, 0 (r5)                     z =
-80322e0c: blr
-*/
-
-// =================================
-// From Memmap.cpp
-// ----------------
-
 // Overloaded byteswap functions, for use within the templated functions below.
 inline u8 bswap(u8 val)
 {
@@ -74,7 +77,6 @@ inline u64 bswap(u64 val)
 {
   return Common::swap64(val);
 }
-// =================
 
 enum class XCheckTLBFlag
 {
@@ -1347,36 +1349,6 @@ TranslateResult JitCache_TranslateAddress(u32 address)
   return TranslateResult{from_bat, tlb_addr.address};
 }
 
-// *********************************************************************************
-// Warning: Test Area
-//
-// This code is for TESTING and it works in interpreter mode ONLY. Some games (like
-// COD iirc) work thanks to this basic TLB emulation.
-// It is just a small hack and we have never spend enough time to finalize it.
-// Cheers PearPC!
-//
-// *********************************************************************************
-
-/*
- * PearPC
- * ppc_mmu.cc
- *
- * Copyright (C) 2003, 2004 Sebastian Biallas (sb@biallas.net)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
 static void GenerateDSIException(u32 effective_address, bool write)
 {
   // DSI exceptions are only supported in MMU mode.