Atomic operations library.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3775 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
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@ -556,6 +556,18 @@
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RelativePath=".\Src\ABI.h"
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RelativePath=".\Src\ABI.h"
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>
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>
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</File>
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</File>
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<File
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RelativePath=".\Src\Atomic.h"
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>
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</File>
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<File
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RelativePath=".\Src\Atomic_GCC.h"
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>
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</File>
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<File
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RelativePath=".\Src\Atomic_Win32.h"
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>
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</File>
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<File
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<File
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RelativePath=".\Src\BreakPoints.cpp"
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RelativePath=".\Src\BreakPoints.cpp"
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>
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>
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@ -0,0 +1,32 @@
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// Copyright (C) 2003-2009 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#ifndef _ATOMIC_H_
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#define _ATOMIC_H_
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#ifdef _WIN32
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#include "Atomic_Win32.h"
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#else
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// GCC-compatible compiler assumed!
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#include "Atomic_GCC.h"
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#endif
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#endif
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@ -0,0 +1,110 @@
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// Copyright (C) 2003-2009 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#ifndef _ATOMIC_GCC_H_
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#define _ATOMIC_GCC_H_
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#include "Common.h"
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// Atomic operations are performed in a single step by the CPU. It is
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// impossible for other threads to see the operation "half-done."
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//
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// Some atomic operations can be combined with different types of memory
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// barriers called "Acquire semantics" and "Release semantics", defined below.
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//
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// Acquire semantics: Future memory accesses cannot be relocated to before the
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// operation.
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//
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// Release semantics: Past memory accesses cannot be relocated to after the
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// operation.
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//
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// These barriers affect not only the compiler, but also the CPU.
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namespace Common
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{
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inline void AtomicAdd(volatile u32& target, u32 value) {
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__sync_add_and_fetch(target, value);
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}
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inline void AtomicIncrement(volatile u32& target) {
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__sync_add_and_fetch(target, 1);
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}
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inline u32 AtomicLoad(volatile u32& src) {
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return src; // 32-bit reads are always atomic.
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}
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inline u32 AtomicLoadAcquire(volatile u32& src) {
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__sync_synchronize();
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return src;
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}
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inline void AtomicStore(volatile u32& dest, u32 value) {
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dest = value; // 32-bit writes are always atomic.
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}
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inline void AtomicStoreRelease(volatile u32& dest, u32 value) {
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__sync_lock_test_and_set(dest, value);
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}
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}
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// Old code kept here for reference in case we need the parts with __asm__ __volatile__.
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#if 0
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LONG SyncInterlockedIncrement(LONG *Dest)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_add_and_fetch(Dest, 1);
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#else
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register int result;
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__asm__ __volatile__("lock; xadd %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (1), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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LONG SyncInterlockedExchangeAdd(LONG *Dest, LONG Val)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_add_and_fetch(Dest, Val);
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#else
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register int result;
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__asm__ __volatile__("lock; xadd %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (Val), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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LONG SyncInterlockedExchange(LONG *Dest, LONG Val)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_lock_test_and_set(Dest, Val);
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#else
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register int result;
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__asm__ __volatile__("lock; xchg %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (Val), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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#endif
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#endif
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@ -0,0 +1,71 @@
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// Copyright (C) 2003-2009 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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#ifndef _ATOMIC_WIN32_H_
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#define _ATOMIC_WIN32_H_
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#include "Common.h"
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#include <Windows.h>
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// Atomic operations are performed in a single step by the CPU. It is
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// impossible for other threads to see the operation "half-done."
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//
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// Some atomic operations can be combined with different types of memory
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// barriers called "Acquire semantics" and "Release semantics", defined below.
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//
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// Acquire semantics: Future memory accesses cannot be relocated to before the
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// operation.
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//
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// Release semantics: Past memory accesses cannot be relocated to after the
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// operation.
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//
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// These barriers affect not only the compiler, but also the CPU.
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//
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// NOTE: Acquire and Release are not differentiated right now. They perform a
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// full memory barrier instead of a "one-way" memory barrier. The newest
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// Windows SDK has Acquire and Release versions of some Interlocked* functions.
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namespace Common
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{
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inline void AtomicAdd(volatile u32& target, u32 value) {
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InterlockedAdd((volatile LONG*)&target, (LONG)value);
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}
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inline void AtomicIncrement(volatile u32& target) {
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InterlockedIncrement((volatile LONG*)&target);
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}
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inline u32 AtomicLoad(volatile u32& src) {
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return src; // 32-bit reads are always atomic.
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}
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inline u32 AtomicLoadAcquire(volatile u32& src) {
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MemoryBarrier();
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return src;
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}
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inline void AtomicStore(volatile u32& dest, u32 value) {
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dest = value; // 32-bit writes are always atomic.
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}
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inline void AtomicStoreRelease(volatile u32& dest, u32 value) {
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// InterlockedExchange includes a memory barrier as a bonus.
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InterlockedExchange((volatile LONG*)&dest, (LONG)value);
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}
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}
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#endif
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namespace Common
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namespace Common
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{
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{
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#ifndef _WIN32
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// TODO see thread.h
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void MemFence(){;}
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#endif
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#ifdef _WIN32
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#ifdef _WIN32
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__except(EXCEPTION_CONTINUE_EXECUTION)
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__except(EXCEPTION_CONTINUE_EXECUTION)
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{}
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{}
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}
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}
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// TODO: check if ever inline
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LONG SyncInterlockedIncrement(LONG *Dest)
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{
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return InterlockedIncrement(Dest);
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}
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LONG SyncInterlockedExchangeAdd(LONG *Dest, LONG Val)
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{
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return InterlockedExchangeAdd(Dest, Val);
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}
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LONG SyncInterlockedExchange(LONG *Dest, LONG Val)
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{
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return InterlockedExchange(Dest, Val);
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}
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#else // !WIN32, so must be POSIX threads
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#else // !WIN32, so must be POSIX threads
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pthread_mutex_unlock(&mutex_);
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pthread_mutex_unlock(&mutex_);
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}
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}
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LONG SyncInterlockedIncrement(LONG *Dest)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_add_and_fetch(Dest, 1);
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#else
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register int result;
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__asm__ __volatile__("lock; xadd %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (1), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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LONG SyncInterlockedExchangeAdd(LONG *Dest, LONG Val)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_add_and_fetch(Dest, Val);
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#else
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register int result;
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__asm__ __volatile__("lock; xadd %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (Val), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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LONG SyncInterlockedExchange(LONG *Dest, LONG Val)
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{
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#if defined(__GNUC__) && defined (__GNUC_MINOR__) && ((4 < __GNUC__) || (4 == __GNUC__ && 1 <= __GNUC_MINOR__))
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return __sync_lock_test_and_set(Dest, Val);
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#else
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register int result;
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__asm__ __volatile__("lock; xchg %0,%1"
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: "=r" (result), "=m" (*Dest)
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: "0" (Val), "m" (*Dest)
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: "memory");
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return result;
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#endif
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}
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#endif
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#endif
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} // namespace Common
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} // namespace Common
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@ -72,18 +72,6 @@
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namespace Common
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namespace Common
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{
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{
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// MemFence: Neither the compiler nor the CPU can reorder memory accesses
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// beyond this barrier.
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#ifdef _WIN32
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__forceinline void MemFence()
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{
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MemoryBarrier();
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}
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#else
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// TODO: UNIX experts, please implement the memory fence.
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void MemFence();
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#endif
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class CriticalSection
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class CriticalSection
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{
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{
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#ifdef _WIN32
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#ifdef _WIN32
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@ -206,10 +194,6 @@ void SleepCurrentThread(int ms);
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void SetCurrentThreadName(const char *name);
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void SetCurrentThreadName(const char *name);
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LONG SyncInterlockedExchangeAdd(LONG *Dest, LONG Val);
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LONG SyncInterlockedExchange(LONG *Dest, LONG Val);
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LONG SyncInterlockedIncrement(LONG *Dest);
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} // namespace Common
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} // namespace Common
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#endif // _THREAD_H_
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#endif // _THREAD_H_
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@ -74,6 +74,7 @@
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#include "../ConfigManager.h"
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#include "../ConfigManager.h"
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#include "MathUtil.h"
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#include "MathUtil.h"
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#include "Thread.h"
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#include "Thread.h"
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#include "Atomic.h"
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#include "Memmap.h"
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#include "Memmap.h"
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#include "PeripheralInterface.h"
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#include "PeripheralInterface.h"
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@ -178,8 +179,8 @@ void UpdateInterrupts();
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//inline void WriteLow (u32& _reg, u16 lowbits) {_reg = (_reg & 0xFFFF0000) | lowbits;}
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//inline void WriteLow (u32& _reg, u16 lowbits) {_reg = (_reg & 0xFFFF0000) | lowbits;}
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//inline void WriteHigh(u32& _reg, u16 highbits) {_reg = (_reg & 0x0000FFFF) | ((u32)highbits << 16);}
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//inline void WriteHigh(u32& _reg, u16 highbits) {_reg = (_reg & 0x0000FFFF) | ((u32)highbits << 16);}
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inline void WriteLow (volatile u32& _reg, u16 lowbits) {Common::SyncInterlockedExchange((LONG*)&_reg,(_reg & 0xFFFF0000) | lowbits);}
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inline void WriteLow (volatile u32& _reg, u16 lowbits) {Common::AtomicStore(_reg,(_reg & 0xFFFF0000) | lowbits);}
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inline void WriteHigh(volatile u32& _reg, u16 highbits) {Common::SyncInterlockedExchange((LONG*)&_reg,(_reg & 0x0000FFFF) | ((u32)highbits << 16));}
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inline void WriteHigh(volatile u32& _reg, u16 highbits) {Common::AtomicStore(_reg,(_reg & 0x0000FFFF) | ((u32)highbits << 16));}
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inline u16 ReadLow (u32 _reg) {return (u16)(_reg & 0xFFFF);}
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inline u16 ReadLow (u32 _reg) {return (u16)(_reg & 0xFFFF);}
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inline u16 ReadHigh (u32 _reg) {return (u16)(_reg >> 16);}
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inline u16 ReadHigh (u32 _reg) {return (u16)(_reg >> 16);}
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@ -189,7 +190,7 @@ int et_UpdateInterrupts;
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// for GP watchdog hack
|
// for GP watchdog hack
|
||||||
void IncrementGPWDToken()
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void IncrementGPWDToken()
|
||||||
{
|
{
|
||||||
Common::SyncInterlockedIncrement((LONG*)&fifo.Fake_GPWDToken);
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Common::AtomicIncrement(fifo.Fake_GPWDToken);
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}
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}
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||||||
// Check every FAKE_GP_WATCHDOG_PERIOD if a PE-frame-finish occured
|
// Check every FAKE_GP_WATCHDOG_PERIOD if a PE-frame-finish occured
|
||||||
|
@ -426,9 +427,9 @@ void Write16(const u16 _Value, const u32 _Address)
|
||||||
fake_CommandProcessorNotUsed = false;
|
fake_CommandProcessorNotUsed = false;
|
||||||
UCPCtrlReg tmpCtrl(_Value);
|
UCPCtrlReg tmpCtrl(_Value);
|
||||||
|
|
||||||
Common::SyncInterlockedExchange((LONG*)&fifo.bFF_GPReadEnable, tmpCtrl.GPReadEnable);
|
Common::AtomicStore(fifo.bFF_GPReadEnable, tmpCtrl.GPReadEnable);
|
||||||
Common::SyncInterlockedExchange((LONG*)&fifo.bFF_GPLinkEnable, tmpCtrl.GPLinkEnable);
|
Common::AtomicStore(fifo.bFF_GPLinkEnable, tmpCtrl.GPLinkEnable);
|
||||||
Common::SyncInterlockedExchange((LONG*)&fifo.bFF_BPEnable, tmpCtrl.BPEnable);
|
Common::AtomicStore(fifo.bFF_BPEnable, tmpCtrl.BPEnable);
|
||||||
|
|
||||||
// TOCHECK (mb2): could BP irq be cleared with w16 to STATUS_REGISTER?
|
// TOCHECK (mb2): could BP irq be cleared with w16 to STATUS_REGISTER?
|
||||||
// funny hack: eg in MP1 if we disable the clear breakpoint ability by commenting this block
|
// funny hack: eg in MP1 if we disable the clear breakpoint ability by commenting this block
|
||||||
|
@ -600,7 +601,7 @@ void STACKALIGN GatherPipeBursted()
|
||||||
fifo.CPWritePointer += GPFifo::GATHER_PIPE_SIZE;
|
fifo.CPWritePointer += GPFifo::GATHER_PIPE_SIZE;
|
||||||
if (fifo.CPWritePointer >= fifo.CPEnd)
|
if (fifo.CPWritePointer >= fifo.CPEnd)
|
||||||
fifo.CPWritePointer = fifo.CPBase;
|
fifo.CPWritePointer = fifo.CPBase;
|
||||||
Common::SyncInterlockedExchangeAdd((LONG*)&fifo.CPReadWriteDistance, GPFifo::GATHER_PIPE_SIZE);
|
Common::AtomicAdd(fifo.CPReadWriteDistance, GPFifo::GATHER_PIPE_SIZE);
|
||||||
|
|
||||||
// High watermark overflow handling (hacked way)
|
// High watermark overflow handling (hacked way)
|
||||||
u32 ct = 0;
|
u32 ct = 0;
|
||||||
|
@ -732,8 +733,8 @@ void UpdateFifoRegister()
|
||||||
dist = wp - rp;
|
dist = wp - rp;
|
||||||
else
|
else
|
||||||
dist = (wp - fifo.CPBase) + (fifo.CPEnd - rp);
|
dist = (wp - fifo.CPBase) + (fifo.CPEnd - rp);
|
||||||
//fifo.CPReadWriteDistance = dist;
|
|
||||||
Common::SyncInterlockedExchange((LONG*)&fifo.CPReadWriteDistance, dist);
|
Common::AtomicStore(fifo.CPReadWriteDistance, dist);
|
||||||
|
|
||||||
if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bUseDualCore)
|
if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bUseDualCore)
|
||||||
CatchUpGPU();
|
CatchUpGPU();
|
||||||
|
|
|
@ -22,7 +22,7 @@
|
||||||
|
|
||||||
#include "Common.h"
|
#include "Common.h"
|
||||||
#include "ChunkFile.h"
|
#include "ChunkFile.h"
|
||||||
#include "Thread.h"
|
#include "Atomic.h"
|
||||||
|
|
||||||
#include "PixelEngine.h"
|
#include "PixelEngine.h"
|
||||||
|
|
||||||
|
@ -360,7 +360,10 @@ void SetToken(const u16 _token, const int _bSetTokenAcknowledge)
|
||||||
{
|
{
|
||||||
// we do it directly from videoThread because of
|
// we do it directly from videoThread because of
|
||||||
// Super Monkey Ball
|
// Super Monkey Ball
|
||||||
Common::SyncInterlockedExchange((LONG*)&CommandProcessor::fifo.PEToken, _token);
|
// XXX: No 16-bit atomic store available, so cheat and use 32-bit.
|
||||||
|
// That's what we've always done. We're counting on fifo.PEToken to be
|
||||||
|
// 4-byte padded.
|
||||||
|
Common::AtomicStore(*(volatile u32*)&CommandProcessor::fifo.PEToken, _token);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -23,6 +23,7 @@
|
||||||
#endif
|
#endif
|
||||||
#include "MemoryUtil.h"
|
#include "MemoryUtil.h"
|
||||||
#include "Thread.h"
|
#include "Thread.h"
|
||||||
|
#include "Atomic.h"
|
||||||
#include "OpcodeDecoding.h"
|
#include "OpcodeDecoding.h"
|
||||||
|
|
||||||
#include "Fifo.h"
|
#include "Fifo.h"
|
||||||
|
@ -151,7 +152,7 @@ void Fifo_EnterLoop(const SVideoInitialize &video_initialize)
|
||||||
// check if we are able to run this buffer
|
// check if we are able to run this buffer
|
||||||
if ((_fifo.bFF_GPReadEnable) && _fifo.CPReadWriteDistance && !(_fifo.bFF_BPEnable && _fifo.bFF_Breakpoint))
|
if ((_fifo.bFF_GPReadEnable) && _fifo.CPReadWriteDistance && !(_fifo.bFF_BPEnable && _fifo.bFF_Breakpoint))
|
||||||
{
|
{
|
||||||
Common::SyncInterlockedExchange((LONG*)&_fifo.CPReadIdle, 0);
|
Common::AtomicStore(_fifo.CPReadIdle, 0);
|
||||||
//video_initialize.pLog("RUN...........................",FALSE);
|
//video_initialize.pLog("RUN...........................",FALSE);
|
||||||
int peek_counter = 0;
|
int peek_counter = 0;
|
||||||
while (_fifo.bFF_GPReadEnable && _fifo.CPReadWriteDistance)
|
while (_fifo.bFF_GPReadEnable && _fifo.CPReadWriteDistance)
|
||||||
|
@ -175,7 +176,7 @@ void Fifo_EnterLoop(const SVideoInitialize &video_initialize)
|
||||||
if (readPtr == _fifo.CPBreakpoint)
|
if (readPtr == _fifo.CPBreakpoint)
|
||||||
{
|
{
|
||||||
video_initialize.pLog("!!! BP irq raised",FALSE);
|
video_initialize.pLog("!!! BP irq raised",FALSE);
|
||||||
Common::SyncInterlockedExchange((LONG*)&_fifo.bFF_Breakpoint, 1);
|
Common::AtomicStore(_fifo.bFF_Breakpoint, 1);
|
||||||
|
|
||||||
video_initialize.pUpdateInterrupts();
|
video_initialize.pUpdateInterrupts();
|
||||||
break;
|
break;
|
||||||
|
@ -210,11 +211,11 @@ void Fifo_EnterLoop(const SVideoInitialize &video_initialize)
|
||||||
}
|
}
|
||||||
// Execute new instructions found in uData
|
// Execute new instructions found in uData
|
||||||
Video_SendFifoData(uData, distToSend);
|
Video_SendFifoData(uData, distToSend);
|
||||||
Common::SyncInterlockedExchange((LONG*)&_fifo.CPReadPointer, readPtr);
|
Common::AtomicStore(_fifo.CPReadPointer, readPtr);
|
||||||
Common::SyncInterlockedExchangeAdd((LONG*)&_fifo.CPReadWriteDistance, -distToSend);
|
Common::AtomicAdd(_fifo.CPReadWriteDistance, -distToSend);
|
||||||
}
|
}
|
||||||
//video_initialize.pLog("..........................IDLE",FALSE);
|
//video_initialize.pLog("..........................IDLE",FALSE);
|
||||||
Common::SyncInterlockedExchange((LONG*)&_fifo.CPReadIdle, 1);
|
Common::AtomicStore(_fifo.CPReadIdle, 1);
|
||||||
}
|
}
|
||||||
s_criticalFifo.Leave();
|
s_criticalFifo.Leave();
|
||||||
}
|
}
|
||||||
|
|
|
@ -54,6 +54,7 @@ Make AA apply instantly during gameplay if possible
|
||||||
#include "Globals.h"
|
#include "Globals.h"
|
||||||
#include "LogManager.h"
|
#include "LogManager.h"
|
||||||
#include "Thread.h"
|
#include "Thread.h"
|
||||||
|
#include "Atomic.h"
|
||||||
|
|
||||||
#include <cstdarg>
|
#include <cstdarg>
|
||||||
|
|
||||||
|
@ -101,10 +102,10 @@ int GLScissorX, GLScissorY, GLScissorW, GLScissorH;
|
||||||
|
|
||||||
static bool s_PluginInitialized = false;
|
static bool s_PluginInitialized = false;
|
||||||
|
|
||||||
static volatile bool s_swapRequested = false;
|
static volatile u32 s_swapRequested = false;
|
||||||
static Common::Event s_swapResponseEvent;
|
static Common::Event s_swapResponseEvent;
|
||||||
|
|
||||||
static volatile bool s_efbAccessRequested = false;
|
static volatile u32 s_efbAccessRequested = false;
|
||||||
static Common::Event s_efbResponseEvent;
|
static Common::Event s_efbResponseEvent;
|
||||||
|
|
||||||
|
|
||||||
|
@ -390,10 +391,10 @@ void Shutdown(void)
|
||||||
{
|
{
|
||||||
s_PluginInitialized = false;
|
s_PluginInitialized = false;
|
||||||
|
|
||||||
s_efbAccessRequested = false;
|
s_efbAccessRequested = FALSE;
|
||||||
s_efbResponseEvent.Shutdown();
|
s_efbResponseEvent.Shutdown();
|
||||||
|
|
||||||
s_swapRequested = false;
|
s_swapRequested = FALSE;
|
||||||
s_swapResponseEvent.Shutdown();
|
s_swapResponseEvent.Shutdown();
|
||||||
|
|
||||||
Fifo_Shutdown();
|
Fifo_Shutdown();
|
||||||
|
@ -450,11 +451,9 @@ static volatile struct
|
||||||
// Run from the graphics thread (from Fifo.cpp)
|
// Run from the graphics thread (from Fifo.cpp)
|
||||||
void VideoFifo_CheckSwapRequest()
|
void VideoFifo_CheckSwapRequest()
|
||||||
{
|
{
|
||||||
if (s_swapRequested)
|
if (Common::AtomicLoadAcquire(s_swapRequested))
|
||||||
{
|
{
|
||||||
s_swapRequested = false;
|
s_swapRequested = FALSE;
|
||||||
|
|
||||||
Common::MemFence();
|
|
||||||
|
|
||||||
Renderer::Swap(s_beginFieldArgs.xfbAddr, s_beginFieldArgs.field, s_beginFieldArgs.fbWidth, s_beginFieldArgs.fbHeight);
|
Renderer::Swap(s_beginFieldArgs.xfbAddr, s_beginFieldArgs.field, s_beginFieldArgs.fbWidth, s_beginFieldArgs.fbHeight);
|
||||||
|
|
||||||
|
@ -478,13 +477,10 @@ inline bool addrRangesOverlap(u32 aLower, u32 aUpper, u32 bLower, u32 bUpper)
|
||||||
// Run from the graphics thread (from Fifo.cpp)
|
// Run from the graphics thread (from Fifo.cpp)
|
||||||
void VideoFifo_CheckSwapRequestAt(u32 xfbAddr, u32 fbWidth, u32 fbHeight)
|
void VideoFifo_CheckSwapRequestAt(u32 xfbAddr, u32 fbWidth, u32 fbHeight)
|
||||||
{
|
{
|
||||||
if (s_swapRequested)
|
if (Common::AtomicLoadAcquire(s_swapRequested))
|
||||||
{
|
{
|
||||||
u32 aLower = xfbAddr;
|
u32 aLower = xfbAddr;
|
||||||
u32 aUpper = xfbAddr + 2 * fbWidth * fbHeight;
|
u32 aUpper = xfbAddr + 2 * fbWidth * fbHeight;
|
||||||
|
|
||||||
Common::MemFence();
|
|
||||||
|
|
||||||
u32 bLower = s_beginFieldArgs.xfbAddr;
|
u32 bLower = s_beginFieldArgs.xfbAddr;
|
||||||
u32 bUpper = s_beginFieldArgs.xfbAddr + 2 * s_beginFieldArgs.fbWidth * s_beginFieldArgs.fbHeight;
|
u32 bUpper = s_beginFieldArgs.xfbAddr + 2 * s_beginFieldArgs.fbWidth * s_beginFieldArgs.fbHeight;
|
||||||
|
|
||||||
|
@ -508,9 +504,7 @@ void Video_BeginField(u32 xfbAddr, FieldType field, u32 fbWidth, u32 fbHeight)
|
||||||
s_beginFieldArgs.fbWidth = fbWidth;
|
s_beginFieldArgs.fbWidth = fbWidth;
|
||||||
s_beginFieldArgs.fbHeight = fbHeight;
|
s_beginFieldArgs.fbHeight = fbHeight;
|
||||||
|
|
||||||
Common::MemFence();
|
Common::AtomicStoreRelease(s_swapRequested, TRUE);
|
||||||
|
|
||||||
s_swapRequested = true;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -525,11 +519,9 @@ static volatile u32 s_AccessEFBResult = 0;
|
||||||
|
|
||||||
void VideoFifo_CheckEFBAccess()
|
void VideoFifo_CheckEFBAccess()
|
||||||
{
|
{
|
||||||
if (s_efbAccessRequested)
|
if (Common::AtomicLoadAcquire(s_efbAccessRequested))
|
||||||
{
|
{
|
||||||
s_efbAccessRequested = false;
|
s_efbAccessRequested = FALSE;
|
||||||
|
|
||||||
Common::MemFence();
|
|
||||||
|
|
||||||
switch (s_accessEFBArgs.type)
|
switch (s_accessEFBArgs.type)
|
||||||
{
|
{
|
||||||
|
@ -593,9 +585,7 @@ u32 Video_AccessEFB(EFBAccessType type, u32 x, u32 y)
|
||||||
s_accessEFBArgs.x = x;
|
s_accessEFBArgs.x = x;
|
||||||
s_accessEFBArgs.y = y;
|
s_accessEFBArgs.y = y;
|
||||||
|
|
||||||
Common::MemFence();
|
Common::AtomicStoreRelease(s_efbAccessRequested, TRUE);
|
||||||
|
|
||||||
s_efbAccessRequested = true;
|
|
||||||
|
|
||||||
if (g_VideoInitialize.bUseDualCore)
|
if (g_VideoInitialize.bUseDualCore)
|
||||||
s_efbResponseEvent.MsgWait();
|
s_efbResponseEvent.MsgWait();
|
||||||
|
|
Loading…
Reference in New Issue