Merge pull request #5524 from ligfx/llegba
Update free DSP ROM and coefficients to support GBA ucode
This commit is contained in:
shuffle2
GitHub
commit
d51be949a9
Binary file not shown.
Binary file not shown.
|
|
@ -489,6 +489,7 @@ bool DSPAssembler::VerifyParams(const opc_t* opc, param_t* par, size_t count, Op
|
||||||
case P_REG18:
|
case P_REG18:
|
||||||
case P_REG19:
|
case P_REG19:
|
||||||
case P_REG1A:
|
case P_REG1A:
|
||||||
|
case P_REG1C:
|
||||||
value = (opc->params[i].type >> 8) & 31;
|
value = (opc->params[i].type >> 8) & 31;
|
||||||
if ((int)par[i].val < value ||
|
if ((int)par[i].val < value ||
|
||||||
(int)par[i].val > value + get_mask_shifted_down(opc->params[i].mask))
|
(int)par[i].val > value + get_mask_shifted_down(opc->params[i].mask))
|
||||||
|
|
|
||||||
|
|
@ -41,7 +41,7 @@ static bool VerifyRoms()
|
||||||
u32 hash_drom; // dsp_coef.bin
|
u32 hash_drom; // dsp_coef.bin
|
||||||
};
|
};
|
||||||
|
|
||||||
static const std::array<DspRomHashes, 4> known_roms = {
|
static const std::array<DspRomHashes, 5> known_roms = {
|
||||||
{// Official Nintendo ROM
|
{// Official Nintendo ROM
|
||||||
{0x66f334fe, 0xf3b93527},
|
{0x66f334fe, 0xf3b93527},
|
||||||
|
|
||||||
|
|
@ -53,7 +53,10 @@ static bool VerifyRoms()
|
||||||
{0xd9907f71, 0xb019c2fb},
|
{0xd9907f71, 0xb019c2fb},
|
||||||
|
|
||||||
// above with improved resampling coefficients
|
// above with improved resampling coefficients
|
||||||
{0xd9907f71, 0xdb6880c1}}};
|
{0xd9907f71, 0xdb6880c1},
|
||||||
|
|
||||||
|
// above with support for GBA ucode
|
||||||
|
{0x3aa4a793, 0xa4a575f5}}};
|
||||||
|
|
||||||
u32 hash_irom = HashAdler32((u8*)g_dsp.irom, DSP_IROM_BYTE_SIZE);
|
u32 hash_irom = HashAdler32((u8*)g_dsp.irom, DSP_IROM_BYTE_SIZE);
|
||||||
u32 hash_drom = HashAdler32((u8*)g_dsp.coef, DSP_COEF_BYTE_SIZE);
|
u32 hash_drom = HashAdler32((u8*)g_dsp.coef, DSP_COEF_BYTE_SIZE);
|
||||||
|
|
|
||||||
|
|
@ -39,10 +39,10 @@ enum partype_t
|
||||||
P_REG19 = P_REG | 0x1900,
|
P_REG19 = P_REG | 0x1900,
|
||||||
P_REGM19 = P_REG | 0x1910, // used in multiply instructions
|
P_REGM19 = P_REG | 0x1910, // used in multiply instructions
|
||||||
P_REG1A = P_REG | 0x1a80,
|
P_REG1A = P_REG | 0x1a80,
|
||||||
P_REG1C = P_REG | 0x1c00,
|
|
||||||
// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value)
|
// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value)
|
||||||
P_ACCL = P_REG | 0x1c00, // used for low part of accum
|
P_ACCL = P_REG | 0x1c00, // used for low part of accum
|
||||||
P_ACCM = P_REG | 0x1e00, // used for mid part of accum
|
P_REG1C = P_REG | 0x1c10, // gcdsptool calls this P_ACCLM
|
||||||
|
P_ACCM = P_REG | 0x1e00, // used for mid part of accum
|
||||||
// The following are not in gcdsptool
|
// The following are not in gcdsptool
|
||||||
P_ACCM_D = P_REG | 0x1e80,
|
P_ACCM_D = P_REG | 0x1e80,
|
||||||
P_ACC = P_REG | 0x2000, // used for full accum.
|
P_ACC = P_REG | 0x2000, // used for full accum.
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,388 @@
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0000
|
||||||
|
dsp dmem write 0012 = 0000
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 0000
|
||||||
|
dsp dmem write 0017 = 0000
|
||||||
|
dsp dmem write 0018 = 0000
|
||||||
|
dsp dmem write 0019 = 0000
|
||||||
|
dsp dmem write 001a = 0000
|
||||||
|
dsp dmem write 001b = 0000
|
||||||
|
dsp dmem write 001c = 0000
|
||||||
|
dsp dmem write 001d = 0000
|
||||||
|
dsp dmem write 001e = 0000
|
||||||
|
dsp dmem write 001f = 0000
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0021 = 0000
|
||||||
|
dsp dmem write 0022 = 0000
|
||||||
|
dsp dmem write 0023 = 0000
|
||||||
|
dsp dmem write 0024 = 0000
|
||||||
|
dsp dmem write 0025 = 0000
|
||||||
|
dsp dmem write 0026 = 0000
|
||||||
|
dsp dmem write 0027 = 0000
|
||||||
|
dsp dmem write 0028 = 0000
|
||||||
|
dsp dmem write 0029 = 0000
|
||||||
|
dsp dmem write 002a = 0000
|
||||||
|
dsp dmem write 002b = 0000
|
||||||
|
dsp dmem write 002c = 0000
|
||||||
|
dsp dmem write 002d = 0000
|
||||||
|
dsp dmem write 002e = 0000
|
||||||
|
dsp dmem write 002f = 0000
|
||||||
|
0093 : Coefficient Read @ 1456
|
||||||
|
dsp dmem read 1456 = 102f
|
||||||
|
009e : Coefficient Read @ 15f6
|
||||||
|
dsp dmem read 15f6 = 7f65
|
||||||
|
00a1 : Coefficient Read @ 1766
|
||||||
|
dsp dmem read 1766 = 0273
|
||||||
|
call at 00a5 -> 88e5
|
||||||
|
STARTED 00a4 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 0030 AR2: 001f AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 34c0 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6500 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0073 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem read 001f = 0000
|
||||||
|
dsp dmem read 0020 = 0000
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
STOPPED: 00a6
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 002f AR2: 0020 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 34c0 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6573 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3950
|
||||||
|
dsp dmem read 0000 = ceb4
|
||||||
|
call at 00ad -> 8809
|
||||||
|
STARTED 00ac -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00ce AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00ce AC0.L: b400
|
||||||
|
AC1.H: 0000 AC1.M: b400 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0020 = b4ce
|
||||||
|
STOPPED: 00ae
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00ce AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00ce AC0.L: b400
|
||||||
|
AC1.H: 0000 AC1.M: b4ce AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3958
|
||||||
|
call at 00af -> 8723
|
||||||
|
STARTED 00ae -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00ce AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00ce AC0.L: b400
|
||||||
|
AC1.H: 0000 AC1.M: b4ce AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3958
|
||||||
|
dsp dmem write 0021 = d1bd
|
||||||
|
STOPPED: 00b0
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00ce AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00ce AC0.L: b400
|
||||||
|
AC1.H: 0000 AC1.M: d1bd AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
00b4 : Coefficient Read @ 166c
|
||||||
|
dsp dmem read 166c = 06f2
|
||||||
|
00b9 : Coefficient Read @ 1231
|
||||||
|
dsp dmem read 1231 = 64fc
|
||||||
|
call at 00be -> 88e5
|
||||||
|
STARTED 00bd -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 001e AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f00 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0064 AC1.L: fc00
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem read 001e = 0000
|
||||||
|
dsp dmem read 001f = 6573
|
||||||
|
dsp dmem write 001e = 6f64
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
STOPPED: 00bf
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002e AR2: 001f AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f64 AC0.L: 6573
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3940
|
||||||
|
dsp dmem read 0001 = 4f51
|
||||||
|
call at 00c6 -> 8809
|
||||||
|
STARTED 00c5 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 004f AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 004f AC0.L: 5100
|
||||||
|
AC1.H: 0000 AC1.M: 5100 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 001f = 514f
|
||||||
|
STOPPED: 00c7
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 004f AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 004f AC0.L: 5100
|
||||||
|
AC1.H: 0000 AC1.M: 514f AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3940
|
||||||
|
call at 00c8 -> 8723
|
||||||
|
STARTED 00c7 -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 004f AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 004f AC0.L: 5100
|
||||||
|
AC1.H: 0000 AC1.M: 514f AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3940
|
||||||
|
dsp dmem write 0020 = 3e2b
|
||||||
|
STOPPED: 00c9
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 004f AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 004f AC0.L: 5100
|
||||||
|
AC1.H: 0000 AC1.M: 3e2b AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem read 0005 = 0001
|
||||||
|
00f9 : Coefficient Read @ 1285
|
||||||
|
dsp dmem read 1285 = 5aff
|
||||||
|
dsp dmem read 0003 = 0000
|
||||||
|
call at 0101 -> 8809
|
||||||
|
STARTED 0100 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0010 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0000
|
||||||
|
STOPPED: 0102
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0f08
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3964
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem read 0007 = 7390
|
||||||
|
010c : Coefficient Read @ 11b8
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
call at 0110 -> 81f4
|
||||||
|
STARTED 010f -> 81f4
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0013
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0070 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 7390 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3970
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 7390
|
||||||
|
STOPPED: 0111
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 7390
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
call at 0113 -> 8458
|
||||||
|
STARTED 0112 -> 8458
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 7390 AC1.L: 0000
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3940
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 7397
|
||||||
|
STOPPED: 0114
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0017
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 7397
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
dsp dmem read 0006 = 0003
|
||||||
|
011b : Coefficient Read @ 165b
|
||||||
|
dsp dmem read 165b = 0000
|
||||||
|
call at 011c -> 88e5
|
||||||
|
STARTED 011b -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0015 AR3: 0017
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0003 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 7397
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7964
|
||||||
|
dsp dmem read 0015 = 0000
|
||||||
|
dsp dmem read 0016 = 7397
|
||||||
|
dsp dmem write 0015 = 0003
|
||||||
|
dsp dmem write 0016 = 7397
|
||||||
|
STOPPED: 011d
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0003 AC0.L: 7397
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 7397
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7960
|
||||||
|
dsp dmem write 0016 = 0003
|
||||||
|
dsp dmem write 0017 = 7390
|
||||||
|
0125 : Coefficient Read @ 1723
|
||||||
|
dsp dmem read 1723 = ffe0
|
||||||
|
0128 : Coefficient Read @ 166b
|
||||||
|
dsp dmem read 166b = 0000
|
||||||
|
call at 0129 -> 88e5
|
||||||
|
STARTED 0128 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: ffff AC0.M: ffff AC0.L: fe00
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 7397
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7968
|
||||||
|
dsp dmem read 0016 = 0003
|
||||||
|
dsp dmem read 0017 = 7390
|
||||||
|
dsp dmem write 0016 = 0003
|
||||||
|
dsp dmem write 0017 = 7190
|
||||||
|
STOPPED: 012a
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: 93d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0003 AC0.L: 7190
|
||||||
|
AC1.H: 0000 AC1.M: 0003 AC1.L: 7390
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7961
|
||||||
|
0132 : Coefficient Read @ 1491
|
||||||
|
dsp dmem read 1491 = 6a0f
|
||||||
|
0137 : Coefficient Read @ 1468
|
||||||
|
dsp dmem read 1468 = f808
|
||||||
|
0139 : Coefficient Read @ 11fc
|
||||||
|
dsp dmem read 11fc = 0003
|
||||||
|
013d : Coefficient Read @ 11b8
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
dsp dmem read 0012 = 0000
|
||||||
|
dsp dmem write 0012 = 5c32
|
||||||
|
dsp dmem read 0011 = 0000
|
||||||
|
dsp dmem write 0011 = 0001
|
||||||
|
dsp dmem read 0011 = 0001
|
||||||
|
dsp dmem read 0012 = 5c32
|
||||||
|
dsp dmem read 0012 = 5c32
|
||||||
|
dsp dmem read 0011 = 0001
|
||||||
|
dsp dmem read 0012 = 5c32
|
||||||
|
017a : Coefficient Read @ 15f1
|
||||||
|
dsp dmem read 15f1 = 0200
|
||||||
|
0194 : Coefficient Read @ 10ca
|
||||||
|
dsp dmem read 10ca = 3461
|
||||||
|
0198 : Coefficient Read @ 1043
|
||||||
|
dsp dmem read 1043 = 0076
|
||||||
|
dsp dmem write 0022 = eef6
|
||||||
|
019f : Coefficient Read @ 1259
|
||||||
|
dsp dmem read 1259 = 6143
|
||||||
|
01a1 : Coefficient Read @ 16fe
|
||||||
|
dsp dmem read 16fe = 0008
|
||||||
|
dsp dmem write 0023 = bdf9
|
||||||
|
dsp dmem read 0008 = 802c
|
||||||
|
dsp dmem read 0009 = 34e0
|
||||||
|
call at 01b2 -> 808b
|
||||||
|
STARTED 01b1 -> 808b
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: dcb2 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 802c AX0.L: 34e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 506d AC0.M: bdf9 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: dcb2 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3958
|
||||||
|
dsp dmem write ffce = 802c
|
||||||
|
dsp dmem write ffcf = 34e0
|
||||||
|
dsp dmem write ffc9 = 0001
|
||||||
|
dsp dmem write ffcd = 0020
|
||||||
|
dsp dmem write ffcb = 0008
|
||||||
|
dsp dmem read ffc9 = 0001
|
||||||
|
STOPPED: 01b3
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: dcb2 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 802c AX0.L: 34e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: dcb2 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
call at 0044 -> 807e
|
||||||
|
STARTED 0043 -> 807e
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: dcb2 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 802c AX0.L: 34e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: dcb2 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
dsp dmem read fffc = 5cd1
|
||||||
|
STOPPED: 0045
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: dcb2 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 802c AX0.L: 34e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 5cd1 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: dcb2 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
dsp dmem write fffc = dcd1
|
||||||
|
dsp dmem write fffd = 0003
|
||||||
|
dsp dmem write fffb = 0001
|
||||||
|
call at 004d -> 8078
|
||||||
|
STARTED 004c -> 8078
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8027 IX1: dcb2 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 802c AX0.L: 34e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 5cd1 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: dcb2 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7964
|
||||||
|
|
@ -0,0 +1,355 @@
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0000
|
||||||
|
dsp dmem write 0012 = 0000
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 0000
|
||||||
|
dsp dmem write 0017 = 0000
|
||||||
|
dsp dmem write 0018 = 0000
|
||||||
|
dsp dmem write 0019 = 0000
|
||||||
|
dsp dmem write 001a = 0000
|
||||||
|
dsp dmem write 001b = 0000
|
||||||
|
dsp dmem write 001c = 0000
|
||||||
|
dsp dmem write 001d = 0000
|
||||||
|
dsp dmem write 001e = 0000
|
||||||
|
dsp dmem write 001f = 0000
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0021 = 0000
|
||||||
|
dsp dmem write 0022 = 0000
|
||||||
|
dsp dmem write 0023 = 0000
|
||||||
|
dsp dmem write 0024 = 0000
|
||||||
|
dsp dmem write 0025 = 0000
|
||||||
|
dsp dmem write 0026 = 0000
|
||||||
|
dsp dmem write 0027 = 0000
|
||||||
|
dsp dmem write 0028 = 0000
|
||||||
|
dsp dmem write 0029 = 0000
|
||||||
|
dsp dmem write 002a = 0000
|
||||||
|
dsp dmem write 002b = 0000
|
||||||
|
dsp dmem write 002c = 0000
|
||||||
|
dsp dmem write 002d = 0000
|
||||||
|
dsp dmem write 002e = 0000
|
||||||
|
dsp dmem write 002f = 0000
|
||||||
|
Coefficient Read @ 1456 = 102f
|
||||||
|
dsp dmem read 1456 = 102f
|
||||||
|
Coefficient Read @ 15f6 = 7f65
|
||||||
|
dsp dmem read 15f6 = 7f65
|
||||||
|
Coefficient Read @ 1766 = 0273
|
||||||
|
dsp dmem read 1766 = 0273
|
||||||
|
call at 00a5 -> 88e5
|
||||||
|
STARTED 00a4 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 0030 AR2: 001f AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 72c0 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6500 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0073 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem read 001f = 0000
|
||||||
|
dsp dmem read 0020 = 0000
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
STOPPED: 00a6
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 002f AR2: 0020 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 72c0 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6573 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3950
|
||||||
|
dsp dmem read 0000 = c79a
|
||||||
|
call at 00ad -> 8809
|
||||||
|
STARTED 00ac -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c7 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c7 AC0.L: 9a00
|
||||||
|
AC1.H: 0000 AC1.M: 9a00 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0020 = 9ac7
|
||||||
|
STOPPED: 00ae
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c7 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c7 AC0.L: 9a00
|
||||||
|
AC1.H: 0000 AC1.M: 9ac7 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3958
|
||||||
|
call at 00af -> 8723
|
||||||
|
STARTED 00ae -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c7 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c7 AC0.L: 9a00
|
||||||
|
AC1.H: 0000 AC1.M: 9ac7 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3958
|
||||||
|
dsp dmem write 0021 = ffb4
|
||||||
|
STOPPED: 00b0
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c7 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c7 AC0.L: 9a00
|
||||||
|
AC1.H: 0000 AC1.M: ffb4 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
Coefficient Read @ 166c = 06f2
|
||||||
|
dsp dmem read 166c = 06f2
|
||||||
|
Coefficient Read @ 1231 = 64fc
|
||||||
|
dsp dmem read 1231 = 64fc
|
||||||
|
call at 00be -> 88e5
|
||||||
|
STARTED 00bd -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 001e AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f00 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0064 AC1.L: fc00
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem read 001e = 0000
|
||||||
|
dsp dmem read 001f = 6573
|
||||||
|
dsp dmem write 001e = 6f64
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
STOPPED: 00bf
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002e AR2: 001f AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f64 AC0.L: 6573
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3940
|
||||||
|
dsp dmem read 0001 = afc4
|
||||||
|
call at 00c6 -> 8809
|
||||||
|
STARTED 00c5 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00af AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00af AC0.L: c400
|
||||||
|
AC1.H: 0000 AC1.M: c400 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 001f = c4af
|
||||||
|
STOPPED: 00c7
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00af AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00af AC0.L: c400
|
||||||
|
AC1.H: 0000 AC1.M: c4af AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
call at 00c8 -> 8723
|
||||||
|
STARTED 00c7 -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00af AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00af AC0.L: c400
|
||||||
|
AC1.H: 0000 AC1.M: c4af AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
dsp dmem write 0020 = abcb
|
||||||
|
STOPPED: 00c9
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00af AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00af AC0.L: c400
|
||||||
|
AC1.H: 0000 AC1.M: abcb AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3958
|
||||||
|
dsp dmem read 0005 = 0002
|
||||||
|
Coefficient Read @ 1285 = 5aff
|
||||||
|
dsp dmem read 1285 = 5aff
|
||||||
|
dsp dmem read 0003 = 0006
|
||||||
|
call at 0101 -> 8809
|
||||||
|
STARTED 0100 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0010 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0060 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0060 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0002 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3978
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0062
|
||||||
|
STOPPED: 0102
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0f45
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0060 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0060 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0062 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3960
|
||||||
|
dsp dmem write 0013 = 0060
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem read 0007 = e058
|
||||||
|
Coefficient Read @ 11b8 = 007f
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
call at 0110 -> 81f4
|
||||||
|
STARTED 010f -> 81f4
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0013
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0070 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: e058 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3970
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = e058
|
||||||
|
STOPPED: 0111
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: e058
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
call at 0113 -> 8458
|
||||||
|
STARTED 0112 -> 8458
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: e058 AC1.L: 0000
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3970
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = e05f
|
||||||
|
STOPPED: 0114
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0017
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: e05f
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
dsp dmem read 0006 = 0002
|
||||||
|
Coefficient Read @ 165b = 0000
|
||||||
|
dsp dmem read 165b = 0000
|
||||||
|
call at 011c -> 88e5
|
||||||
|
STARTED 011b -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0015 AR3: 0017
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: e05f
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7964
|
||||||
|
dsp dmem read 0015 = 0000
|
||||||
|
dsp dmem read 0016 = e05f
|
||||||
|
dsp dmem write 0015 = 0002
|
||||||
|
dsp dmem write 0016 = e05f
|
||||||
|
STOPPED: 011d
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: e05f
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: e05f
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7960
|
||||||
|
dsp dmem write 0016 = 0002
|
||||||
|
dsp dmem write 0017 = e058
|
||||||
|
Coefficient Read @ 1723 = ffe0
|
||||||
|
dsp dmem read 1723 = ffe0
|
||||||
|
Coefficient Read @ 166b = 0000
|
||||||
|
dsp dmem read 166b = 0000
|
||||||
|
call at 0129 -> 88e5
|
||||||
|
STARTED 0128 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: ffff AC0.M: ffff AC0.L: fe00
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: e05f
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7968
|
||||||
|
dsp dmem read 0016 = 0002
|
||||||
|
dsp dmem read 0017 = e058
|
||||||
|
dsp dmem write 0016 = 0002
|
||||||
|
dsp dmem write 0017 = de58
|
||||||
|
STOPPED: 012a
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8021 IX1: ba38 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: de58
|
||||||
|
AC1.H: 0000 AC1.M: 0002 AC1.L: e058
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7961
|
||||||
|
Coefficient Read @ 1491 = 6a0f
|
||||||
|
dsp dmem read 1491 = 6a0f
|
||||||
|
Coefficient Read @ 1468 = f808
|
||||||
|
dsp dmem read 1468 = f808
|
||||||
|
Coefficient Read @ 11fc = 0003
|
||||||
|
dsp dmem read 11fc = 0003
|
||||||
|
Coefficient Read @ 11b8 = 007f
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
dsp dmem read 0012 = 0000
|
||||||
|
dsp dmem write 0012 = 374b
|
||||||
|
dsp dmem read 0011 = 0062
|
||||||
|
dsp dmem write 0011 = 0063
|
||||||
|
dsp dmem read 0011 = 0063
|
||||||
|
dsp dmem read 0012 = 374b
|
||||||
|
dsp dmem read 0012 = 374b
|
||||||
|
dsp dmem read 0011 = 0063
|
||||||
|
dsp dmem read 0012 = 374b
|
||||||
|
Coefficient Read @ 15f1 = 0200
|
||||||
|
dsp dmem read 15f1 = 0200
|
||||||
|
Coefficient Read @ 10e2 = 376f
|
||||||
|
dsp dmem read 10e2 = 376f
|
||||||
|
Coefficient Read @ 103b = 0065
|
||||||
|
dsp dmem read 103b = 0065
|
||||||
|
dsp dmem write 0022 = 8a87
|
||||||
|
Coefficient Read @ 1229 = 657c
|
||||||
|
dsp dmem read 1229 = 657c
|
||||||
|
Coefficient Read @ 11f8 = 0009
|
||||||
|
dsp dmem read 11f8 = 0009
|
||||||
|
dsp dmem write 0023 = d2b8
|
||||||
|
dsp dmem read 0008 = 8032
|
||||||
|
dsp dmem read 0009 = 72e0
|
||||||
|
call at 01b2 -> 808b
|
||||||
|
STARTED 01b1 -> 808b
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8021 IX1: b7cb IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 8032 AX0.L: 72e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 1b23 AC0.M: d2b8 AC0.L: 0000
|
||||||
|
AC1.H: 0037 AC1.M: b7cb AC1.L: 0009
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3978
|
||||||
|
dsp dmem write ffce = 8032
|
||||||
|
dsp dmem write ffcf = 72e0
|
||||||
|
dsp dmem write ffc9 = 0001
|
||||||
|
dsp dmem write ffcd = 0020
|
||||||
|
dsp dmem write ffcb = 0008
|
||||||
|
dsp dmem read ffc9 = 0001
|
||||||
|
STOPPED: 01b3
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8021 IX1: b7cb IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 8032 AX0.L: 72e0 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0037 AC1.M: b7cb AC1.L: 0009
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3964
|
||||||
|
|
@ -0,0 +1,457 @@
|
||||||
|
// Initial ucode load
|
||||||
|
STARTED 80b5 -> 80b5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 0000 AR2: 0000 AR3: 0000
|
||||||
|
IX0: 8049 IX1: 36a0 IX2: 0000 IX3: 1d20
|
||||||
|
AX0.H: 0000 AX0.L: 0000 AX1.H: 0000 AX1.L: 0000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: d001 AC1.L: 0000
|
||||||
|
PROD: 0000000000000000
|
||||||
|
SR: 2064
|
||||||
|
80d5 : dsp dmem write ffce = 8049
|
||||||
|
80d7 : dsp dmem write ffcf = 36a0
|
||||||
|
80db : dsp dmem write ffc9 = 0002
|
||||||
|
80dd : dsp dmem write ffcd = 0000
|
||||||
|
80df : dsp dmem write ffcb = 1d20
|
||||||
|
DMA pc: 80df, Control: 0006, Address: 804936a0, DSP Address: 0000, Size: 1d20
|
||||||
|
Core/HW/DSPLLE/DSPHost.cpp:70 N[DSPLLE]: g_dsp.iram_crc: 2fcdf1ec
|
||||||
|
Core/DSP/DSPHWInterface.cpp:264 N[DSPLLE]: *** Copy new UCode from 0x804936a0 to 0x0000
|
||||||
|
80e1 : dsp dmem read ffc9 = 0002
|
||||||
|
STOPPED: 80e5 -> 0000
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 0000 AR2: 0000 AR3: 0000
|
||||||
|
IX0: 8049 IX1: 36a0 IX2: 0000 IX3: 1d20
|
||||||
|
AX0.H: 0000 AX0.L: 0000 AX1.H: 0000 AX1.L: 0000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 1d20 AC1.L: 0000
|
||||||
|
PROD: 0000000000000000
|
||||||
|
SR: 2060
|
||||||
|
|
||||||
|
// GBA ucode load
|
||||||
|
// - jumps to AR0
|
||||||
|
STARTED 80b5 -> 80b5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0010 AR1: 0393 AR2: 0420 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0380
|
||||||
|
AX0.H: 8000 AX0.L: 0000 AX1.H: 0000 AX1.L: 0000
|
||||||
|
AC0.H: 0000 AC0.M: 0001 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 8000 AC1.L: 0000
|
||||||
|
PROD: 0000000000000000
|
||||||
|
SR: 2064
|
||||||
|
80d5 : dsp dmem write ffce = 8049
|
||||||
|
80d7 : dsp dmem write ffcf = 85d0
|
||||||
|
80db : dsp dmem write ffc9 = 0002
|
||||||
|
80dd : dsp dmem write ffcd = 0000
|
||||||
|
80df : dsp dmem write ffcb = 0380
|
||||||
|
DMA pc: 80df, Control: 0006, Address: 804985d0, DSP Address: 0000, Size: 0380
|
||||||
|
Core/HW/DSPLLE/DSPHost.cpp:70 N[DSPLLE]: g_dsp.iram_crc: dd7e72d5
|
||||||
|
Core/HW/DSPLLE/DSPSymbols.cpp:84 E[DSPLLE]: Bah! ReadAnnotatedAssembly couldn't find the file ../../docs/DSP/DSP_UC_GBA.txt
|
||||||
|
Core/DSP/DSPHWInterface.cpp:264 N[DSPLLE]: *** Copy new UCode from 0x804985d0 to 0x0000 (crc: dd7e72d5)
|
||||||
|
80e1 : dsp dmem read ffc9 = 0002
|
||||||
|
STOPPED: 80e5 -> 0010
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0010 AR1: 0393 AR2: 0420 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0380
|
||||||
|
AX0.H: 8000 AX0.L: 0000 AX1.H: 0000 AX1.L: 0000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0380 AC1.L: 0000
|
||||||
|
PROD: 0000000000000000
|
||||||
|
SR: 2060
|
||||||
|
|
||||||
|
// skip some boring stuff
|
||||||
|
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0000
|
||||||
|
dsp dmem write 0012 = 0000
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 0000
|
||||||
|
dsp dmem write 0017 = 0000
|
||||||
|
dsp dmem write 0018 = 0000
|
||||||
|
dsp dmem write 0019 = 0000
|
||||||
|
dsp dmem write 001a = 0000
|
||||||
|
dsp dmem write 001b = 0000
|
||||||
|
dsp dmem write 001c = 0000
|
||||||
|
dsp dmem write 001d = 0000
|
||||||
|
dsp dmem write 001e = 0000
|
||||||
|
dsp dmem write 001f = 0000
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0021 = 0000
|
||||||
|
dsp dmem write 0022 = 0000
|
||||||
|
dsp dmem write 0023 = 0000
|
||||||
|
dsp dmem write 0024 = 0000
|
||||||
|
dsp dmem write 0025 = 0000
|
||||||
|
dsp dmem write 0026 = 0000
|
||||||
|
dsp dmem write 0027 = 0000
|
||||||
|
dsp dmem write 0028 = 0000
|
||||||
|
dsp dmem write 0029 = 0000
|
||||||
|
dsp dmem write 002a = 0000
|
||||||
|
dsp dmem write 002b = 0000
|
||||||
|
dsp dmem write 002c = 0000
|
||||||
|
dsp dmem write 002d = 0000
|
||||||
|
dsp dmem write 002e = 0000
|
||||||
|
dsp dmem write 002f = 0000
|
||||||
|
Coefficient Read @ 1456 = 102f
|
||||||
|
dsp dmem read 1456 = 102f
|
||||||
|
Coefficient Read @ 15f6 = 7f65
|
||||||
|
dsp dmem read 15f6 = 7f65
|
||||||
|
Coefficient Read @ 1766 = 0273
|
||||||
|
dsp dmem read 1766 = 0273
|
||||||
|
call at 00a5 -> 88e5
|
||||||
|
STARTED 00a4 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 0030 AR2: 001f AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 9b60 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6500 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0073 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3860
|
||||||
|
dsp dmem read 001f = 0000
|
||||||
|
dsp dmem read 0020 = 0000
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
STOPPED: 00a6
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0000 AR1: 002f AR2: 0020 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0073 AX0.L: 9b60 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 007f AC0.M: 6573 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3850
|
||||||
|
dsp dmem read 0000 = c3cf
|
||||||
|
call at 00ad -> 8809
|
||||||
|
STARTED 00ac -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c3 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c3 AC0.L: cf00
|
||||||
|
AC1.H: 0000 AC1.M: cf00 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3860
|
||||||
|
dsp dmem write 0020 = 0000
|
||||||
|
dsp dmem write 0020 = cfc3
|
||||||
|
STOPPED: 00ae
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c3 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c3 AC0.L: cf00
|
||||||
|
AC1.H: 0000 AC1.M: cfc3 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3878
|
||||||
|
call at 00af -> 8723
|
||||||
|
STARTED 00ae -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0021 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c3 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c3 AC0.L: cf00
|
||||||
|
AC1.H: 0000 AC1.M: cfc3 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3878
|
||||||
|
dsp dmem write 0021 = aab0
|
||||||
|
STOPPED: 00b0
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 0020 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00c3 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00c3 AC0.L: cf00
|
||||||
|
AC1.H: 0000 AC1.M: aab0 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3858
|
||||||
|
Coefficient Read @ 166c = 06f2
|
||||||
|
dsp dmem read 166c = 06f2
|
||||||
|
Coefficient Read @ 1231 = 64fc
|
||||||
|
dsp dmem read 1231 = 64fc
|
||||||
|
call at 00be -> 88e5
|
||||||
|
STARTED 00bd -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002f AR2: 001e AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f00 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0064 AC1.L: fc00
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3860
|
||||||
|
dsp dmem read 001e = 0000
|
||||||
|
dsp dmem read 001f = 6573
|
||||||
|
dsp dmem write 001e = 6f64
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
STOPPED: 00bf
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0001 AR1: 002e AR2: 001f AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 0064 AX0.L: 0000 AX1.H: 6573 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 6f64 AC0.L: 6573
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3840
|
||||||
|
dsp dmem read 0001 = a4b2
|
||||||
|
call at 00c6 -> 8809
|
||||||
|
STARTED 00c5 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00a4 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00a4 AC0.L: b200
|
||||||
|
AC1.H: 0000 AC1.M: b200 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3860
|
||||||
|
dsp dmem write 001f = 6573
|
||||||
|
dsp dmem write 001f = b2a4
|
||||||
|
STOPPED: 00c7
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00a4 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00a4 AC0.L: b200
|
||||||
|
AC1.H: 0000 AC1.M: b2a4 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3858
|
||||||
|
call at 00c8 -> 8723
|
||||||
|
STARTED 00c7 -> 8723
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0020 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00a4 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00a4 AC0.L: b200
|
||||||
|
AC1.H: 0000 AC1.M: b2a4 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3858
|
||||||
|
dsp dmem write 0020 = ddc0
|
||||||
|
STOPPED: 00c9
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 001f AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0000 IX3: 0000
|
||||||
|
AX0.H: 00a4 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 00a4 AC0.L: b200
|
||||||
|
AC1.H: 0000 AC1.M: ddc0 AC1.L: 6573
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3878
|
||||||
|
dsp dmem read 0005 = 0002
|
||||||
|
Coefficient Read @ 1285 = 5aff
|
||||||
|
dsp dmem read 1285 = 5aff
|
||||||
|
dsp dmem read 0003 = 0006
|
||||||
|
call at 0101 -> 8809
|
||||||
|
STARTED 0100 -> 8809
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0010 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0060 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0060 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0002 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3878
|
||||||
|
dsp dmem write 0010 = 0000
|
||||||
|
dsp dmem write 0011 = 0062
|
||||||
|
STOPPED: 0102
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0618
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0060 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0060 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0062 AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3860
|
||||||
|
dsp dmem write 0013 = 0060
|
||||||
|
dsp dmem write 0014 = 0000
|
||||||
|
dsp dmem read 0007 = 829c
|
||||||
|
Coefficient Read @ 11b8 = 007f
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
call at 0110 -> 81f4
|
||||||
|
STARTED 010f -> 81f4
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0012 AR3: 0013
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 6f64 AX1.L: 1000
|
||||||
|
AC0.H: fff0 AC0.M: 0070 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 829c AC1.L: 0000
|
||||||
|
PROD: 001000fffff00000
|
||||||
|
SR: 3870
|
||||||
|
dsp dmem write 0013 = 0000
|
||||||
|
dsp dmem write 0014 = 829c
|
||||||
|
STOPPED: 0111
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 829c
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3864
|
||||||
|
call at 0113 -> 8458
|
||||||
|
STARTED 0112 -> 8458
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0015
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0070 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 829c AC1.L: 0000
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3850
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 82a3
|
||||||
|
STOPPED: 0114
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0012 AR3: 0017
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0070 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 82a3
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3864
|
||||||
|
dsp dmem read 0006 = 0000
|
||||||
|
Coefficient Read @ 165b = 0000
|
||||||
|
dsp dmem read 165b = 0000
|
||||||
|
call at 011c -> 88e5
|
||||||
|
STARTED 011b -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002f AR2: 0015 AR3: 0017
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 82a3
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7864
|
||||||
|
dsp dmem read 0015 = 0000
|
||||||
|
dsp dmem read 0016 = 82a3
|
||||||
|
dsp dmem write 0015 = 0000
|
||||||
|
dsp dmem write 0016 = 82a3
|
||||||
|
STOPPED: 011d
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 82a3
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 82a3
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7860
|
||||||
|
dsp dmem write 0016 = 0000
|
||||||
|
dsp dmem write 0017 = 82a0
|
||||||
|
Coefficient Read @ 1723 = ffe0
|
||||||
|
dsp dmem read 1723 = ffe0
|
||||||
|
Coefficient Read @ 166b = 0000
|
||||||
|
dsp dmem read 166b = 0000
|
||||||
|
call at 0129 -> 88e5
|
||||||
|
STARTED 0128 -> 88e5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002e AR2: 0016 AR3: 0017
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: ffff AC0.M: ffff AC0.L: fe00
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 82a3
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7868
|
||||||
|
dsp dmem read 0016 = 0000
|
||||||
|
dsp dmem read 0017 = 82a0
|
||||||
|
dsp dmem write 0016 = 0000
|
||||||
|
dsp dmem write 0017 = 80a0
|
||||||
|
STOPPED: 012a
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8049 IX1: 85d0 IX2: 0001 IX3: 0000
|
||||||
|
AX0.H: 0000 AX0.L: 6573 AX1.H: 0000 AX1.L: 1000
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 80a0
|
||||||
|
AC1.H: 0000 AC1.M: 0000 AC1.L: 82a0
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 7861
|
||||||
|
Coefficient Read @ 1491 = 6a0f
|
||||||
|
dsp dmem read 1491 = 6a0f
|
||||||
|
Coefficient Read @ 1468 = f808
|
||||||
|
dsp dmem read 1468 = f808
|
||||||
|
Coefficient Read @ 11fc = 0003
|
||||||
|
dsp dmem read 11fc = 0003
|
||||||
|
Coefficient Read @ 11b8 = 007f
|
||||||
|
dsp dmem read 11b8 = 007f
|
||||||
|
dsp dmem read 0012 = 0000
|
||||||
|
dsp dmem write 0012 = 2014
|
||||||
|
dsp dmem read 0011 = 0062
|
||||||
|
dsp dmem write 0011 = 0062
|
||||||
|
dsp dmem read 0011 = 0062
|
||||||
|
dsp dmem read 0012 = 2014
|
||||||
|
dsp dmem read 0012 = 2014
|
||||||
|
dsp dmem read 0011 = 0062
|
||||||
|
dsp dmem read 0012 = 2014
|
||||||
|
Coefficient Read @ 15f1 = 0200
|
||||||
|
dsp dmem read 15f1 = 0200
|
||||||
|
Coefficient Read @ 10ca = 3461
|
||||||
|
dsp dmem read 10ca = 3461
|
||||||
|
Coefficient Read @ 1043 = 0076
|
||||||
|
dsp dmem read 1043 = 0076
|
||||||
|
dsp dmem write 0022 = f795
|
||||||
|
Coefficient Read @ 1259 = 6143
|
||||||
|
dsp dmem read 1259 = 6143
|
||||||
|
Coefficient Read @ 16fe = 0008
|
||||||
|
dsp dmem read 16fe = 0008
|
||||||
|
dsp dmem write 0023 = c1df
|
||||||
|
dsp dmem read 0008 = 804b
|
||||||
|
dsp dmem read 0009 = 9b80
|
||||||
|
call at 01b2 -> 808b
|
||||||
|
STARTED 01b1 -> 808b
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8049 IX1: a094 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 804b AX0.L: 9b80 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 590c AC0.M: c1df AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: a094 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3878
|
||||||
|
dsp dmem write ffce = 804b
|
||||||
|
dsp dmem write ffcf = 9b80
|
||||||
|
dsp dmem write ffc9 = 0001
|
||||||
|
dsp dmem write ffcd = 0020
|
||||||
|
dsp dmem write ffcb = 0008
|
||||||
|
dsp dmem read ffc9 = 0001
|
||||||
|
STOPPED: 01b3
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0002 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 8049 IX1: a094 IX2: 3f80 IX3: 0000
|
||||||
|
AX0.H: 804b AX0.L: 9b80 AX1.H: 0020 AX1.L: 0008
|
||||||
|
AC0.H: 0000 AC0.M: 0000 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: a094 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 3864
|
||||||
|
|
||||||
|
// skip more boring stuff
|
||||||
|
|
||||||
|
// back to original ucode
|
||||||
|
// runs two DMAs!
|
||||||
|
STARTED 80b5 -> 80b5
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0010 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 0049 IX1: 36a0 IX2: 0000 IX3: 1d20
|
||||||
|
AX0.H: 004b AX0.L: 2a00 AX1.H: 0000 AX1.L: 2000
|
||||||
|
AC0.H: 0000 AC0.M: 8000 AC0.L: 0000
|
||||||
|
AC1.H: 0034 AC1.M: a094 AC1.L: 0008
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 2060
|
||||||
|
80be : dsp dmem write ffce = 004b
|
||||||
|
80c0 : dsp dmem write ffcf = 2a00
|
||||||
|
80c4 : dsp dmem write ffc9 = 0000
|
||||||
|
80c6 : dsp dmem write ffcd = 0000
|
||||||
|
80c8 : dsp dmem write ffcb = 2000
|
||||||
|
DMA pc: 80c8, Control: 0004, Address: 004b2a00, DSP Address: 0000, Size: 2000
|
||||||
|
*** ddma_in RAM (0x004b2a00) -> DRAM_DSP (0x0000) : size (0x00002000)
|
||||||
|
80ca : dsp dmem read ffc9 = 0000
|
||||||
|
80d5 : dsp dmem write ffce = 0049
|
||||||
|
80d7 : dsp dmem write ffcf = 36a0
|
||||||
|
80db : dsp dmem write ffc9 = 0002
|
||||||
|
80dd : dsp dmem write ffcd = 0000
|
||||||
|
80df : dsp dmem write ffcb = 1d20
|
||||||
|
DMA pc: 80df, Control: 0006, Address: 004936a0, DSP Address: 0000, Size: 1d20
|
||||||
|
23:17:191 Core/HW/DSPLLE/DSPHost.cpp:70 N[DSPLLE]: g_dsp.iram_crc: 2fcdf1ec
|
||||||
|
23:17:213 Core/DSP/DSPHWInterface.cpp:264 N[DSPLLE]: *** Copy new UCode from 0x004936a0 to 0x0000 (crc: 2fcdf1ec)
|
||||||
|
80e1 : dsp dmem read ffc9 = 0002
|
||||||
|
STOPPED: 80e5 -> 0010
|
||||||
|
== Registers ==
|
||||||
|
AR0: 0010 AR1: 002d AR2: 0017 AR3: 0017
|
||||||
|
IX0: 0049 IX1: 36a0 IX2: 0000 IX3: 1d20
|
||||||
|
AX0.H: 004b AX0.L: 2a00 AX1.H: 0000 AX1.L: 2000
|
||||||
|
AC0.H: 0000 AC0.M: 0002 AC0.L: 0000
|
||||||
|
AC1.H: 0000 AC1.M: 1d20 AC1.L: 0000
|
||||||
|
PROD: 0000000000070000
|
||||||
|
SR: 2060
|
||||||
File diff suppressed because it is too large
Load Diff
|
|
@ -57,40 +57,79 @@ param5:
|
||||||
lr $AR0, @CMBL
|
lr $AR0, @CMBL
|
||||||
jmp 0x80b5
|
jmp 0x80b5
|
||||||
|
|
||||||
wait_for_dsp_mbox:
|
|
||||||
lrs $AC0.M, @DMBH
|
|
||||||
andcf $AC0.M, #0x8000
|
|
||||||
jlz wait_for_dsp_mbox+#IROM_BASE
|
|
||||||
ret
|
|
||||||
|
|
||||||
wait_for_cpu_mbox:
|
|
||||||
lrs $AC0.M, @CMBH
|
|
||||||
andcf $AC0.M, #0x8000
|
|
||||||
jlnz wait_for_cpu_mbox+#IROM_BASE
|
|
||||||
ret
|
|
||||||
|
|
||||||
wait_dma:
|
wait_dma:
|
||||||
lrs $AC0.M, @DSCR
|
lrs $AC0.M, @DSCR
|
||||||
andcf $AC0.M, #0x0004
|
andcf $AC0.M, #0x0004
|
||||||
jlz wait_dma+#IROM_BASE
|
jlz wait_dma+#IROM_BASE
|
||||||
ret
|
ret
|
||||||
|
|
||||||
bootucode:
|
WARNPC 0x78
|
||||||
|
ORG 0x78
|
||||||
|
; called by GBA ucode
|
||||||
|
wait_for_cpu_mbox:
|
||||||
|
lrs $AC0.M, @CMBH
|
||||||
|
andcf $AC0.M, #0x8000
|
||||||
|
jlnz wait_for_cpu_mbox+#IROM_BASE
|
||||||
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x7e
|
||||||
|
ORG 0x7e
|
||||||
|
; called by GBA ucode
|
||||||
|
wait_for_dsp_mbox:
|
||||||
|
lrs $AC0.M, @DMBH
|
||||||
|
andcf $AC0.M, #0x8000
|
||||||
|
jlz wait_for_dsp_mbox+#IROM_BASE
|
||||||
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x8b
|
||||||
|
ORG 0x8b
|
||||||
|
; called by GBA ucode
|
||||||
|
dram_to_cpu:
|
||||||
|
srs @DSMAH, $AX0.H
|
||||||
|
srs @DSMAL, $AX0.L
|
||||||
|
si @DSCR, #0x1
|
||||||
|
srs @DSPA, $AX1.H
|
||||||
|
srs @DSBL, $AX1.L
|
||||||
|
call wait_dma+#IROM_BASE
|
||||||
|
ret
|
||||||
|
|
||||||
WARNPC 0xb5
|
WARNPC 0xb5
|
||||||
ORG 0xb5
|
ORG 0xb5
|
||||||
sub_80b5:
|
bootucode:
|
||||||
set16
|
set16
|
||||||
clr $ACC1
|
clr $ACC0
|
||||||
clr $ACC0
|
mrr $AC0.M, $AX1.L
|
||||||
lris $AC0.M, #0x2
|
andi $AC0.M, #0xffff
|
||||||
sr @DSCR, $AC0.M
|
jz bootucode_ix+#IROM_BASE
|
||||||
sr @DSMAH, $IX0
|
|
||||||
sr @DSMAL, $IX1
|
WARNPC 0xbc
|
||||||
sr @DSPA, $IX2
|
ORG 0xbc
|
||||||
sr @DSBL, $IX3
|
; called by GBA ucode
|
||||||
call wait_dma+#IROM_BASE
|
bootucode_ax:
|
||||||
jmpr $AR0
|
lris $AC0.M, #0
|
||||||
|
srs @DSCR, $AC0.M
|
||||||
|
srs @DSMAH, $AX0.H
|
||||||
|
srs @DSMAL, $AX0.L
|
||||||
|
srs @DSPA, $AX1.H
|
||||||
|
srs @DSBL, $AX1.L
|
||||||
|
call wait_dma+#IROM_BASE
|
||||||
|
|
||||||
|
bootucode_ix:
|
||||||
|
mrr $AC0.M, $IX3
|
||||||
|
andi $AC0.M, #0xffff
|
||||||
|
jz bootucode_epilogue+#IROM_BASE
|
||||||
|
lris $AC0.M, #0x2
|
||||||
|
srs @DSCR, $AC0.M
|
||||||
|
sr @DSMAH, $IX0
|
||||||
|
sr @DSMAL, $IX1
|
||||||
|
sr @DSPA, $IX2
|
||||||
|
sr @DSBL, $IX3
|
||||||
|
call wait_dma+#IROM_BASE
|
||||||
|
|
||||||
|
bootucode_epilogue:
|
||||||
|
clr $ACC1
|
||||||
|
lr $AC1.M, @DSBL
|
||||||
|
jmpr $AR0
|
||||||
|
|
||||||
WARNPC 0xe7
|
WARNPC 0xe7
|
||||||
ORG 0xe7
|
ORG 0xe7
|
||||||
|
|
@ -117,6 +156,21 @@ mix_two_add:
|
||||||
mrr $AX0.L, $IX0
|
mrr $AX0.L, $IX0
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x1f4
|
||||||
|
ORG 0x1f4
|
||||||
|
; used by GBA ucode for joyboot length and is the end of some mixing function
|
||||||
|
; (for an example of hitting the full function, try running the main menu of
|
||||||
|
; Metroid Prime using the Nintendo DSP ROM).
|
||||||
|
sub_81f4:
|
||||||
|
asr16'ir $ACC1 : $AR1
|
||||||
|
clr's $ACC0 : @$AR3, $AC1.M ; AC1.M is always #0x0 here.
|
||||||
|
; necessary both to match register state of official ROM, and for the
|
||||||
|
; following mul. could also be mrr $AX1.H, $AC0.M (before clearing ACC0).
|
||||||
|
mrr $AX1.H, $AX0.H
|
||||||
|
; make the product register match.
|
||||||
|
mul's $AX1.L, $AX1.H : @$AR3, $AC1.L
|
||||||
|
ret
|
||||||
|
|
||||||
WARNPC 0x1f9
|
WARNPC 0x1f9
|
||||||
ORG 0x1f9
|
ORG 0x1f9
|
||||||
; Args:
|
; Args:
|
||||||
|
|
@ -158,6 +212,18 @@ mix_two_add_ramp:
|
||||||
mrr $AX0.L, $IX1
|
mrr $AX0.L, $IX1
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x458
|
||||||
|
ORG 0x458
|
||||||
|
; used by GBA ucode for joyboot length
|
||||||
|
sub_8458:
|
||||||
|
; AC1.L after = AC1.M before + 7. this looks really stupid, but matches
|
||||||
|
; captured traces and seems to work.
|
||||||
|
addis $AC1.M, #0x7
|
||||||
|
asr16 $ACC1
|
||||||
|
srri @$AR3, $AC1.M ; or just #0x0.
|
||||||
|
srri @$AR3, $AC1.L
|
||||||
|
ret
|
||||||
|
|
||||||
WARNPC 0x45d
|
WARNPC 0x45d
|
||||||
ORG 0x45d
|
ORG 0x45d
|
||||||
mix_add_ramp:
|
mix_add_ramp:
|
||||||
|
|
@ -197,5 +263,48 @@ ____mix_add_ramp_end_loop:
|
||||||
mrr $AR3, $IX2
|
mrr $AR3, $IX2
|
||||||
ret
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x723
|
||||||
|
ORG 0x723
|
||||||
|
; called by GBA ucode
|
||||||
|
sub_8723:
|
||||||
|
; in GBA-HLE, the nonce challenge is XOR'd with 0x6f646573, which happens
|
||||||
|
; to match the values of the AX1.H register across these two calls.
|
||||||
|
xorr $AC1.M, $AX1.H
|
||||||
|
; the value of @AR2 is always the same as AC1.M after
|
||||||
|
srrd @$AR2, $AC1.M
|
||||||
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x809
|
||||||
|
ORG 0x809
|
||||||
|
; called by GBA ucode
|
||||||
|
sub_8809:
|
||||||
|
; AR2 is the only addressing register that corresponds to the dmem writes
|
||||||
|
; could be AC1.L or AX0.L in the second call, but can't be AX0.L in the
|
||||||
|
; third call.
|
||||||
|
srr @$AR2, $AC1.L
|
||||||
|
; AC1.M after calling always look like either AC1.M | AC0.M or
|
||||||
|
; AC1.M | AX0.H. TODO: Why pick AX0.H?
|
||||||
|
orr $AC1.M, $AX0.H
|
||||||
|
; the second dmem write is incremented only in calls #3A and #3B. There,
|
||||||
|
; IX2 is the only register set to 1, and it's specifically set to 1 in the
|
||||||
|
; ucode. It's set to 0 in the first two calls.
|
||||||
|
addarn $AR2, $IX2
|
||||||
|
; obvious
|
||||||
|
srri @$AR2, $AC1.M
|
||||||
|
ret
|
||||||
|
|
||||||
|
WARNPC 0x8e5
|
||||||
|
ORG 0x8e5
|
||||||
|
; used by GBA ucode for challenge nonce, logo palette/speed, and joyboot length
|
||||||
|
sub_88e5:
|
||||||
|
dar $AR1 ; always gets decremented, no effect on rest of function
|
||||||
|
lrri $AC1.M, @$AR2
|
||||||
|
lrrd $AC1.L, @$AR2
|
||||||
|
add $ACC0, $ACC1 ; signed addition
|
||||||
|
orr $AC0.M, $AX0.H
|
||||||
|
srri @$AR2, $AC0.M
|
||||||
|
srr @$AR2, $AC0.L
|
||||||
|
ret
|
||||||
|
|
||||||
WARNPC 0x1000
|
WARNPC 0x1000
|
||||||
ORG 0x1000
|
ORG 0x1000
|
||||||
|
|
|
||||||
|
|
@ -1,3 +1,16 @@
|
||||||
|
Legal GC/WII DSP IROM replacement (v0.3)
|
||||||
|
-------------------------------------------------------
|
||||||
|
|
||||||
|
- coef: Explicitly set 23 different values that are used by GBA UCode, and
|
||||||
|
tweaked overall parameters to more closely match those 23 values.
|
||||||
|
- irom: Moved a few functions to their proper places, updated BootUCode to
|
||||||
|
configure DMA transfers using AX registers as well as IX registers (the GBA
|
||||||
|
UCode uses this to do two sequential transfers in one call), and added
|
||||||
|
partial functions used by GBA UCode.
|
||||||
|
|
||||||
|
ligfx
|
||||||
|
2/june/2017
|
||||||
|
|
||||||
Legal GC/WII DSP IROM replacement (v0.2.1)
|
Legal GC/WII DSP IROM replacement (v0.2.1)
|
||||||
-------------------------------------------------------
|
-------------------------------------------------------
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,15 +1,18 @@
|
||||||
from numpy import *
|
from numpy import *
|
||||||
from struct import pack
|
from struct import pack
|
||||||
|
|
||||||
def pack_coefs(c):
|
def convert_coefs(c):
|
||||||
cw = list(zip(c[ :128][::-1],
|
cw = list(zip(c[ :128][::-1],
|
||||||
c[128:256][::-1],
|
c[128:256][::-1],
|
||||||
c[256:384][::-1],
|
c[256:384][::-1],
|
||||||
c[384: ][::-1]))
|
c[384: ][::-1]))
|
||||||
m = max(sum(x) for x in cw)
|
m = max(sum(x) for x in cw)
|
||||||
return b''.join(pack('>4h', *(int(round(n / m * 32767)) for n in x)) for x in cw)
|
return [int(round(n / m * 32767)) & 0xffff for x in cw for n in x]
|
||||||
|
|
||||||
x = linspace(-2, 2, 512, endpoint=False)
|
def pack_coefs(short_coefs):
|
||||||
|
return b''.join(pack('>H', c) for c in short_coefs)
|
||||||
|
|
||||||
|
x = linspace(-2, 2, 512, endpoint=True)
|
||||||
|
|
||||||
w1 = hamming(512)
|
w1 = hamming(512)
|
||||||
w2 = kaiser(512, pi * 9/4)
|
w2 = kaiser(512, pi * 9/4)
|
||||||
|
|
@ -18,8 +21,39 @@ coef_1 = [sinc(n * 0.5) for n in x] * w1
|
||||||
coef_2 = [sinc(n * 0.75) for n in x] * w2
|
coef_2 = [sinc(n * 0.75) for n in x] * w2
|
||||||
coef_3 = [sinc(n) for n in x] * w1
|
coef_3 = [sinc(n) for n in x] * w1
|
||||||
|
|
||||||
|
short_coefs = convert_coefs(coef_1) + convert_coefs(coef_2) + convert_coefs(coef_3) + [0] * 512
|
||||||
|
|
||||||
|
# needed for GBA ucode
|
||||||
|
gba_coefs = (
|
||||||
|
(0x03b, 0x0065),
|
||||||
|
(0x043, 0x0076),
|
||||||
|
(0x0ca, 0x3461),
|
||||||
|
(0x0e2, 0x376f),
|
||||||
|
(0x1b8, 0x007f),
|
||||||
|
(0x1b8, 0x007f),
|
||||||
|
(0x1f8, 0x0009),
|
||||||
|
(0x1fc, 0x0003),
|
||||||
|
(0x229, 0x657c),
|
||||||
|
(0x231, 0x64fc),
|
||||||
|
(0x259, 0x6143),
|
||||||
|
(0x285, 0x5aff),
|
||||||
|
(0x456, 0x102f),
|
||||||
|
(0x468, 0xf808),
|
||||||
|
(0x491, 0x6a0f),
|
||||||
|
(0x5f1, 0x0200),
|
||||||
|
(0x5f6, 0x7f65),
|
||||||
|
(0x65b, 0x0000),
|
||||||
|
(0x66b, 0x0000),
|
||||||
|
(0x66c, 0x06f2),
|
||||||
|
(0x6fe, 0x0008),
|
||||||
|
(0x723, 0xffe0),
|
||||||
|
(0x766, 0x0273),
|
||||||
|
)
|
||||||
|
for (addr, value) in gba_coefs:
|
||||||
|
old_value = short_coefs[addr]
|
||||||
|
if old_value != value:
|
||||||
|
print("At %04x: replacing %04x with %04x (diff. of % #x)" % (addr, old_value, value, value - old_value))
|
||||||
|
short_coefs[addr] = value
|
||||||
|
|
||||||
with open('dsp_coef.bin', 'wb') as f:
|
with open('dsp_coef.bin', 'wb') as f:
|
||||||
f.write(pack_coefs(coef_1))
|
f.write(pack_coefs(short_coefs))
|
||||||
f.write(pack_coefs(coef_2))
|
|
||||||
f.write(pack_coefs(coef_3))
|
|
||||||
f.write(b'\0' * 1024)
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue