JitArm64: Track singles in ps_mulsX.
This commit is contained in:
parent
6572790d8b
commit
d185d2f704
|
@ -78,13 +78,19 @@ void JitArm64::ps_mulsX(UGeckoInstruction inst)
|
||||||
|
|
||||||
bool upper = inst.SUBOP5 == 13;
|
bool upper = inst.SUBOP5 == 13;
|
||||||
|
|
||||||
ARM64Reg VA = fpr.R(a, REG_REG);
|
bool singles = fpr.IsSingle(a) && fpr.IsSingle(c);
|
||||||
ARM64Reg VC = fpr.R(c, REG_REG);
|
RegType type = singles ? REG_REG_SINGLE : REG_REG;
|
||||||
ARM64Reg VD = fpr.RW(d, REG_REG);
|
u8 size = singles ? 32 : 64;
|
||||||
|
ARM64Reg (*reg_encoder)(ARM64Reg) = singles ? EncodeRegToDouble : EncodeRegToQuad;
|
||||||
|
|
||||||
|
ARM64Reg VA = fpr.R(a, type);
|
||||||
|
ARM64Reg VC = fpr.R(c, type);
|
||||||
|
ARM64Reg VD = fpr.RW(d, type);
|
||||||
ARM64Reg V0 = fpr.GetReg();
|
ARM64Reg V0 = fpr.GetReg();
|
||||||
|
|
||||||
m_float_emit.DUP(64, V0, VC, upper ? 1 : 0);
|
m_float_emit.DUP(size, reg_encoder(V0), reg_encoder(VC), upper ? 1 : 0);
|
||||||
m_float_emit.FMUL(64, VD, VA, V0);
|
m_float_emit.FMUL(size, reg_encoder(VD), reg_encoder(VA), reg_encoder(V0));
|
||||||
|
|
||||||
fpr.FixSinglePrecision(d);
|
fpr.FixSinglePrecision(d);
|
||||||
fpr.Unlock(V0);
|
fpr.Unlock(V0);
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue