FPURoundMode: revert use of enums in bit-fields
The workaround of using fixed underlying types produces lots of warnings in GCC because now the bit-fields are too small for the value range used for conversion semantics.
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154ad838f4
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d05e205a24
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@ -8,24 +8,29 @@
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namespace FPURoundMode
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namespace FPURoundMode
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{
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{
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enum RoundModes : u32
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// TODO: MSVC currently produces broken code:
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// https://connect.microsoft.com/VisualStudio/feedback/details/828892/vc-2013-miscompilation-with-enums-and-bit-fields
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// Once that is fixed, change types in SetRoundMode(), SetSIMDMode(), and in UReg_FPSCR to 'RoundMode'.
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enum RoundMode
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{
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{
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ROUND_NEAR = 0,
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ROUND_NEAR = 0,
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ROUND_CHOP = 1,
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ROUND_CHOP = 1,
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ROUND_UP = 2,
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ROUND_UP = 2,
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ROUND_DOWN = 3
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ROUND_DOWN = 3
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};
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};
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enum PrecisionModes : u32
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enum PrecisionMode
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{
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{
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PREC_24 = 0,
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PREC_24 = 0,
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PREC_53 = 1,
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PREC_53 = 1,
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PREC_64 = 2
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PREC_64 = 2
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};
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};
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void SetRoundMode(RoundModes mode);
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void SetPrecisionMode(PrecisionModes mode);
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void SetRoundMode(int mode);
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void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode);
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void SetPrecisionMode(PrecisionMode mode);
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode);
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/*
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/*
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* There are two different flavors of float to int conversion:
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* There are two different flavors of float to int conversion:
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@ -21,13 +21,13 @@
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// Generic, do nothing
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// Generic, do nothing
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namespace FPURoundMode
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namespace FPURoundMode
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{
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{
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void SetRoundMode(RoundModes mode)
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void SetRoundMode(int mode)
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{
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{
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}
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}
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void SetPrecisionMode(PrecisionModes mode)
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void SetPrecisionMode(PrecisionMode mode)
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{
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{
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}
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}
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void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode)
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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{
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{
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}
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}
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void SaveSIMDState()
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void SaveSIMDState()
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@ -18,7 +18,7 @@ namespace FPURoundMode
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static u32 saved_sse_state = _mm_getcsr();
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static u32 saved_sse_state = _mm_getcsr();
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static const u32 default_sse_state = _mm_getcsr();
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static const u32 default_sse_state = _mm_getcsr();
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void SetRoundMode(RoundModes mode)
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void SetRoundMode(int mode)
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{
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{
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// Set FPU rounding mode to mimic the PowerPC's
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// Set FPU rounding mode to mimic the PowerPC's
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#ifdef _M_X86_32
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#ifdef _M_X86_32
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@ -49,7 +49,7 @@ namespace FPURoundMode
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#endif
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#endif
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}
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}
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void SetPrecisionMode(PrecisionModes mode)
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void SetPrecisionMode(PrecisionMode mode)
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{
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{
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#ifdef _M_X86_32
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#ifdef _M_X86_32
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// sets the floating-point lib to 53-bit
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// sets the floating-point lib to 53-bit
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@ -75,7 +75,7 @@ namespace FPURoundMode
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#endif
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#endif
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}
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}
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void SetSIMDMode(RoundModes rounding_mode, bool non_ieee_mode)
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void SetSIMDMode(int rounding_mode, bool non_ieee_mode)
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{
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{
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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// OR-mask for disabling FPU exceptions (bits 7-12 in the MXCSR register)
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const u32 EXCEPTION_MASK = 0x1F80;
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const u32 EXCEPTION_MASK = 0x1F80;
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@ -8,7 +8,6 @@
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#pragma once
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#pragma once
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#include "Common/Common.h"
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#include "Common/Common.h"
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#include "Common/FPURoundMode.h"
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// --- Gekko Instruction ---
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// --- Gekko Instruction ---
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@ -390,7 +389,7 @@ union UReg_FPSCR
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struct
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struct
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{
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{
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// Rounding mode (towards: nearest, zero, +inf, -inf)
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// Rounding mode (towards: nearest, zero, +inf, -inf)
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FPURoundMode::RoundModes RN : 2;
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u32 RN : 2;
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// Non-IEEE mode enable (aka flush-to-zero)
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// Non-IEEE mode enable (aka flush-to-zero)
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u32 NI : 1;
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u32 NI : 1;
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// Inexact exception enable
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// Inexact exception enable
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@ -49,7 +49,7 @@ static void FPSCRtoFPUSettings(UReg_FPSCR fp)
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}
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}
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// Set SSE rounding mode and denormal handling
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// Set SSE rounding mode and denormal handling
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FPURoundMode::SetSIMDMode(FPSCR.RN, FPSCR.NI);
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FPURoundMode::SetSIMDMode(fp.RN, fp.NI);
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}
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}
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void Interpreter::mtfsb0x(UGeckoInstruction _inst)
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void Interpreter::mtfsb0x(UGeckoInstruction _inst)
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