From cf8e8c91b629e1e7e28ad3e56a422ede936353ff Mon Sep 17 00:00:00 2001
From: Ryan Houdek <Sonicadvance1@Gmail.com>
Date: Sat, 3 Aug 2013 00:48:09 +0000
Subject: [PATCH] [ARM] Implement lha and fix lfs.

---
 Source/Core/Core/Src/PowerPC/JitArm32/Jit.h   |  1 +
 .../Src/PowerPC/JitArm32/JitArm_LoadStore.cpp | 49 +++++++++++++++++++
 .../JitArm32/JitArm_LoadStoreFloating.cpp     |  6 +--
 .../Src/PowerPC/JitArm32/JitArm_Tables.cpp    |  2 +-
 4 files changed, 53 insertions(+), 5 deletions(-)

diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
index e5a07b3bac..57c1e5bf8e 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/Jit.h
@@ -173,6 +173,7 @@ public:
 	void icbi(UGeckoInstruction _inst);
 	void lbz(UGeckoInstruction _inst);
 	void lhz(UGeckoInstruction _inst);
+	void lha(UGeckoInstruction _inst);
 	void lwz(UGeckoInstruction _inst);
 	void lwzx(UGeckoInstruction _inst);
 	void stb(UGeckoInstruction _inst);
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
index bd13100695..3606784aaf 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStore.cpp
@@ -453,6 +453,55 @@ void JitArm::lhz(UGeckoInstruction inst)
 #endif
 	SetJumpTarget(DoNotLoad);
 }
+void JitArm::lha(UGeckoInstruction inst)
+{
+	INSTRUCTION_START
+	JITDISABLE(LoadStore)
+
+	ARMReg rA = gpr.GetReg();
+	ARMReg rB = gpr.GetReg();
+	ARMReg RD = gpr.R(inst.RD);
+	LDR(rA, R9, PPCSTATE_OFF(Exceptions));
+	CMP(rA, EXCEPTION_DSI);
+	FixupBranch DoNotLoad = B_CC(CC_EQ);
+#if 0 // FASTMEM
+	// Backpatch route
+	// Gets loaded in to RD
+	// Address is in R10
+	gpr.Unlock(rA, rB);
+	if (inst.RA)
+	{
+		ARMReg RA = gpr.R(inst.RA);
+		MOV(R10, RA); // - 4
+	}
+	else
+		MOV(R10, 0); // - 4
+
+	LoadToReg(RD, R10, 16, (u32)inst.SIMM_16);	
+#else
+
+	if (inst.RA)
+	{
+		MOVI2R(rB, inst.SIMM_16);
+		ARMReg RA = gpr.R(inst.RA);
+		ADD(rB, rB, RA);
+	}
+	else	
+		MOVI2R(rB, (u32)inst.SIMM_16);
+	
+	MOVI2R(rA, (u32)&Memory::Read_U16);	
+	PUSH(4, R0, R1, R2, R3);
+	MOV(R0, rB);
+	BL(rA);
+	MOV(rA, R0);
+	SXTH(rA, rA);
+	POP(4, R0, R1, R2, R3);
+	MOV(RD, rA);
+	gpr.Unlock(rA, rB);
+#endif
+	SetJumpTarget(DoNotLoad);
+}
+
 void JitArm::lwz(UGeckoInstruction inst)
 {
 	INSTRUCTION_START
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp
index 708aff9022..25b02e3511 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_LoadStoreFloating.cpp
@@ -36,7 +36,6 @@ void JitArm::lfs(UGeckoInstruction inst)
 {
 	INSTRUCTION_START
 	JITDISABLE(LoadStoreFloating)
-	Default(inst); return;
 
 	ARMReg rA = gpr.GetReg();
 	ARMReg rB = gpr.GetReg();
@@ -60,9 +59,8 @@ void JitArm::lfs(UGeckoInstruction inst)
 	PUSH(4, R0, R1, R2, R3);
 	MOV(R0, rB);
 	BL(rA);
-	// XXX: Need to use VCVT here.
-	VMOV(v0, D0);
-	VMOV(v1, D0);
+	VCVT(v0, S0, 0);
+	VCVT(v1, S0, 0);
 	POP(4, R0, R1, R2, R3);
 	
 	gpr.Unlock(rA, rB);
diff --git a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp
index 3b97640ff2..be971f93e5 100644
--- a/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp
+++ b/Source/Core/Core/Src/PowerPC/JitArm32/JitArm_Tables.cpp
@@ -84,7 +84,7 @@ static GekkoOPTemplate primarytable[] =
 	{35, &JitArm::Default}, //"lbzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}},
 	{40, &JitArm::lhz}, //"lhz",  OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},
 	{41, &JitArm::Default}, //"lhzu", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}},
-	{42, &JitArm::Default}, //"lha",  OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},
+	{42, &JitArm::lha}, //"lha",  OPTYPE_LOAD, FL_OUT_D | FL_IN_A}},
 	{43, &JitArm::Default}, //"lhau", OPTYPE_LOAD, FL_OUT_D | FL_OUT_A | FL_IN_A}},
 
 	{44, &JitArm::sth}, //"sth",  OPTYPE_STORE, FL_IN_A | FL_IN_S}},