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Enabled memory breakpoints under JIT in the debugger.

This commit is contained in:
skidau 2011-11-05 19:42:06 +11:00
parent 9eaf20cc44
commit cc6f90c7d5
2 changed files with 32 additions and 1 deletions
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6
Source/Core/Core/Src/PowerPC/Jit64IL/IR_X86.cpp
View File

@ -1347,6 +1347,12 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
Core::g_CoreStartupParameter.iTLBHack) { Core::g_CoreStartupParameter.iTLBHack) {
mem_mask |= Memory::ADDR_MASK_MEM1; mem_mask |= Memory::ADDR_MASK_MEM1;
} }
#ifdef ENABLE_MEM_CHECK
if (Core::g_CoreStartupParameter.bEnableDebugging)
{
mem_mask |= Memory::EXRAM_MASK;
}
#endif
Jit->TEST(32, regLocForInst(RI, getOp2(I)), Imm32(mem_mask)); Jit->TEST(32, regLocForInst(RI, getOp2(I)), Imm32(mem_mask));
FixupBranch safe = Jit->J_CC(CC_NZ); FixupBranch safe = Jit->J_CC(CC_NZ);
// Fast routine // Fast routine

27
Source/Core/Core/Src/PowerPC/JitCommon/Jit_Util.cpp
View File

@ -118,7 +118,11 @@ void EmuCodeBlock::UnsafeLoadToEAX(const Gen::OpArg & opAddress, int accessSize,
void EmuCodeBlock::SafeLoadToEAX(const Gen::OpArg & opAddress, int accessSize, s32 offset, bool signExtend) void EmuCodeBlock::SafeLoadToEAX(const Gen::OpArg & opAddress, int accessSize, s32 offset, bool signExtend)
{ {
#ifdef ENABLE_MEM_CHECK
if (Core::g_CoreStartupParameter.bUseFastMem && (accessSize == 32) && !Core::g_CoreStartupParameter.bMMU && !Core::g_CoreStartupParameter.bEnableDebugging)
#else
if (Core::g_CoreStartupParameter.bUseFastMem && (accessSize == 32) && !Core::g_CoreStartupParameter.bMMU) if (Core::g_CoreStartupParameter.bUseFastMem && (accessSize == 32) && !Core::g_CoreStartupParameter.bMMU)
#endif
{ {
// BackPatch only supports 32-bits accesses // BackPatch only supports 32-bits accesses
UnsafeLoadToEAX(opAddress, accessSize, offset, signExtend); UnsafeLoadToEAX(opAddress, accessSize, offset, signExtend);
@ -130,7 +134,14 @@ void EmuCodeBlock::SafeLoadToEAX(const Gen::OpArg & opAddress, int accessSize, s
{ {
mem_mask |= Memory::ADDR_MASK_MEM1; mem_mask |= Memory::ADDR_MASK_MEM1;
} }
#ifdef ENABLE_MEM_CHECK
if (Core::g_CoreStartupParameter.bEnableDebugging)
{
mem_mask |= Memory::EXRAM_MASK;
}
#endif
if (opAddress.IsImm()) if (opAddress.IsImm())
{ {
u32 address = (u32)opAddress.offset + offset; u32 address = (u32)opAddress.offset + offset;
@ -232,6 +243,13 @@ void EmuCodeBlock::SafeWriteRegToReg(X64Reg reg_value, X64Reg reg_addr, int acce
mem_mask |= Memory::ADDR_MASK_MEM1; mem_mask |= Memory::ADDR_MASK_MEM1;
} }
#ifdef ENABLE_MEM_CHECK
if (Core::g_CoreStartupParameter.bEnableDebugging)
{
mem_mask |= Memory::EXRAM_MASK;
}
#endif
TEST(32, R(reg_addr), Imm32(mem_mask)); TEST(32, R(reg_addr), Imm32(mem_mask));
FixupBranch fast = J_CC(CC_Z); FixupBranch fast = J_CC(CC_Z);
@ -256,6 +274,13 @@ void EmuCodeBlock::SafeWriteFloatToReg(X64Reg xmm_value, X64Reg reg_addr)
mem_mask |= Memory::ADDR_MASK_MEM1; mem_mask |= Memory::ADDR_MASK_MEM1;
} }
#ifdef ENABLE_MEM_CHECK
if (Core::g_CoreStartupParameter.bEnableDebugging)
{
mem_mask |= Memory::EXRAM_MASK;
}
#endif
TEST(32, R(reg_addr), Imm32(mem_mask)); TEST(32, R(reg_addr), Imm32(mem_mask));
if (false && cpu_info.bSSSE3) { if (false && cpu_info.bSSSE3) {
// This path should be faster but for some reason it causes errors so I've disabled it. // This path should be faster but for some reason it causes errors so I've disabled it.