BPMemory/XFMemory: Convert defines to enums
These actually convey a concrete type, as well as also providing a symbolic constant during debugging.
This commit is contained in:
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@ -11,154 +11,239 @@
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#pragma pack(4)
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#define BPMEM_GENMODE 0x00
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#define BPMEM_DISPLAYCOPYFILTER 0x01 // 0x01 + 4
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#define BPMEM_IND_MTXA 0x06 // 0x06 + (3 * 3)
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#define BPMEM_IND_MTXB 0x07 // 0x07 + (3 * 3)
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#define BPMEM_IND_MTXC 0x08 // 0x08 + (3 * 3)
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#define BPMEM_IND_IMASK 0x0F
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#define BPMEM_IND_CMD 0x10 // 0x10 + 16
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#define BPMEM_SCISSORTL 0x20
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#define BPMEM_SCISSORBR 0x21
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#define BPMEM_LINEPTWIDTH 0x22
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#define BPMEM_PERF0_TRI 0x23
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#define BPMEM_PERF0_QUAD 0x24
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#define BPMEM_RAS1_SS0 0x25
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#define BPMEM_RAS1_SS1 0x26
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#define BPMEM_IREF 0x27
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#define BPMEM_TREF 0x28 // 0x28 + 8
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#define BPMEM_SU_SSIZE 0x30 // 0x30 + (2 * 8)
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#define BPMEM_SU_TSIZE 0x31 // 0x31 + (2 * 8)
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#define BPMEM_ZMODE 0x40
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#define BPMEM_BLENDMODE 0x41
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#define BPMEM_CONSTANTALPHA 0x42
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#define BPMEM_ZCOMPARE 0x43
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#define BPMEM_FIELDMASK 0x44
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#define BPMEM_SETDRAWDONE 0x45
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#define BPMEM_BUSCLOCK0 0x46
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#define BPMEM_PE_TOKEN_ID 0x47
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#define BPMEM_PE_TOKEN_INT_ID 0x48
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#define BPMEM_EFB_TL 0x49
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#define BPMEM_EFB_BR 0x4A
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#define BPMEM_EFB_ADDR 0x4B
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#define BPMEM_MIPMAP_STRIDE 0x4D
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#define BPMEM_COPYYSCALE 0x4E
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#define BPMEM_CLEAR_AR 0x4F
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#define BPMEM_CLEAR_GB 0x50
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#define BPMEM_CLEAR_Z 0x51
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#define BPMEM_TRIGGER_EFB_COPY 0x52
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#define BPMEM_COPYFILTER0 0x53
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#define BPMEM_COPYFILTER1 0x54
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#define BPMEM_CLEARBBOX1 0x55
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#define BPMEM_CLEARBBOX2 0x56
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#define BPMEM_CLEAR_PIXEL_PERF 0x57
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#define BPMEM_REVBITS 0x58
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#define BPMEM_SCISSOROFFSET 0x59
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#define BPMEM_PRELOAD_ADDR 0x60
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#define BPMEM_PRELOAD_TMEMEVEN 0x61
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#define BPMEM_PRELOAD_TMEMODD 0x62
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#define BPMEM_PRELOAD_MODE 0x63
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#define BPMEM_LOADTLUT0 0x64
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#define BPMEM_LOADTLUT1 0x65
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#define BPMEM_TEXINVALIDATE 0x66
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#define BPMEM_PERF1 0x67
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#define BPMEM_FIELDMODE 0x68
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#define BPMEM_BUSCLOCK1 0x69
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#define BPMEM_TX_SETMODE0 0x80 // 0x80 + 4
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#define BPMEM_TX_SETMODE1 0x84 // 0x84 + 4
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#define BPMEM_TX_SETIMAGE0 0x88 // 0x88 + 4
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#define BPMEM_TX_SETIMAGE1 0x8C // 0x8C + 4
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#define BPMEM_TX_SETIMAGE2 0x90 // 0x90 + 4
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#define BPMEM_TX_SETIMAGE3 0x94 // 0x94 + 4
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#define BPMEM_TX_SETTLUT 0x98 // 0x98 + 4
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#define BPMEM_TX_SETMODE0_4 0xA0 // 0xA0 + 4
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#define BPMEM_TX_SETMODE1_4 0xA4 // 0xA4 + 4
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#define BPMEM_TX_SETIMAGE0_4 0xA8 // 0xA8 + 4
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#define BPMEM_TX_SETIMAGE1_4 0xAC // 0xA4 + 4
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#define BPMEM_TX_SETIMAGE2_4 0xB0 // 0xB0 + 4
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#define BPMEM_TX_SETIMAGE3_4 0xB4 // 0xB4 + 4
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#define BPMEM_TX_SETTLUT_4 0xB8 // 0xB8 + 4
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#define BPMEM_TEV_COLOR_ENV 0xC0 // 0xC0 + (2 * 16)
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#define BPMEM_TEV_ALPHA_ENV 0xC1 // 0xC1 + (2 * 16)
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#define BPMEM_TEV_COLOR_RA 0xE0 // 0xE0 + (2 * 4)
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#define BPMEM_TEV_COLOR_BG 0xE1 // 0xE1 + (2 * 4)
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#define BPMEM_FOGRANGE 0xE8 // 0xE8 + 6
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#define BPMEM_FOGPARAM0 0xEE
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#define BPMEM_FOGBMAGNITUDE 0xEF
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#define BPMEM_FOGBEXPONENT 0xF0
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#define BPMEM_FOGPARAM3 0xF1
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#define BPMEM_FOGCOLOR 0xF2
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#define BPMEM_ALPHACOMPARE 0xF3
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#define BPMEM_BIAS 0xF4
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#define BPMEM_ZTEX2 0xF5
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#define BPMEM_TEV_KSEL 0xF6 // 0xF6 + 8
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#define BPMEM_BP_MASK 0xFE
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enum
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{
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BPMEM_GENMODE = 0x00,
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BPMEM_DISPLAYCOPYFILTER = 0x01, // 0x01 + 4
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BPMEM_IND_MTXA = 0x06, // 0x06 + (3 * 3)
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BPMEM_IND_MTXB = 0x07, // 0x07 + (3 * 3)
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BPMEM_IND_MTXC = 0x08, // 0x08 + (3 * 3)
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BPMEM_IND_IMASK = 0x0F,
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BPMEM_IND_CMD = 0x10, // 0x10 + 16
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BPMEM_SCISSORTL = 0x20,
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BPMEM_SCISSORBR = 0x21,
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BPMEM_LINEPTWIDTH = 0x22,
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BPMEM_PERF0_TRI = 0x23,
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BPMEM_PERF0_QUAD = 0x24,
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BPMEM_RAS1_SS0 = 0x25,
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BPMEM_RAS1_SS1 = 0x26,
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BPMEM_IREF = 0x27,
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BPMEM_TREF = 0x28, // 0x28 + 8
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BPMEM_SU_SSIZE = 0x30, // 0x30 + (2 * 8)
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BPMEM_SU_TSIZE = 0x31, // 0x31 + (2 * 8)
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BPMEM_ZMODE = 0x40,
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BPMEM_BLENDMODE = 0x41,
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BPMEM_CONSTANTALPHA = 0x42,
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BPMEM_ZCOMPARE = 0x43,
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BPMEM_FIELDMASK = 0x44,
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BPMEM_SETDRAWDONE = 0x45,
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BPMEM_BUSCLOCK0 = 0x46,
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BPMEM_PE_TOKEN_ID = 0x47,
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BPMEM_PE_TOKEN_INT_ID = 0x48,
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BPMEM_EFB_TL = 0x49,
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BPMEM_EFB_BR = 0x4A,
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BPMEM_EFB_ADDR = 0x4B,
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BPMEM_MIPMAP_STRIDE = 0x4D,
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BPMEM_COPYYSCALE = 0x4E,
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BPMEM_CLEAR_AR = 0x4F,
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BPMEM_CLEAR_GB = 0x50,
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BPMEM_CLEAR_Z = 0x51,
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BPMEM_TRIGGER_EFB_COPY = 0x52,
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BPMEM_COPYFILTER0 = 0x53,
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BPMEM_COPYFILTER1 = 0x54,
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BPMEM_CLEARBBOX1 = 0x55,
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BPMEM_CLEARBBOX2 = 0x56,
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BPMEM_CLEAR_PIXEL_PERF = 0x57,
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BPMEM_REVBITS = 0x58,
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BPMEM_SCISSOROFFSET = 0x59,
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BPMEM_PRELOAD_ADDR = 0x60,
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BPMEM_PRELOAD_TMEMEVEN = 0x61,
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BPMEM_PRELOAD_TMEMODD = 0x62,
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BPMEM_PRELOAD_MODE = 0x63,
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BPMEM_LOADTLUT0 = 0x64,
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BPMEM_LOADTLUT1 = 0x65,
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BPMEM_TEXINVALIDATE = 0x66,
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BPMEM_PERF1 = 0x67,
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BPMEM_FIELDMODE = 0x68,
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BPMEM_BUSCLOCK1 = 0x69,
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BPMEM_TX_SETMODE0 = 0x80, // 0x80 + 4
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BPMEM_TX_SETMODE1 = 0x84, // 0x84 + 4
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BPMEM_TX_SETIMAGE0 = 0x88, // 0x88 + 4
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BPMEM_TX_SETIMAGE1 = 0x8C, // 0x8C + 4
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BPMEM_TX_SETIMAGE2 = 0x90, // 0x90 + 4
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BPMEM_TX_SETIMAGE3 = 0x94, // 0x94 + 4
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BPMEM_TX_SETTLUT = 0x98, // 0x98 + 4
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BPMEM_TX_SETMODE0_4 = 0xA0, // 0xA0 + 4
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BPMEM_TX_SETMODE1_4 = 0xA4, // 0xA4 + 4
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BPMEM_TX_SETIMAGE0_4 = 0xA8, // 0xA8 + 4
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BPMEM_TX_SETIMAGE1_4 = 0xAC, // 0xA4 + 4
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BPMEM_TX_SETIMAGE2_4 = 0xB0, // 0xB0 + 4
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BPMEM_TX_SETIMAGE3_4 = 0xB4, // 0xB4 + 4
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BPMEM_TX_SETTLUT_4 = 0xB8, // 0xB8 + 4
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BPMEM_TEV_COLOR_ENV = 0xC0, // 0xC0 + (2 * 16)
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BPMEM_TEV_ALPHA_ENV = 0xC1, // 0xC1 + (2 * 16)
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BPMEM_TEV_COLOR_RA = 0xE0, // 0xE0 + (2 * 4)
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BPMEM_TEV_COLOR_BG = 0xE1, // 0xE1 + (2 * 4)
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BPMEM_FOGRANGE = 0xE8, // 0xE8 + 6
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BPMEM_FOGPARAM0 = 0xEE,
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BPMEM_FOGBMAGNITUDE = 0xEF,
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BPMEM_FOGBEXPONENT = 0xF0,
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BPMEM_FOGPARAM3 = 0xF1,
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BPMEM_FOGCOLOR = 0xF2,
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BPMEM_ALPHACOMPARE = 0xF3,
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BPMEM_BIAS = 0xF4,
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BPMEM_ZTEX2 = 0xF5,
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BPMEM_TEV_KSEL = 0xF6, // 0xF6 + 8
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BPMEM_BP_MASK = 0xFE,
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};
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// Tev/combiner things
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#define TEVSCALE_1 0
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#define TEVSCALE_2 1
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#define TEVSCALE_4 2
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#define TEVDIVIDE_2 3
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// TEV scaling type
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enum : u32
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{
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TEVSCALE_1 = 0,
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TEVSCALE_2 = 1,
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TEVSCALE_4 = 2,
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TEVDIVIDE_2 = 3
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};
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#define TEVCMP_R8 0
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#define TEVCMP_GR16 1
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#define TEVCMP_BGR24 2
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#define TEVCMP_RGB8 3
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enum : u32
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{
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TEVCMP_R8 = 0,
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TEVCMP_GR16 = 1,
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TEVCMP_BGR24 = 2,
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TEVCMP_RGB8 = 3
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};
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#define TEVOP_ADD 0
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#define TEVOP_SUB 1
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#define TEVCMP_R8_GT 8
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#define TEVCMP_R8_EQ 9
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#define TEVCMP_GR16_GT 10
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#define TEVCMP_GR16_EQ 11
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#define TEVCMP_BGR24_GT 12
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#define TEVCMP_BGR24_EQ 13
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#define TEVCMP_RGB8_GT 14
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#define TEVCMP_RGB8_EQ 15
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#define TEVCMP_A8_GT 14
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#define TEVCMP_A8_EQ 15
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// TEV combiner operator
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enum : u32
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{
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TEVOP_ADD = 0,
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TEVOP_SUB = 1,
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TEVCMP_R8_GT = 8,
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TEVCMP_R8_EQ = 9,
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TEVCMP_GR16_GT = 10,
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TEVCMP_GR16_EQ = 11,
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TEVCMP_BGR24_GT = 12,
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TEVCMP_BGR24_EQ = 13,
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TEVCMP_RGB8_GT = 14,
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TEVCMP_RGB8_EQ = 15,
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TEVCMP_A8_GT = TEVCMP_RGB8_GT,
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TEVCMP_A8_EQ = TEVCMP_RGB8_EQ
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};
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#define TEVCOLORARG_CPREV 0
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#define TEVCOLORARG_APREV 1
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#define TEVCOLORARG_C0 2
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#define TEVCOLORARG_A0 3
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#define TEVCOLORARG_C1 4
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#define TEVCOLORARG_A1 5
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#define TEVCOLORARG_C2 6
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#define TEVCOLORARG_A2 7
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#define TEVCOLORARG_TEXC 8
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#define TEVCOLORARG_TEXA 9
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#define TEVCOLORARG_RASC 10
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#define TEVCOLORARG_RASA 11
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#define TEVCOLORARG_ONE 12
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#define TEVCOLORARG_HALF 13
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#define TEVCOLORARG_KONST 14
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#define TEVCOLORARG_ZERO 15
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// TEV color combiner input
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enum : u32
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{
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TEVCOLORARG_CPREV = 0,
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TEVCOLORARG_APREV = 1,
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TEVCOLORARG_C0 = 2,
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TEVCOLORARG_A0 = 3,
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TEVCOLORARG_C1 = 4,
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TEVCOLORARG_A1 = 5,
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TEVCOLORARG_C2 = 6,
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TEVCOLORARG_A2 = 7,
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TEVCOLORARG_TEXC = 8,
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TEVCOLORARG_TEXA = 9,
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TEVCOLORARG_RASC = 10,
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TEVCOLORARG_RASA = 11,
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TEVCOLORARG_ONE = 12,
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TEVCOLORARG_HALF = 13,
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TEVCOLORARG_KONST = 14,
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TEVCOLORARG_ZERO = 15
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};
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#define TEVALPHAARG_APREV 0
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#define TEVALPHAARG_A0 1
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#define TEVALPHAARG_A1 2
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#define TEVALPHAARG_A2 3
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#define TEVALPHAARG_TEXA 4
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#define TEVALPHAARG_RASA 5
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#define TEVALPHAARG_KONST 6
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#define TEVALPHAARG_ZERO 7
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// TEV alpha combiner input
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enum : u32
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{
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TEVALPHAARG_APREV = 0,
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TEVALPHAARG_A0 = 1,
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TEVALPHAARG_A1 = 2,
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TEVALPHAARG_A2 = 3,
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TEVALPHAARG_TEXA = 4,
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TEVALPHAARG_RASA = 5,
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TEVALPHAARG_KONST = 6,
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TEVALPHAARG_ZERO = 7
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};
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#define GX_TEVPREV 0
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#define GX_TEVREG0 1
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#define GX_TEVREG1 2
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#define GX_TEVREG2 3
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// TEV output registers
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enum : u32
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{
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GX_TEVPREV = 0,
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GX_TEVREG0 = 1,
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GX_TEVREG1 = 2,
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GX_TEVREG2 = 3
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};
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#define ZTEXTURE_DISABLE 0
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#define ZTEXTURE_ADD 1
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#define ZTEXTURE_REPLACE 2
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// Z-texture formats
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enum : u32
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{
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TEV_ZTEX_TYPE_U8 = 0,
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TEV_ZTEX_TYPE_U16 = 1,
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TEV_ZTEX_TYPE_U24 = 2
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};
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#define TevBias_ZERO 0
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#define TevBias_ADDHALF 1
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#define TevBias_SUBHALF 2
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#define TevBias_COMPARE 3
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// Z texture operator
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enum : u32
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{
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ZTEXTURE_DISABLE = 0,
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ZTEXTURE_ADD = 1,
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ZTEXTURE_REPLACE = 2
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};
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// TEV bias value
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enum : u32
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{
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TEVBIAS_ZERO = 0,
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TEVBIAS_ADDHALF = 1,
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TEVBIAS_SUBHALF = 2,
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TEVBIAS_COMPARE = 3
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};
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// Indirect texture format
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enum : u32
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{
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ITF_8 = 0,
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ITF_5 = 1,
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ITF_4 = 2,
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ITF_3 = 3
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};
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// Indirect texture bias
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enum : u32
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{
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ITB_NONE = 0,
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ITB_S = 1,
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ITB_T = 2,
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ITB_ST = 3,
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ITB_U = 4,
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ITB_SU = 5,
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ITB_TU = 6,
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ITB_STU = 7
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};
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// Indirect texture bump alpha
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enum : u32
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{
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ITBA_OFF = 0,
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ITBA_S = 1,
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ITBA_T = 2,
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ITBA_U = 3
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};
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// Indirect texture wrap value
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enum : u32
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{
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ITW_OFF = 0,
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ITW_256 = 1,
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ITW_128 = 2,
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ITW_64 = 3,
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ITW_32 = 4,
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ITW_16 = 5,
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ITW_0 = 6
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};
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union IND_MTXA
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{
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@ -213,32 +298,6 @@ union IND_IMASK
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u32 hex;
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};
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#define TEVSELCC_CPREV 0
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#define TEVSELCC_APREV 1
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#define TEVSELCC_C0 2
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#define TEVSELCC_A0 3
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#define TEVSELCC_C1 4
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#define TEVSELCC_A1 5
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#define TEVSELCC_C2 6
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#define TEVSELCC_A2 7
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#define TEVSELCC_TEXC 8
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#define TEVSELCC_TEXA 9
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#define TEVSELCC_RASC 10
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#define TEVSELCC_RASA 11
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#define TEVSELCC_ONE 12
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#define TEVSELCC_HALF 13
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#define TEVSELCC_KONST 14
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#define TEVSELCC_ZERO 15
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#define TEVSELCA_APREV 0
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#define TEVSELCA_A0 1
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#define TEVSELCA_A1 2
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#define TEVSELCA_A2 3
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#define TEVSELCA_TEXA 4
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#define TEVSELCA_RASA 5
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#define TEVSELCA_KONST 6
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#define TEVSELCA_ZERO 7
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struct TevStageCombiner
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{
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union ColorCombiner
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@ -285,33 +344,6 @@ struct TevStageCombiner
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AlphaCombiner alphaC;
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};
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#define ITF_8 0
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#define ITF_5 1
|
||||
#define ITF_4 2
|
||||
#define ITF_3 3
|
||||
|
||||
#define ITB_NONE 0
|
||||
#define ITB_S 1
|
||||
#define ITB_T 2
|
||||
#define ITB_ST 3
|
||||
#define ITB_U 4
|
||||
#define ITB_SU 5
|
||||
#define ITB_TU 6
|
||||
#define ITB_STU 7
|
||||
|
||||
#define ITBA_OFF 0
|
||||
#define ITBA_S 1
|
||||
#define ITBA_T 2
|
||||
#define ITBA_U 3
|
||||
|
||||
#define ITW_OFF 0
|
||||
#define ITW_256 1
|
||||
#define ITW_128 2
|
||||
#define ITW_64 3
|
||||
#define ITW_32 4
|
||||
#define ITW_16 5
|
||||
#define ITW_0 6
|
||||
|
||||
// several discoveries:
|
||||
// GXSetTevIndBumpST(tevstage, indstage, matrixind)
|
||||
// if ( matrix == 2 ) realmat = 6; // 10
|
||||
|
@ -513,16 +545,6 @@ union ZTex2
|
|||
u32 hex;
|
||||
};
|
||||
|
||||
// Z-texture types (formats)
|
||||
#define TEV_ZTEX_TYPE_U8 0
|
||||
#define TEV_ZTEX_TYPE_U16 1
|
||||
#define TEV_ZTEX_TYPE_U24 2
|
||||
|
||||
#define TEV_ZTEX_DISABLE 0
|
||||
#define TEV_ZTEX_ADD 1
|
||||
#define TEV_ZTEX_REPLACE 2
|
||||
|
||||
|
||||
struct FourTexUnits
|
||||
{
|
||||
TexMode0 texMode0[4];
|
||||
|
|
|
@ -931,7 +931,7 @@ static inline void WriteStage(T& out, pixel_shader_uid_data* uid_data, int n, AP
|
|||
|
||||
out.Write("\t// color combine\n");
|
||||
out.Write("\t%s = clamp(", tevCOutputTable[cc.dest]);
|
||||
if (cc.bias != TevBias_COMPARE)
|
||||
if (cc.bias != TEVBIAS_COMPARE)
|
||||
{
|
||||
WriteTevRegular(out, "rgb", cc.bias, cc.op, cc.clamp, cc.shift);
|
||||
}
|
||||
|
@ -961,7 +961,7 @@ static inline void WriteStage(T& out, pixel_shader_uid_data* uid_data, int n, AP
|
|||
|
||||
out.Write("\t// alpha combine\n");
|
||||
out.Write("\t%s = clamp(", tevAOutputTable[ac.dest]);
|
||||
if (ac.bias != TevBias_COMPARE)
|
||||
if (ac.bias != TEVBIAS_COMPARE)
|
||||
{
|
||||
WriteTevRegular(out, "a", ac.bias, ac.op, ac.clamp, ac.shift);
|
||||
}
|
||||
|
|
|
@ -8,92 +8,126 @@
|
|||
#include "VideoCommon/CPMemory.h"
|
||||
#include "VideoCommon/DataReader.h"
|
||||
|
||||
|
||||
// Lighting
|
||||
|
||||
// Projection
|
||||
enum : u32
|
||||
{
|
||||
XF_TEXPROJ_ST = 0,
|
||||
XF_TEXPROJ_STQ = 1
|
||||
};
|
||||
|
||||
#define XF_TEXPROJ_ST 0
|
||||
#define XF_TEXPROJ_STQ 1
|
||||
// Input form
|
||||
enum : u32
|
||||
{
|
||||
XF_TEXINPUT_AB11 = 0,
|
||||
XF_TEXINPUT_ABC1 = 1
|
||||
};
|
||||
|
||||
#define XF_TEXINPUT_AB11 0
|
||||
#define XF_TEXINPUT_ABC1 1
|
||||
// Texture generation type
|
||||
enum : u32
|
||||
{
|
||||
XF_TEXGEN_REGULAR = 0,
|
||||
XF_TEXGEN_EMBOSS_MAP = 1, // Used when bump mapping
|
||||
XF_TEXGEN_COLOR_STRGBC0 = 2,
|
||||
XF_TEXGEN_COLOR_STRGBC1 = 3
|
||||
};
|
||||
|
||||
#define XF_TEXGEN_REGULAR 0
|
||||
#define XF_TEXGEN_EMBOSS_MAP 1 // used when bump mapping
|
||||
#define XF_TEXGEN_COLOR_STRGBC0 2
|
||||
#define XF_TEXGEN_COLOR_STRGBC1 3
|
||||
// Source row
|
||||
enum : u32
|
||||
{
|
||||
XF_SRCGEOM_INROW = 0, // Input is abc
|
||||
XF_SRCNORMAL_INROW = 1, // Input is abc
|
||||
XF_SRCCOLORS_INROW = 2,
|
||||
XF_SRCBINORMAL_T_INROW = 3, // Input is abc
|
||||
XF_SRCBINORMAL_B_INROW = 4, // Input is abc
|
||||
XF_SRCTEX0_INROW = 5,
|
||||
XF_SRCTEX1_INROW = 6,
|
||||
XF_SRCTEX2_INROW = 7,
|
||||
XF_SRCTEX3_INROW = 8,
|
||||
XF_SRCTEX4_INROW = 9,
|
||||
XF_SRCTEX5_INROW = 10,
|
||||
XF_SRCTEX6_INROW = 11,
|
||||
XF_SRCTEX7_INROW = 12
|
||||
};
|
||||
|
||||
#define XF_SRCGEOM_INROW 0 // input is abc
|
||||
#define XF_SRCNORMAL_INROW 1 // input is abc
|
||||
#define XF_SRCCOLORS_INROW 2
|
||||
#define XF_SRCBINORMAL_T_INROW 3 // input is abc
|
||||
#define XF_SRCBINORMAL_B_INROW 4 // input is abc
|
||||
#define XF_SRCTEX0_INROW 5
|
||||
#define XF_SRCTEX1_INROW 6
|
||||
#define XF_SRCTEX2_INROW 7
|
||||
#define XF_SRCTEX3_INROW 8
|
||||
#define XF_SRCTEX4_INROW 9
|
||||
#define XF_SRCTEX5_INROW 10
|
||||
#define XF_SRCTEX6_INROW 11
|
||||
#define XF_SRCTEX7_INROW 12
|
||||
// Control source
|
||||
enum : u32
|
||||
{
|
||||
GX_SRC_REG = 0,
|
||||
GX_SRC_VTX = 1
|
||||
};
|
||||
|
||||
#define GX_SRC_REG 0
|
||||
#define GX_SRC_VTX 1
|
||||
// Light diffuse attenuation function
|
||||
enum : u32
|
||||
{
|
||||
LIGHTDIF_NONE = 0,
|
||||
LIGHTDIF_SIGN = 1,
|
||||
LIGHTDIF_CLAMP = 2
|
||||
};
|
||||
|
||||
#define LIGHTDIF_NONE 0
|
||||
#define LIGHTDIF_SIGN 1
|
||||
#define LIGHTDIF_CLAMP 2
|
||||
// Light attenuation function
|
||||
enum : u32
|
||||
{
|
||||
LIGHTATTN_NONE = 0, // No attenuation
|
||||
LIGHTATTN_SPEC = 1, // Point light attenuation
|
||||
LIGHTATTN_DIR = 2, // Directional light attenuation
|
||||
LIGHTATTN_SPOT = 3 // Spot light attenuation
|
||||
};
|
||||
|
||||
#define LIGHTATTN_NONE 0 // no attenuation
|
||||
#define LIGHTATTN_SPEC 1 // point light attenuation
|
||||
#define LIGHTATTN_DIR 2 // directional light attenuation
|
||||
#define LIGHTATTN_SPOT 3 // spot light attenuation
|
||||
// Projection type
|
||||
enum : u32
|
||||
{
|
||||
GX_PERSPECTIVE = 0,
|
||||
GX_ORTHOGRAPHIC = 1
|
||||
};
|
||||
|
||||
#define GX_PERSPECTIVE 0
|
||||
#define GX_ORTHOGRAPHIC 1
|
||||
|
||||
#define XFMEM_POSMATRICES 0x000
|
||||
#define XFMEM_POSMATRICES_END 0x100
|
||||
#define XFMEM_NORMALMATRICES 0x400
|
||||
#define XFMEM_NORMALMATRICES_END 0x460
|
||||
#define XFMEM_POSTMATRICES 0x500
|
||||
#define XFMEM_POSTMATRICES_END 0x600
|
||||
#define XFMEM_LIGHTS 0x600
|
||||
#define XFMEM_LIGHTS_END 0x680
|
||||
#define XFMEM_ERROR 0x1000
|
||||
#define XFMEM_DIAG 0x1001
|
||||
#define XFMEM_STATE0 0x1002
|
||||
#define XFMEM_STATE1 0x1003
|
||||
#define XFMEM_CLOCK 0x1004
|
||||
#define XFMEM_CLIPDISABLE 0x1005
|
||||
#define XFMEM_SETGPMETRIC 0x1006
|
||||
#define XFMEM_VTXSPECS 0x1008
|
||||
#define XFMEM_SETNUMCHAN 0x1009
|
||||
#define XFMEM_SETCHAN0_AMBCOLOR 0x100a
|
||||
#define XFMEM_SETCHAN1_AMBCOLOR 0x100b
|
||||
#define XFMEM_SETCHAN0_MATCOLOR 0x100c
|
||||
#define XFMEM_SETCHAN1_MATCOLOR 0x100d
|
||||
#define XFMEM_SETCHAN0_COLOR 0x100e
|
||||
#define XFMEM_SETCHAN1_COLOR 0x100f
|
||||
#define XFMEM_SETCHAN0_ALPHA 0x1010
|
||||
#define XFMEM_SETCHAN1_ALPHA 0x1011
|
||||
#define XFMEM_DUALTEX 0x1012
|
||||
#define XFMEM_SETMATRIXINDA 0x1018
|
||||
#define XFMEM_SETMATRIXINDB 0x1019
|
||||
#define XFMEM_SETVIEWPORT 0x101a
|
||||
#define XFMEM_SETZSCALE 0x101c
|
||||
#define XFMEM_SETZOFFSET 0x101f
|
||||
#define XFMEM_SETPROJECTION 0x1020
|
||||
/*#define XFMEM_SETPROJECTIONB 0x1021
|
||||
#define XFMEM_SETPROJECTIONC 0x1022
|
||||
#define XFMEM_SETPROJECTIOND 0x1023
|
||||
#define XFMEM_SETPROJECTIONE 0x1024
|
||||
#define XFMEM_SETPROJECTIONF 0x1025
|
||||
#define XFMEM_SETPROJECTIONORTHO1 0x1026
|
||||
#define XFMEM_SETPROJECTIONORTHO2 0x1027*/
|
||||
#define XFMEM_SETNUMTEXGENS 0x103f
|
||||
#define XFMEM_SETTEXMTXINFO 0x1040
|
||||
#define XFMEM_SETPOSMTXINFO 0x1050
|
||||
// Registers and register ranges
|
||||
enum
|
||||
{
|
||||
XFMEM_POSMATRICES = 0x000,
|
||||
XFMEM_POSMATRICES_END = 0x100,
|
||||
XFMEM_NORMALMATRICES = 0x400,
|
||||
XFMEM_NORMALMATRICES_END = 0x460,
|
||||
XFMEM_POSTMATRICES = 0x500,
|
||||
XFMEM_POSTMATRICES_END = 0x600,
|
||||
XFMEM_LIGHTS = 0x600,
|
||||
XFMEM_LIGHTS_END = 0x680,
|
||||
XFMEM_ERROR = 0x1000,
|
||||
XFMEM_DIAG = 0x1001,
|
||||
XFMEM_STATE0 = 0x1002,
|
||||
XFMEM_STATE1 = 0x1003,
|
||||
XFMEM_CLOCK = 0x1004,
|
||||
XFMEM_CLIPDISABLE = 0x1005,
|
||||
XFMEM_SETGPMETRIC = 0x1006,
|
||||
XFMEM_VTXSPECS = 0x1008,
|
||||
XFMEM_SETNUMCHAN = 0x1009,
|
||||
XFMEM_SETCHAN0_AMBCOLOR = 0x100a,
|
||||
XFMEM_SETCHAN1_AMBCOLOR = 0x100b,
|
||||
XFMEM_SETCHAN0_MATCOLOR = 0x100c,
|
||||
XFMEM_SETCHAN1_MATCOLOR = 0x100d,
|
||||
XFMEM_SETCHAN0_COLOR = 0x100e,
|
||||
XFMEM_SETCHAN1_COLOR = 0x100f,
|
||||
XFMEM_SETCHAN0_ALPHA = 0x1010,
|
||||
XFMEM_SETCHAN1_ALPHA = 0x1011,
|
||||
XFMEM_DUALTEX = 0x1012,
|
||||
XFMEM_SETMATRIXINDA = 0x1018,
|
||||
XFMEM_SETMATRIXINDB = 0x1019,
|
||||
XFMEM_SETVIEWPORT = 0x101a,
|
||||
XFMEM_SETZSCALE = 0x101c,
|
||||
XFMEM_SETZOFFSET = 0x101f,
|
||||
XFMEM_SETPROJECTION = 0x1020,
|
||||
// XFMEM_SETPROJECTIONB = 0x1021,
|
||||
// XFMEM_SETPROJECTIONC = 0x1022,
|
||||
// XFMEM_SETPROJECTIOND = 0x1023,
|
||||
// XFMEM_SETPROJECTIONE = 0x1024,
|
||||
// XFMEM_SETPROJECTIONF = 0x1025,
|
||||
// XFMEM_SETPROJECTIONORTHO1 = 0x1026,
|
||||
// XFMEM_SETPROJECTIONORTHO2 = 0x1027,
|
||||
XFMEM_SETNUMTEXGENS = 0x103f,
|
||||
XFMEM_SETTEXMTXINFO = 0x1040,
|
||||
XFMEM_SETPOSMTXINFO = 0x1050,
|
||||
};
|
||||
|
||||
union LitChannel
|
||||
{
|
||||
|
|
Loading…
Reference in New Issue