DSPLLE: comments and logging clean up
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3693 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -16,10 +16,13 @@
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// http://code.google.com/p/dolphin-emu/
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// AID / AUDIO_DMA controls pushing audio out to the SRC and then the speakers.
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// The audio DMA pushes audio through a small FIFO 32 bytes at a time, as needed.
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// The audio DMA pushes audio through a small FIFO 32 bytes at a time, as
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// needed.
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// The SRC behind the fifo eats stereo 16-bit data at a sample rate of 32khz,
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// that is, 4 bytes at 32 khz, which is 32 bytes at 4 khz. We thereforce schedule an
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// event that runs at 4khz, that eats audio from the fifo. Thus, we have homebrew audio.
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// that is, 4 bytes at 32 khz, which is 32 bytes at 4 khz. We thereforce
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// schedule an event that runs at 4khz, that eats audio from the fifo. Thus, we
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// have homebrew audio.
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// The AID interrupt is set when the fifo STARTS a transfer. It latches address
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// and count into internal registers and starts copying. This means that the
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@ -236,9 +239,8 @@ void Read16(u16& _uReturnValue, const u32 _iAddress)
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}
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switch (_iAddress & 0xFFFF)
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{
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// ==================================================================================
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// AI_REGS 0x5000+
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// ==================================================================================
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case DSP_MAIL_TO_DSP_HI:
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_uReturnValue = dsp_plugin->DSP_ReadMailboxHigh(true);
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return;
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@ -260,9 +262,7 @@ void Read16(u16& _uReturnValue, const u32 _iAddress)
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(dsp_plugin->DSP_ReadControlRegister() & DSP_CONTROL_MASK);
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return;
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// ==================================================================================
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// AR_REGS 0x501x+
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// ==================================================================================
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case 0x5012:
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_uReturnValue = g_AR_MODE;
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return;
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@ -282,11 +282,10 @@ void Read16(u16& _uReturnValue, const u32 _iAddress)
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case AR_DMA_CNT_H: _uReturnValue = g_arDMA.Cnt.Hex >> 16; return;
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case AR_DMA_CNT_L: _uReturnValue = g_arDMA.Cnt.Hex & 0xFFFF; return;
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// ==================================================================================
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// DMA_REGS 0x5030+
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// ==================================================================================
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case AUDIO_DMA_BYTES_LEFT:
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// Hmm. Would be stupid to ask for bytes left. Assume it wants blocks left.
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// Hmm. Would be stupid to ask for bytes left. Assume it wants
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// blocks left.
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_uReturnValue = g_audioDMA.BlocksLeft;
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return;
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@ -320,10 +319,8 @@ void Write16(const u16 _Value, const u32 _Address)
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switch(_Address & 0xFFFF)
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{
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// ==================================================================================
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// DSP Regs 0x5000+
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// ==================================================================================
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// DSP Regs 0x5000+
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case DSP_MAIL_TO_DSP_HI:
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dsp_plugin->DSP_WriteMailboxHigh(true, _Value);
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break;
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@ -340,9 +337,7 @@ void Write16(const u16 _Value, const u32 _Address)
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_dbg_assert_msg_(DSPINTERFACE, 0, "W16: DSP_MAIL_FROM_DSP_LO");
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break;
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// ==================================================================================
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// Control Register
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// ==================================================================================
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case DSP_CONTROL:
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{
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UDSPControl tmpControl;
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@ -380,11 +375,8 @@ void Write16(const u16 _Value, const u32 _Address)
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}
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break;
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// ==================================================================================
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// AR_REGS 0x501x+
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// DMA back and forth between ARAM and RAM
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// ==================================================================================
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case 0x5012:
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g_AR_MODE = _Value;
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break;
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@ -418,10 +410,8 @@ void Write16(const u16 _Value, const u32 _Address)
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Update_ARAM_DMA();
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break;
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// ==================================================================================
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// Audio DMA_REGS 0x5030+
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// This is the DMA that goes straight out the speaker.
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// ==================================================================================
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case AUDIO_DMA_START_HI:
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g_audioDMA.SourceAddress = (g_audioDMA.SourceAddress & 0xFFFF) | (_Value<<16);
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break;
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@ -459,25 +449,27 @@ void Write16(const u16 _Value, const u32 _Address)
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void UpdateAudioDMA()
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{
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if (g_audioDMA.AudioDMAControl.Enabled && g_audioDMA.BlocksLeft) {
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// Read audio at g_audioDMA.ReadAddress in RAM and push onto an external audio fifo in the emulator,
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// to be mixed with the disc streaming output. If that audio queue fills up, we delay the emulator.
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// Read audio at g_audioDMA.ReadAddress in RAM and push onto an
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// external audio fifo in the emulator, to be mixed with the disc
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// streaming output. If that audio queue fills up, we delay the
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// emulator.
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// TO RESTORE OLD BEHAVIOUR, COMMENT OUT THIS LINE
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dsp_plugin->DSP_SendAIBuffer(g_audioDMA.ReadAddress, AudioInterface::GetDSPSampleRate());
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g_audioDMA.ReadAddress += 32;
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g_audioDMA.BlocksLeft--;
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if (!g_audioDMA.BlocksLeft) {
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// No need to turn off the DMA - we can only get here if we had blocks left when we
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// entered this function, and no longer have any.
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// Latch new parameters
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// No need to turn off the DMA - we can only get here if we had
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// blocks left when we entered this function, and no longer have
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// any. Latch new parameters
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g_audioDMA.BlocksLeft = g_audioDMA.AudioDMAControl.NumBlocks;
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g_audioDMA.ReadAddress = g_audioDMA.SourceAddress;
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// DEBUG_LOG(DSPLLE, "ADMA read addresses: %08x", g_audioDMA.ReadAddress);
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GenerateDSPInterrupt(DSP::INT_AID);
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}
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} else {
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// Send silence. Yeah, it's a bit of a waste to sample rate convert silence.
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// or hm. Maybe we shouldn't do this :)
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// Send silence. Yeah, it's a bit of a waste to sample rate convert
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// silence. or hm. Maybe we shouldn't do this :)
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// dsp->DSP_SendAIBuffer(0, AudioInterface::GetDSPSampleRate());
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}
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}
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@ -504,10 +496,8 @@ void Write32(const u32 _iValue, const u32 _iAddress)
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switch (_iAddress & 0xFFFF)
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{
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// ==================================================================================
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// AR_REGS - i dont know why they are accessed 32 bit too ...
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// ==================================================================================
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// AR_REGS - i dont know why they are accessed 32 bit too ...
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case AR_DMA_MMADDR_H:
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g_arDMA.MMAddr = _iValue;
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break;
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@ -528,9 +518,8 @@ void Write32(const u32 _iValue, const u32 _iAddress)
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}
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}
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// __________________________________________________________________________________________________
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// UpdateInterrupts
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//
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void UpdateInterrupts()
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{
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if ((g_dspState.DSPControl.AID & g_dspState.DSPControl.AID_mask) ||
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@ -613,21 +602,21 @@ void Update_ARAM_DMA()
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GenerateDSPInterrupt(INT_ARAM);
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}
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// =============================================================
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// This is how it works: The game has written sound to RAM, the DSP will read it with
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// this function. SamplePos in the plugin is double the value given here because it
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// works on a nibble level. In Wii addresses can eather be for MEM1 or MEM2, when it wants
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// to read from MEM2 it adds 0x2000000 (in nibble terms) to get up to the MEM2 hardware
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// address. But in our case we use a second pointer and adjust the value down to 0x00...
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// -------------------
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// This is how it works: The game has written sound to RAM, the DSP will read
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// it with this function. SamplePos in the plugin is double the value given
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// here because it works on a nibble level. In Wii addresses can eather be for
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// MEM1 or MEM2, when it wants to read from MEM2 it adds 0x2000000 (in nibble
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// terms) to get up to the MEM2 hardware address. But in our case we use a
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// second pointer and adjust the value down to 0x00...
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u8 ReadARAM(u32 _iAddress)
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{
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//LOGV(DSPINTERFACE, 0, "ARAM (r) 0x%08x", _iAddress);
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (r) 0x%08x", _iAddress);
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// _dbg_assert_(DSPINTERFACE,(_iAddress) < ARAM_SIZE);
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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{
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//LOGV(DSPINTERFACE, 0, "ARAM (r) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (r) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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// Does this make any sense?
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if (_iAddress > WII_MASK)
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@ -649,7 +638,7 @@ void WriteARAM(u8 value, u32 _uAddress)
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{
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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{
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//LOGV(DSPINTERFACE, 0, "ARAM (w) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (w) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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// Does this make any sense?
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if (_uAddress > WII_MASK)
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@ -686,4 +675,4 @@ void WriteARAM(u8 _iValue, u32 _iAddress)
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}*/
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} // end of namespace DSP
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// ===================
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@ -106,12 +106,12 @@ u16 dsp_read_accelerator()
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u16 val;
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// let's do the "hardware" decode
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// DSP_FORMAT is interesting - the Zelda ucode seems to indicate that the bottom
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// two bits specify the "read size" and the address multiplier.
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// The bits above that may be things like sign extention and do/do not use ADPCM.
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// It also remains to be figured out whether there's a difference between the usual
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// accelerator "read address" and 0xd3.
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// let's do the "hardware" decode DSP_FORMAT is interesting - the Zelda
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// ucode seems to indicate that the bottom two bits specify the "read size"
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// and the address multiplier. The bits above that may be things like sign
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// extention and do/do not use ADPCM. It also remains to be figured out
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// whether there's a difference between the usual accelerator "read
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// address" and 0xd3.
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switch (gdsp_ifx_regs[DSP_FORMAT])
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{
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case 0x00: // ADPCM audio
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@ -146,9 +146,9 @@ u16 dsp_read_accelerator()
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DSPCore_SetException(EXP_4);
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DSPCore_SetException(EXP_ACCOV);
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// Somehow, YN1 and YN2 must be initialized with their "loop" values, so yeah,
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// it seems likely that we should raise an exception to let the DSP program do that,
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// at least if DSP_FORMAT == 0x0A.
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// Somehow, YN1 and YN2 must be initialized with their "loop" values,
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// so yeah, it seems likely that we should raise an exception to let
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// the DSP program do that, at least if DSP_FORMAT == 0x0A.
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}
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gdsp_ifx_regs[DSP_ACCAH] = Address >> 16;
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@ -153,51 +153,59 @@ void DSPCore_SetException(u8 level)
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g_dsp.exceptions |= 1 << level;
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}
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// Comming from the CPU
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void DSPCore_CheckExternalInterrupt()
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{
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// check if there is an external interrupt
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if (g_dsp.cr & CR_EXTERNAL_INT && !g_dsp.exception_in_progress_hack)
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{
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSPLLE, "trying External interupt fired");
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NOTICE_LOG(DSPLLE, "Firing external interrupt");
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#endif
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if (dsp_SR_is_flag_set(SR_EXT_INT_ENABLE))
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{
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSPLLE, "External interupt fired");
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#endif
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// level 7 is the interrupt exception
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// Signal the SPU about new mail
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DSPCore_SetException(EXP_INT);
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g_dsp.cr &= ~CR_EXTERNAL_INT;
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} else {
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#ifdef DEBUG_EXP
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ERROR_LOG(DSPLLE, "External interupt firing failed");
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#endif
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}
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}
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}
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void DSPCore_CheckExceptions()
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{
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// it's unclear what to do when there are two exceptions are the same time
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// but for sure they should not be called together therefore the
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// g_dsp.exception_in_progress_hack
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if (g_dsp.exceptions != 0 && !g_dsp.exception_in_progress_hack) {
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSPLLE, "trying exception %d fired", g_dsp.exceptions);
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NOTICE_LOG(DSPLLE, "Firing exception %d", g_dsp.exceptions);
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#endif
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// check exceptions
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// check exceptions should it be 0..7 or 7..0?
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for (int i = 0; i < 8; i++) {
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// Seems 7 must pass or zelda dies
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// Seems exp int is not masked by sr_int_enable
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if (dsp_SR_is_flag_set(SR_INT_ENABLE) || i == EXP_INT) {
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if (g_dsp.exceptions & (1 << i)) {
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_assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception");
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// store pc and sr until RTI
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dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc);
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dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]);
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g_dsp.pc = i * 2;
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g_dsp.pc = i * 2;
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g_dsp.exceptions &= ~(1 << i);
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#ifdef DEBUG_EXP
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NOTICE_LOG(DSPLLE, "exception %d fired");
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#endif
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g_dsp.exception_in_progress_hack = true;
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break;
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}
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} else {
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#ifdef DEBUG_EXP
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ERROR_LOG(DSPLLE, "Firing exception %d failed");
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#endif
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}
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}
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}
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#ifdef DEBUG_EXP
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if (mbx == GDSP_MBOX_DSP)
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{
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NOTICE_LOG(DSPLLE, " - DSP writes mail to mbx low %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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//DSPHost_InterruptRequest();
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//DSPCore_SetException(EXP_INT);
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NOTICE_LOG(DSPLLE, "DSP(WM) B:%i M:0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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} else {
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NOTICE_LOG(DSPLLE, " - CPU writes mail to mbx low %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_CPU), g_dsp.pc);
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// DSPHost_InterruptRequest();
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// DSPCore_SetException(EXP_INT);
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NOTICE_LOG(DSPLLE, "CPU(WM) B:%i M:0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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}
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#endif
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}
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#ifdef DEBUG_EXP
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if (mbx == GDSP_MBOX_DSP)
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{
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NOTICE_LOG(DSPLLE, "- DSP reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.pc);
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// DSPCore_SetException(EXP_INT);
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// DSPHost_InterruptRequest();
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NOTICE_LOG(DSPLLE, "DSP(RM) B:%i M:0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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} else {
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NOTICE_LOG(DSPLLE, "- CPU reads mail from mbx %i: %08x (pc=0x%04x)", mbx, gdsp_mbox_peek(mbx), g_dsp.pc);
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// DSPCore_SetException(EXP_INT);
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// DSPHost_InterruptRequest();
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NOTICE_LOG(DSPLLE, "CPU(RM) B:%i M:0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc);
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}
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#endif
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@ -80,6 +80,7 @@ void HandleLoop()
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const u16 rCallAddress = g_dsp.r[DSP_REG_ST0];
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const u16 rLoopAddress = g_dsp.r[DSP_REG_ST2];
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if (g_dsp.pc == (rLoopAddress + opSize[rLoopAddress]))
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{
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rLoopCounter--;
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// This one has basic idle skipping, and checks breakpoints.
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int RunCyclesDebug(int cycles)
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{
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// First, let's run a few cycles with no idle skipping so that things can progress a bit.
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// First, let's run a few cycles with no idle skipping so that things can
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// progress a bit.
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for (int i = 0; i < 8; i++)
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{
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if (g_dsp.cr & CR_HALT)
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@ -231,7 +233,8 @@ int RunCycles(int cycles)
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cycles--;
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}
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// Next, let's run a few cycles with idle skipping, so that we can skip idle loops.
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// Next, let's run a few cycles with idle skipping, so that we can skip
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// idle loops.
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for (int i = 0; i < 8; i++)
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{
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if (g_dsp.cr & CR_HALT)
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cycles--;
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}
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// Now, run the rest of the block without idle skipping. It might trip into a
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// idle loop and if so we waste some time here. Might be beneficial to slice even further.
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// Now, run the rest of the block without idle skipping. It might trip into
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// a idle loop and if so we waste some time here. Might be beneficial to
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// slice even further.
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while (cycles > 0)
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{
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Step();
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