Remove instant ARAM DMA mode.
Now that our timings are much more accurate it doesn't look like we need it anymore. And the instant ARAM DMA mode + scheduling fixes ctually breaks ATV: Quad Power Racing 2 (causing all sorts of werid bugs).
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18030ebfb4
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@ -137,9 +137,6 @@ struct ARAMInfo
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static ARAMInfo g_ARAM;
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static ARAMInfo g_ARAM;
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static AudioDMA g_audioDMA;
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static AudioDMA g_audioDMA;
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static ARAM_DMA g_arDMA;
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static ARAM_DMA g_arDMA;
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static u32 last_mmaddr;
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static u32 last_aram_dma_count;
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static bool instant_dma;
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UDSPControl g_dspState;
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UDSPControl g_dspState;
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union ARAM_Info {
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union ARAM_Info {
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@ -177,9 +174,6 @@ void DoState(PointerWrap& p)
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p.Do(g_AR_MODE);
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p.Do(g_AR_MODE);
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p.Do(g_AR_REFRESH);
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p.Do(g_AR_REFRESH);
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p.Do(dsp_slice);
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p.Do(dsp_slice);
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p.Do(last_mmaddr);
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p.Do(last_aram_dma_count);
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p.Do(instant_dma);
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dsp_emulator->DoState(p);
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dsp_emulator->DoState(p);
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}
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}
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@ -197,30 +191,6 @@ static void CompleteARAM(u64 userdata, s64 cyclesLate)
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GenerateDSPInterrupt(INT_ARAM);
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GenerateDSPInterrupt(INT_ARAM);
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}
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}
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void EnableInstantDMA()
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{
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CoreTiming::RemoveEvent(et_CompleteARAM);
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CompleteARAM(0, 0);
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instant_dma = true;
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ERROR_LOG(DSPINTERFACE, "Enabling Instant ARAM DMA hack");
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}
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void FlushInstantDMA(u32 address)
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{
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u64 dma_in_progress = DSP::DMAInProgress();
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if (dma_in_progress != 0)
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{
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u32 start_addr = (dma_in_progress >> 32) & Memory::RAM_MASK;
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u32 end_addr = (dma_in_progress & Memory::RAM_MASK) & 0xffffffff;
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u32 invalidated_addr = (address & Memory::RAM_MASK) & ~0x1f;
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if (invalidated_addr >= start_addr && invalidated_addr <= end_addr)
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{
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DSP::EnableInstantDMA();
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}
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}
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}
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DSPEmulator* GetDSPEmulator()
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DSPEmulator* GetDSPEmulator()
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{
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{
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return dsp_emulator.get();
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return dsp_emulator.get();
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@ -257,11 +227,6 @@ void Init(bool hle)
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g_AR_MODE = 1; // ARAM Controller has init'd
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g_AR_MODE = 1; // ARAM Controller has init'd
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g_AR_REFRESH = 156; // 156MHz
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g_AR_REFRESH = 156; // 156MHz
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instant_dma = false;
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last_aram_dma_count = 0;
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last_mmaddr = 0;
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et_GenerateDSPInterrupt = CoreTiming::RegisterEvent("DSPint", GenerateDSPInterrupt);
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et_GenerateDSPInterrupt = CoreTiming::RegisterEvent("DSPint", GenerateDSPInterrupt);
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et_CompleteARAM = CoreTiming::RegisterEvent("ARAMint", CompleteARAM);
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et_CompleteARAM = CoreTiming::RegisterEvent("ARAMint", CompleteARAM);
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}
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}
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@ -527,16 +492,8 @@ static void Do_ARAM_DMA()
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// ARAM DMA transfer rate has been measured on real hw
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// ARAM DMA transfer rate has been measured on real hw
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int ticksToTransfer = (g_arDMA.Cnt.count / 32) * 246;
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int ticksToTransfer = (g_arDMA.Cnt.count / 32) * 246;
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// This is a huge hack that appears to be here only to fix Resident Evil 2/3
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if (instant_dma)
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ticksToTransfer = std::min(ticksToTransfer, 100);
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CoreTiming::ScheduleEvent(ticksToTransfer, et_CompleteARAM);
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CoreTiming::ScheduleEvent(ticksToTransfer, et_CompleteARAM);
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last_mmaddr = g_arDMA.MMAddr;
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last_aram_dma_count = g_arDMA.Cnt.count;
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// Real hardware DMAs in 32byte chunks, but we can get by with 8byte chunks
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// Real hardware DMAs in 32byte chunks, but we can get by with 8byte chunks
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if (g_arDMA.Cnt.dir)
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if (g_arDMA.Cnt.dir)
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{
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{
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@ -667,13 +624,4 @@ u8* GetARAMPtr()
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return g_ARAM.ptr;
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return g_ARAM.ptr;
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}
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}
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u64 DMAInProgress()
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{
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if (g_dspState.DMAState == 1)
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{
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return ((u64)last_mmaddr << 32 | (last_mmaddr + last_aram_dma_count));
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}
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return 0;
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}
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} // end of namespace DSP
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} // end of namespace DSP
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@ -80,8 +80,5 @@ u8* GetARAMPtr();
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void UpdateAudioDMA();
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void UpdateAudioDMA();
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void UpdateDSPSlice(int cycles);
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void UpdateDSPSlice(int cycles);
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u64 DMAInProgress();
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void EnableInstantDMA();
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void FlushInstantDMA(u32 address);
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} // end of namespace DSP
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} // end of namespace DSP
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@ -336,14 +336,6 @@ void Interpreter::dcbi(UGeckoInstruction _inst)
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// should use icbi consistently, but games aren't portable.)
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// should use icbi consistently, but games aren't portable.)
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u32 address = Helper_Get_EA_X(_inst);
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u32 address = Helper_Get_EA_X(_inst);
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JitInterface::InvalidateICache(address & ~0x1f, 32, false);
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JitInterface::InvalidateICache(address & ~0x1f, 32, false);
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// The following detects a situation where the game is writing to the dcache at the address being
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// DMA'd. As we do not
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// have dcache emulation, invalid data is being DMA'd causing audio glitches. The following code
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// detects this and
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// enables the DMA to complete instantly before the invalid data is written. Resident Evil 2 & 3
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// trigger this.
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DSP::FlushInstantDMA(address);
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}
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}
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void Interpreter::dcbst(UGeckoInstruction _inst)
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void Interpreter::dcbst(UGeckoInstruction _inst)
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@ -315,23 +315,6 @@ void Jit64::dcbx(UGeckoInstruction inst)
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SwitchToNearCode();
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SwitchToNearCode();
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SetJumpTarget(c);
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SetJumpTarget(c);
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// dcbi
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if (inst.SUBOP10 == 470)
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{
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// Flush DSP DMA if DMAState bit is set
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TEST(16, M(&DSP::g_dspState), Imm16(1 << 9));
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c = J_CC(CC_NZ, true);
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SwitchToFarCode();
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SetJumpTarget(c);
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ABI_PushRegistersAndAdjustStack(registersInUse, 0);
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SHL(32, R(addr), Imm8(5));
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ABI_CallFunctionR(DSP::FlushInstantDMA, addr);
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ABI_PopRegistersAndAdjustStack(registersInUse, 0);
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c = J(true);
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SwitchToNearCode();
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SetJumpTarget(c);
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}
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gpr.UnlockAllX();
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gpr.UnlockAllX();
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}
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}
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@ -70,7 +70,7 @@ static Common::Event g_compressAndDumpStateSyncEvent;
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static std::thread g_save_thread;
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static std::thread g_save_thread;
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// Don't forget to increase this after doing changes on the savestate system
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// Don't forget to increase this after doing changes on the savestate system
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static const u32 STATE_VERSION = 56;
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static const u32 STATE_VERSION = 57;
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// Maps savestate versions to Dolphin versions.
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// Maps savestate versions to Dolphin versions.
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// Versions after 42 don't need to be added to this list,
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// Versions after 42 don't need to be added to this list,
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