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Add function to emit CMP, or TEST when possible 

Also, a spelling mistake.
This commit is contained in:
Sintendo 2015-02-21 11:12:03 +01:00
parent b35c34186c
commit c19482c9a3
4 changed files with 16 additions and 2 deletions
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12
Source/Core/Common/x64Emitter.cpp
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@ -1278,6 +1278,18 @@ void XEmitter::MOV (int bits, const OpArg &a1, const OpArg &a2)
void XEmitter::TEST(int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);} void XEmitter::TEST(int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmTEST, a1, a2);}
void XEmitter::CMP (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);} void XEmitter::CMP (int bits, const OpArg &a1, const OpArg &a2) {CheckFlags(); WriteNormalOp(bits, nrmCMP, a1, a2);}
void XEmitter::XCHG(int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);} void XEmitter::XCHG(int bits, const OpArg &a1, const OpArg &a2) {WriteNormalOp(bits, nrmXCHG, a1, a2);}
void XEmitter::CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2)
{
CheckFlags();
if (a1.IsSimpleReg() && a2.IsImm() && a2.offset == 0) // turn 'CMP reg, 0' into shorter 'TEST reg, reg'
{
WriteNormalOp(bits, nrmTEST, a1, a1);
}
else
{
WriteNormalOp(bits, nrmCMP, a1, a2);
}
}
void XEmitter::IMUL(int bits, X64Reg regOp, OpArg a1, OpArg a2) void XEmitter::IMUL(int bits, X64Reg regOp, OpArg a1, OpArg a2)
{ {

2
Source/Core/Common/x64Emitter.h
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@ -465,6 +465,8 @@ public:
void MOV (int bits, const OpArg &a1, const OpArg &a2); void MOV (int bits, const OpArg &a1, const OpArg &a2);
void TEST(int bits, const OpArg &a1, const OpArg &a2); void TEST(int bits, const OpArg &a1, const OpArg &a2);
void CMP_or_TEST(int bits, const OpArg &a1, const OpArg &a2);
// Are these useful at all? Consider removing. // Are these useful at all? Consider removing.
void XCHG(int bits, const OpArg &a1, const OpArg &a2); void XCHG(int bits, const OpArg &a1, const OpArg &a2);
void XCHG_AHAL(); void XCHG_AHAL();

2
Source/Core/Core/DSP/Jit/DSPJitRegCache.cpp
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@ -756,7 +756,7 @@ void DSPJitRegCache::getReg(int reg, OpArg &oparg, bool load)
{ {
emitter.INT3(); emitter.INT3();
} }
// no nead to actually emit code for load or rotate if caller doesn't // no need to actually emit code for load or rotate if caller doesn't
// use the contents, but see above for a reason to force the load // use the contents, but see above for a reason to force the load
movToHostReg(real_reg, load); movToHostReg(real_reg, load);

2
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
View File

@ -1154,7 +1154,7 @@ void Jit64::divwux(UGeckoInstruction inst)
MOV(32, R(EAX), gpr.R(a)); MOV(32, R(EAX), gpr.R(a));
XOR(32, R(EDX), R(EDX)); XOR(32, R(EDX), R(EDX));
gpr.KillImmediate(b, true, false); gpr.KillImmediate(b, true, false);
CMP(32, gpr.R(b), Imm32(0)); CMP_or_TEST(32, gpr.R(b), Imm32(0));
FixupBranch not_div_by_zero = J_CC(CC_NZ); FixupBranch not_div_by_zero = J_CC(CC_NZ);
MOV(32, gpr.R(d), R(EDX)); MOV(32, gpr.R(d), R(EDX));
if (inst.OE) if (inst.OE)