Merge pull request #10454 from Pokechu22/pi-fifo-reset
ProcessorInterface: Implement PI_FIFO_RESET
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commit
be75273ad4
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@ -18,6 +18,7 @@
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#include "Core/IOS/IOS.h"
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#include "Core/IOS/STM/STM.h"
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#include "Core/PowerPC/PowerPC.h"
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#include "VideoCommon/Fifo.h"
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namespace ProcessorInterface
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{
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@ -111,7 +112,10 @@ void RegisterMMIO(MMIO::Mapping* mmio, u32 base)
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mmio->Register(base | PI_FIFO_RESET, MMIO::InvalidRead<u32>(),
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MMIO::ComplexWrite<u32>([](u32, u32 val) {
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WARN_LOG_FMT(PROCESSORINTERFACE, "Fifo reset ({:08x})", val);
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// Used by GXAbortFrame
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INFO_LOG_FMT(PROCESSORINTERFACE, "Wrote PI_FIFO_RESET: {:08x}", val);
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if ((val & 1) != 0)
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Fifo::ResetVideoBuffer();
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}));
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mmio->Register(base | PI_RESET_CODE, MMIO::ComplexRead<u32>([](u32) {
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@ -46,7 +46,7 @@ enum
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PI_FIFO_BASE = 0x0C,
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PI_FIFO_END = 0x10,
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PI_FIFO_WPTR = 0x14,
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PI_FIFO_RESET = 0x18, // ??? - GXAbortFrame writes to it
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PI_FIFO_RESET = 0x18, // Used by GXAbortFrame
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PI_RESET_CODE = 0x24,
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PI_FLIPPER_REV = 0x2C,
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PI_FLIPPER_UNK = 0x30 // BS1 writes 0x0245248A to it - prolly some bootstrap thing
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