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Merge pull request #1940 from Sonicadvance1/AArch64_implement_xer 

[AArch64] Implement mfspr/mtspr XER routines.
This commit is contained in:
Ryan Houdek 2015-01-22 10:31:22 -06:00
parent d27bd9d291 85754c63ca
commit bb1ca26c57
1 changed files with 15 additions and 6 deletions
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21
Source/Core/Core/PowerPC/JitArm64/JitArm64_SystemRegisters.cpp
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@ -206,6 +206,18 @@ void JitArm64::mfspr(UGeckoInstruction inst)
switch (iIndex) switch (iIndex)
{ {
case SPR_XER: case SPR_XER:
{
gpr.BindToRegister(inst.RD, false);
ARM64Reg RD = gpr.R(inst.RD);
ARM64Reg WA = gpr.GetReg();
LDRH(INDEX_UNSIGNED, RD, X29, PPCSTATE_OFF(xer_stringctrl));
LDRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_ca));
ORR(RD, RD, WA, ArithOption(WA, ST_LSL, XER_CA_SHIFT));
LDRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_so_ov));
ORR(RD, RD, WA, ArithOption(WA, ST_LSL, XER_OV_SHIFT));
gpr.Unlock(WA);
}
break;
case SPR_WPAR: case SPR_WPAR:
case SPR_DEC: case SPR_DEC:
case SPR_TL: case SPR_TL:
@ -261,18 +273,15 @@ void JitArm64::mtspr(UGeckoInstruction inst)
break; break;
case SPR_XER: case SPR_XER:
{ {
FALLBACK_IF(true);
ARM64Reg RD = gpr.R(inst.RD); ARM64Reg RD = gpr.R(inst.RD);
ARM64Reg WA = gpr.GetReg(); ARM64Reg WA = gpr.GetReg();
ARM64Reg mask = gpr.GetReg(); AND(WA, RD, 24, 30);
MOVI2R(mask, 0xFF7F);
AND(WA, RD, mask, ArithOption(mask, ST_LSL, 0));
STRH(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_stringctrl)); STRH(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_stringctrl));
UBFM(WA, RD, XER_CA_SHIFT, XER_CA_SHIFT); UBFM(WA, RD, XER_CA_SHIFT, XER_CA_SHIFT + 1);
STRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_ca)); STRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_ca));
UBFM(WA, RD, XER_OV_SHIFT, 31); // Same as WA = RD >> XER_OV_SHIFT UBFM(WA, RD, XER_OV_SHIFT, 31); // Same as WA = RD >> XER_OV_SHIFT
STRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_so_ov)); STRB(INDEX_UNSIGNED, WA, X29, PPCSTATE_OFF(xer_so_ov));
gpr.Unlock(WA, mask); gpr.Unlock(WA);
} }
break; break;
default: default: