JitIL: Fixed the Issue 3114. The bug was introduced because the usage of MOVSD/MOVSS was wrong. MOVSD/MOVSS don't clear the upper bits when they are used to transfer between registers. But they clear the upper bits when they are used to transfer between a register and memory.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@6151 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -1362,9 +1362,17 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
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// TODO: Optimize the case that the register of op1 can be
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// recycled. (SHUFPD may not be so fast.)
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X64Reg reg = fregBinRHSRegWithMov(RI, I);
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// TODO: Check whether the following code works
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// when the op1 is in the FSlotSet
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Jit->MOVSD(reg, fregLocForInst(RI, getOp1(I)));
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OpArg loc1 = fregLocForInst(RI, getOp1(I));
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if (loc1.IsSimpleReg()) {
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Jit->MOVSD(reg, loc1);
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} else {
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// If op1 is in FSlotSet, we have to mov loc1 to XMM0
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// before MOVSD/MOVSS.
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// Because register<->memory transfer with MOVSD/MOVSS
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// clears upper 64/96-bits of the destination register.
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Jit->MOVAPD(XMM0, loc1);
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Jit->MOVSD(reg, R(XMM0));
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}
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RI.fregs[reg] = I;
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fregNormalRegClear(RI, I);
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break;
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@ -1569,9 +1577,13 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
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// TODO: Optimize the case that the register of only op1 can be
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// recycled.
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X64Reg reg = fregBinRHSRegWithMov(RI, I);
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// TODO: Check whether the following code works
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// when the op1 is in the FSlotSet
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Jit->MOVSS(reg, fregLocForInst(RI, getOp1(I)));
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OpArg loc1 = fregLocForInst(RI, getOp1(I));
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if (loc1.IsSimpleReg()) {
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Jit->MOVSS(reg, loc1);
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} else {
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Jit->MOVAPD(XMM0, loc1);
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Jit->MOVSS(reg, R(XMM0));
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}
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RI.fregs[reg] = I;
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fregNormalRegClear(RI, I);
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break;
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@ -1582,9 +1594,13 @@ static void DoWriteCode(IRBuilder* ibuild, JitIL* Jit, bool UseProfile, bool Mak
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// TODO: Optimize the case that the register of only op2 can be
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// recycled.
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X64Reg reg = fregBinLHSRegWithMov(RI, I);
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// TODO: Check whether the following code works
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// when the op1 is in the FSlotSet
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Jit->MOVSS(reg, fregLocForInst(RI, getOp2(I)));
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OpArg loc2 = fregLocForInst(RI, getOp2(I));
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if (loc2.IsSimpleReg()) {
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Jit->MOVSS(reg, loc2);
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} else {
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Jit->MOVAPD(XMM0, loc2);
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Jit->MOVSS(reg, R(XMM0));
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}
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Jit->SHUFPS(reg, R(reg), 0xF1);
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RI.fregs[reg] = I;
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fregNormalRegClear(RI, I);
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