Add conditional register cache flushing to JIT64's bcctrx conditional route.
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@ -155,9 +155,6 @@ void Jit64::bcctrx(UGeckoInstruction inst)
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INSTRUCTION_START
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JITDISABLE(bJITBranchOff)
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gpr.Flush();
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fpr.Flush();
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// bcctrx doesn't decrement and/or test CTR
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_dbg_assert_msg_(POWERPC, inst.BO_2 & BO_DONT_DECREMENT_FLAG, "bcctrx with decrement and test CTR option is invalid!");
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@ -166,6 +163,9 @@ void Jit64::bcctrx(UGeckoInstruction inst)
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// BO_2 == 1z1zz -> b always
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//NPC = CTR & 0xfffffffc;
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gpr.Flush();
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fpr.Flush();
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MOV(32, R(EAX), M(&CTR));
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if (inst.LK_3)
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MOV(32, M(&LR), Imm32(js.compilerPC + 4)); // LR = PC + 4;
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@ -192,6 +192,9 @@ void Jit64::bcctrx(UGeckoInstruction inst)
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//MOV(32, M(&PC), R(EAX)); => Already done in WriteExitDestInEAX()
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if (inst.LK_3)
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MOV(32, M(&LR), Imm32(js.compilerPC + 4)); // LR = PC + 4;
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gpr.Flush(FLUSH_MAINTAIN_STATE);
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fpr.Flush(FLUSH_MAINTAIN_STATE);
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WriteExitDestInEAX();
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// Would really like to continue the block here, but it ends. TODO.
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SetJumpTarget(b);
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