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add another dsp ucode to RE...woo! 

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@5055 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Shawn Hoffman 2010-02-14 05:40:04 +00:00
parent 98c7993a8a
commit b6aa5d91c0
2 changed files with 660 additions and 143 deletions
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393
docs/DSP/DSP_UC_3B3B30CA.txt Normal file
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@ -0,0 +1,393 @@
/*
ROM functions used:
0x8000 dsp reset
0x8078 wait for CMBH & 0x8000
0x807e wait for DMBH & 0x8000
0x808b dump DRAM/IRAM to mainmem
0x80b5 boot new ucode
0x80bc boot new ucode without ACC clearing by ROM
For the rest, this ucode is just calling the last few instructions
from huge functions in ROM - some kind of obfuscation?
0x81f4
81f4 b51e mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX1.H, $AC0.M
81f5 9909 asr16'ir $ACC1 : $AR1
81f6 1b7f srri @$AR3, $AC1.M
81f7 812b clr's $ACC0 : @$AR3, $AC1.L
0x8458
8458 b51e mulxac'mv $AX0.H, $AX1.L, $ACC1 : $AX1.H, $AC0.M
8459 9900 asr16 $ACC1
845a 1b7f srri @$AR3, $AC1.M
845b 812b clr's $ACC0 : @$AR3, $AC1.L
0x8723
8723 3300 xorr $AC1.M, $AX1.H
8724 1adf srrd @$AR2, $AC1.M
0x8809
8809 392e orr'sn $AC1.M, $AX0.H : @$AR2, $AC1.L
880a 1b5f srri @$AR2, $AC1.M
0x88e5
88e5 387a orr'l $AC0.M, $AX0.H : $AC1.M, @$AR2
88e6 18dd lrrd $AC1.L, @$AR2
88e7 4c05 add'dr $ACC0, $ACC1 : $AR1
88e8 1b5e srri @$AR2, $AC0.M
88e9 1a5c srr @$AR2, $AC0.L
*/
0000 0000 nop
0001 0000 nop
0002 0000 nop
0003 0000 nop
0004 0000 nop
0005 0000 nop
0006 0000 nop
0007 0000 nop
0008 0000 nop
0009 0000 nop
000a 0000 nop
000b 0000 nop
000c 0000 nop
000d 0021 halt
000e 02ff rti
000f 0021 halt
0010 1306 sbset #0x06
0011 1203 sbclr #0x03
0012 1204 sbclr #0x04
0013 1305 sbset #0x05
0014 0092 00ff lri $CR, #0x00ff
0016 0088 ffff lri $WR0, #0xffff
0018 0089 ffff lri $WR1, #0xffff
001a 008a ffff lri $WR2, #0xffff
001c 008b ffff lri $WR3, #0xffff
001e 8f00 set40
001f 8b00 m0
0020 8c00 clr15
0021 02bf 807e call 0x807e // loop until dsp->cpu mailbox is empty
0023 16fc dcd1 si @DMBH, #0xdcd1
0025 16fd 0000 si @DMBL, #0x0000 // sendmail 0xdcd10000
0027 16fb 0001 si @DIRQ, #0x0001
// wait for cpu mail == 0xabbaxxxx
0029 02bf 8078 call 0x8078 // wait for cpu mail
002b 24ff lrs $AC0.L, @CMBL
002c 0280 abba cmpi $AC0.M, #0xabba
002e 0294 0029 jnz 0x0029
// wait for cpu mail
0030 8e00 set16
0031 02bf 8078 call 0x8078
0030 8e00 set16
0031 02bf 8078 call 0x8078 // wait for cpu mail
0033 20ff lrs $AX0.L, @CMBL
0034 0240 0fff andi $AC0.M, #0x0fff
0036 1f5e mrr $AX0.H, $AC0.M
0037 009b 0000 lri $AX1.H, #0x0000 // DSP-dram addr
0039 0099 0020 lri $AX1.L, #0x0020 // length (20 bytes = 10 words, word 9 and 10 are addr where result should DMA'd to in main mem)
003b 0087 0000 lri $IX3, #0x0000 // there will be no ucode/iram upload
003d 0080 0041 lri $AR0, #0x0041 // return addr after dram upload
003f 029f 80bc jmp 0x80bc // DRAM upload !!
// $AX0.H-$AX0.L - CPU(PPC) addr = mail & 0x0fffffff
// upload data from mainmem do dsp dram and jump to 0x41 after that
0041 02bf 008c call 008c_BigCrazyFunction() // <<------------- main crap is here!!!!!!!!!
0043 02bf 807e call 0x807e // loop until dsp->cpu mailbox is empty
0045 16fc dcd1 si @DMBH, #0xdcd1
0047 16fd 0003 si @DMBL, #0x0003 // sendmail 0xdcd10003 (aka... calc is over, result is in main mem now)
0049 16fb 0001 si @DIRQ, #0x0001
004b 8f00 set40
004c 02bf 8078 call 0x8078
004e 0280 cdd1 cmpi $AC0.M, #0xcdd1
0050 0294 004c jnz 0x004c
0052 26ff lrs $AC0.M, @CMBL
0053 0280 0001 cmpi $AC0.M, #0x0001
0055 0295 005e jz 0x005e // if cpu->dsp mail was 0xcdd10001 -> 005e_PrepareBootUcode()
0057 0280 0002 cmpi $AC0.M, #0x0002
0059 0295 8000 jz 0x8000 // if cpu->dsp mail was 0xcdd10002 -> dsp reset ( jmp to irom(0x8000))
005b 029f 004c jmp 0x004c // wait for next mail from cpu
005d 0021 halt
void 005e_PrepareBootUcode()
{
005e 8e00 set16
005f 02bf 8078 call 0x8078 // wait for cpu mail
0061 24ff lrs $AC0.L, @CMBL
0062 02bf 8078 call 0x8078 // wait for cpu mail
0064 24ff lrs $AC0.L, @CMBL
0065 02bf 8078 call 0x8078 // wait for cpu mail
0067 24ff lrs $AC0.L, @CMBL
0068 02bf 8078 call 0x8078 // wait for cpu mail
006a 00c5 ffff lr $IX1, @CMBL
006c 0240 0fff andi $AC0.M, #0x0fff
006e 1c9e mrr $IX0, $AC0.M
006f 02bf 8078 call 0x8078 // wait for cpu mail
0071 00c7 ffff lr $IX3, @CMBL
0073 02bf 8078 call 0x8078 // wait for cpu mail
0075 00c6 ffff lr $IX2, @CMBL
0077 02bf 8078 call 0x8078 // wait for cpu mail
0079 00c0 ffff lr $AR0, @CMBL
007b 02bf 8078 call 0x8078 // wait for cpu mail
007d 20ff lrs $AX0.L, @CMBL
007e 0240 0fff andi $AC0.M, #0x0fff
0080 1f5e mrr $AX0.H, $AC0.M
0081 02bf 8078 call 0x8078 // wait for cpu mail
0083 21ff lrs $AX1.L, @CMBL
0084 02bf 8078 call 0x8078 // wait for cpu mail
0086 23ff lrs $AX1.H, @CMBL
0087 1205 sbclr #0x05
0088 1206 sbclr #0x06
0089 029f 80b5 jmp 80b5_BootUcode()
008b 0021 halt
}
// does some crazy stuff with data at dram @0x3/0x5/0x6/0x7 with help of some values from drom :)
// result is @0x22,@0x23 and written back to main memory to dmem-0x08:dmem-0x09
void 008c_BigCrazyFunction()
{
008c 8100 clr $ACC0
008d 0081 0010 lri $AR1, #0x0010
008f 1020 loopi #0x20
0090 1b3e srri @$AR1, $AC0.M
0091 00df 1456 lr $AC1.M, @0x1456
0093 0340 ffd0 andi $AC1.M, #0xffd0
0095 8417 clrp'mv : $AX1.L, $AC1.M
0096 0080 0000 lri $AR0, #0x0000
0098 0086 0000 lri $IX2, #0x0000
009a 0082 001f lri $AR2, #0x001f
009c 00de 15f6 lr $AC0.M, @0x15f6
009e 1408 lsl $ACC0, #8
009f 00df 1766 lr $AC1.M, @0x1766
00a1 0340 00ff andi $AC1.M, #0x00ff
00a3 1f5f mrr $AX0.H, $AC1.M
00a4 02bf 88e5 call 0x88e5
00a6 1f1c mrr $AX0.L, $AC0.L
00a7 811e clr'mv $ACC0 : $AX1.H, $AC0.M
00a8 191e lrri $AC0.M, @$AR0
00a9 1478 lsr $ACC0, #-8
00aa 1ffc mrr $AC1.M, $AC0.L
00ab 1f5e mrr $AX0.H, $AC0.M
00ac 02bf 8809 call 0x8809
00ae 02bf 8723 call 0x8723
00b0 0006 dar $AR2
00b1 8106 clr'dr $ACC0 : $AR2
00b2 00de 166c lr $AC0.M, @0x166c
00b4 1404 lsl $ACC0, #4
00b5 0240 ff00 andi $AC0.M, #0xff00
00b7 00df 1231 lr $AC1.M, @0x1231
00b9 1578 lsr $ACC1, #-8
00ba 0340 00ff andi $AC1.M, #0x00ff
00bc 1f5f mrr $AX0.H, $AC1.M
00bd 02bf 88e5 call 0x88e5
00bf 1f1c mrr $AX0.L, $AC0.L
00c0 811e clr'mv $ACC0 : $AX1.H, $AC0.M
00c1 191e lrri $AC0.M, @$AR0
00c2 1478 lsr $ACC0, #-8
00c3 1ffc mrr $AC1.M, $AC0.L
00c4 1f5e mrr $AX0.H, $AC0.M
00c5 02bf 8809 call 0x8809
00c7 02bf 8723 call 0x8723
00c9 8100 clr $ACC0
00ca 8900 clr $ACC1
00cb 00d1 0005 lr $AC1.H, @0x0005
00cd 9900 asr16 $ACC1
00ce 8200 cmp
00cf 0295 00e5 jz 0x00e5
00d1 0291 00f3 jl 0x00f3
00d3 0082 0010 lri $AR2, #0x0010
00d5 0086 0001 lri $IX2, #0x0001
00d7 00d0 171b lr $AC0.H, @0x171b
00d9 9100 asr16 $ACC0
00da 7d00 neg $ACC1
00db 4d00 add $ACC1, $ACC0
00dc 1501 lsl $ACC1, #1
00dd 1f5f mrr $AX0.H, $AC1.M
00de 00df 0003 lr $AC1.M, @0x0003
00e0 1504 lsl $ACC1, #4
00e1 02bf 8809 call 0x8809
00e3 029f 0102 jmp 0x0102
:
00e5 0082 0011 lri $AR2, #0x0011
00e7 00df 0003 lr $AC1.M, @0x0003
00e9 1501 lsl $ACC1, #1
00ea 1f5f mrr $AX0.H, $AC1.M
00eb 00de 1043 lr $AC0.M, @0x1043
00ed 0240 fff0 andi $AC0.M, #0xfff0
00ef 02bf 88e5 call 0x88e5
00f1 029f 0102 jmp 0x0102
:
00f3 0082 0010 lri $AR2, #0x0010
00f5 0086 0001 lri $IX2, #0x0001
00f7 00d0 1285 lr $AC0.H, @0x1285
00f9 9100 asr16 $ACC0
00fa 4d00 add $ACC1, $ACC0
00fb 1501 lsl $ACC1, #1
00fc 00de 0003 lr $AC0.M, @0x0003
00fe 1404 lsl $ACC0, #4
00ff 1f5e mrr $AX0.H, $AC0.M
0100 02bf 8809 call 0x8809
:
0102 0083 0013 lri $AR3, #0x0013
0104 1b7e srri @$AR3, $AC0.M
0105 8923 clr's $ACC1 : @$AR3, $AC0.L
0106 0083 0013 lri $AR3, #0x0013
0108 00df 0007 lr $AC1.M, @0x0007
010a 00de 11b8 lr $AC0.M, @0x11b8
010c 0240 fff0 andi $AC0.M, #0xfff0
010e 1f5e mrr $AX0.H, $AC0.M
010f 02bf 81f4 call 0x81f4
0111 f100 lsl16 $ACC1
0112 02bf 8458 call 0x8458
0114 8f00 set40
0115 0082 0015 lri $AR2, #0x0015
0117 00de 0006 lr $AC0.M, @0x0006
0119 00da 165b lr $AX0.H, @0x165b
011b 02bf 88e5 call 0x88e5
011d 14fd asr $ACC0, #-3
011e 1403 lsl $ACC0, #3
011f 1b5e srri @$AR2, $AC0.M
0120 1b5c srri @$AR2, $AC0.L
0121 0082 0016 lri $AR2, #0x0016
0123 00de 1723 lr $AC0.M, @0x1723
0125 14f4 asr $ACC0, #-12
0126 00da 166b lr $AX0.H, @0x166b
0128 02bf 88e5 call 0x88e5
012a b100 tst $ACC0
012b 0290 012e jge 0x012e
012d 8100 clr $ACC0
:
012e 14fd asr $ACC0, #-3
012f 8e00 set16
0130 00df 1491 lr $AC1.M, @0x1491
0132 0340 d0f0 andi $AC1.M, #0xd0f0
0134 1cbf mrr $IX1, $AC1.M
0135 00df 1468 lr $AC1.M, @0x1468
0137 00d1 11fc lr $AC1.H, @0x11fc
0139 157c lsr $ACC1, #-4
013a 1cdf mrr $IX2, $AC1.M
013b 00d1 11b8 lr $AC1.H, @0x11b8
013d 9900 asr16 $ACC1
013e 1418 lsl $ACC0, #24
013f 1478 lsr $ACC0, #-8
0140 1f5e mrr $AX0.H, $AC0.M
0141 1ffe mrr $AC1.M, $AC0.M
0142 1f65 mrr $AX1.H, $IX1
0143 3600 andr $AC0.M, $AX1.H
0144 1402 lsl $ACC0, #2
0145 1f66 mrr $AX1.H, $IX2
0146 3700 andr $AC1.M, $AX1.H
0147 1501 lsl $ACC1, #1
0148 4c00 add $ACC0, $ACC1
0149 1518 lsl $ACC1, #24
014a 9900 asr16 $ACC1
014b 3500 andr $AC1.M, $AX0.H
014c 4c00 add $ACC0, $ACC1
014d 00df 0012 lr $AC1.M, @0x0012
014f 3f00 orc $AC1.M, $AC0.M
0150 00ff 0012 sr @0x0012, $AC1.M
0152 1470 lsr $ACC0, #-16
0153 00df 0011 lr $AC1.M, @0x0011
0155 3f00 orc $AC1.M, $AC0.M
0156 00ff 0011 sr @0x0011, $AC1.M
0158 1fa5 mrr $AC1.L, $IX1
0159 1501 lsl $ACC1, #1
015a 1fe6 mrr $AC1.M, $IX2
015b f100 lsl16 $ACC1
015c 15f8 asr $ACC1, #-8
015d f500 lsr16 $ACC1
015e 1f5f mrr $AX0.H, $AC1.M
015f 1f7d mrr $AX1.H, $AC1.L
0160 8100 clr $ACC0
0161 00de 0011 lr $AC0.M, @0x0011
0163 3400 andr $AC0.M, $AX0.H
0164 8900 clr $ACC1
0165 00df 0012 lr $AC1.M, @0x0012
0167 3500 andr $AC1.M, $AX0.H
0168 4c00 add $ACC0, $ACC1
0169 00df 0012 lr $AC1.M, @0x0012
016b 1578 lsr $ACC1, #-8
016c 4c00 add $ACC0, $ACC1
016d 8900 clr $ACC1
016e 1ffe mrr $AC1.M, $AC0.M
016f 1508 lsl $ACC1, #8
0170 3b00 orr $AC1.M, $AX1.H
0171 00de 0011 lr $AC0.M, @0x0011
0173 3e00 orc $AC0.M, $AC1.M
0174 00df 0012 lr $AC1.M, @0x0012
0176 3b00 orr $AC1.M, $AX1.H
0177 1cbf mrr $IX1, $AC1.M
0178 00da 15f1 lr $AX0.H, @0x15f1
017a 3500 andr $AC1.M, $AX0.H
017b 0295 0192 jz 0x0192
if () {
017d 00df 10e2 lr $AC1.M, @0x10e2
017f 1508 lsl $ACC1, #8
0180 1f5f mrr $AX0.H, $AC1.M
0181 00df 103b lr $AC1.M, @0x103b
0183 7900 decm $AC1.M
0184 3900 orr $AC1.M, $AX0.H
0185 3080 xorc $AC0.M, $AC1.M
0186 00fe 0022 sr @0x0022, $AC0.M
0188 00dc 1229 lr $AC0.L, @0x1229
018a 00dd 11f8 lr $AC1.L, @0x11f8
018c 5c00 sub $ACC0, $ACC1
018d f000 lsl16 $ACC0
018e 1fe5 mrr $AC1.M, $IX1
018f 3080 xorc $AC0.M, $AC1.M
0190 029f 01a5 jmp 0x01a5
} else {
0192 00df 10ca lr $AC1.M, @0x10ca
0194 1508 lsl $ACC1, #8
0195 1f5f mrr $AX0.H, $AC1.M
0196 00df 1043 lr $AC1.M, @0x1043
0198 7500 incm $AC1.M
0199 3900 orr $AC1.M, $AX0.H
019a 3080 xorc $AC0.M, $AC1.M
019b 00fe 0022 sr @0x0022, $AC0.M
019d 00dc 1259 lr $AC0.L, @0x1259
019f 00dd 16fe lr $AC1.L, @0x16fe
01a1 4c00 add $ACC0, $ACC1
01a2 f000 lsl16 $ACC0
01a3 1fe5 mrr $AC1.M, $IX1
01a4 3080 xorc $AC0.M, $AC1.M
}
01a5 00fe 0023 sr @0x0023, $AC0.M
// this is where result is written to main memory
// dsp mem 0x20-0x23 (8 bytes) are written back, because only values @22 and @23 were modified result is 32bit
01a7 00da 0008 lr $AX0.H, @0x0008 // cpu addr high
01a9 00d8 0009 lr $AX0.L, @0x0009 // cpu addr low
01ab 009b 0020 lri $AX1.H, #0x0020 // dsp addr
01ad 0099 0008 lri $AX1.L, #0x0008 // length
01af 0087 0000 lri $IX3, #0x0000 // there will be no iram dma
01b1 02bf 808b call 0x808b // dram->cpu <<<--- important!!
01b3 02df ret
}
01b4 0000 nop
01b5 0000 nop
01b6 0000 nop
01b7 0000 nop
01b8 0000 nop
01b9 0000 nop
01ba 0000 nop
01bb 0000 nop
01bc 0000 nop
01bd 0000 nop
01be 0000 nop
01bf 0000 nop

410
docs/DSP/DSP_UC_6A696CE7.txt
View File

@ -78,7 +78,7 @@ void Task_Init() {
// 0020 8100 clr $ACC0 // 0020 8100 clr $ACC0
// 0021 00fe 0e31 sr @0x0e31, $AC0.M // 0021 00fe 0e31 sr @0x0e31, $AC0.M
ACC0 = ACC1 = 0 ACC0 = ACC1 = 0
*0x0e1b = 0xe80 *0x0e1b = 0xe80 // Used in Cmd8
*0x0e31 = 0 *0x0e31 = 0
// Send DSP_INIT mail // Send DSP_INIT mail
@ -224,24 +224,34 @@ void Die_InvalidCmd() {
0081 0021 halt 0081 0021 halt
} }
// Executes the same operation 3 times on buffers: (0, 0x0400, 0x07c0)
void Cmd_0() { void Cmd_0() {
0082 8100 clr $ACC0 // 0082 8100 clr $ACC0
0083 8970 clr'l $ACC1 : $AC0.M, @$AR0 // 0083 8970 clr'l $ACC1 : $AC0.M, @$AR0
0084 8e78 set16'l : $AC1.M, @$AR0 // 0084 8e78 set16'l : $AC1.M, @$AR0
0085 2ece srs @DSMAH, $AC0.M u16 maddrh = *(CmdBlockBuf++)
0086 2fcf srs @DSMAL, $AC1.M u16 maddrl = *(CmdBlockBuf++)
0087 009e 0e44 lri $AC0.M, #0x0e44
0089 2ecd srs @DSPA, $AC0.M // 0085 2ece srs @DSMAH, $AC0.M
008a 0e00 lris $AC0.M, #0x00 // 0086 2fcf srs @DSMAL, $AC1.M
008b 2ec9 srs @DSCR, $AC0.M // 0087 009e 0e44 lri $AC0.M, #0x0e44
008c 009e 0040 lri $AC0.M, #0x0040 // 0089 2ecd srs @DSPA, $AC0.M
008e 2ecb srs @DSBL, $AC0.M // 008a 0e00 lris $AC0.M, #0x00
008f 0081 0e44 lri $AR1, #0x0e44 // 008b 2ec9 srs @DSCR, $AC0.M
0091 0082 0000 lri $AR2, #0x0000 // 008c 009e 0040 lri $AC0.M, #0x0040
// 008e 2ecb srs @DSBL, $AC0.M
// DMA 0x0040bytes to DRAM @ 0x0e44 from CPU @ maddr
008f 0081 0e44 lri $AR1, #0x0e44 // source
0091 0082 0000 lri $AR2, #0x0000 // destination
0093 009b 009f lri $AX1.H, #0x009f 0093 009b 009f lri $AX1.H, #0x009f
0095 009a 0140 lri $AX0.H, #0x0140 0095 009a 0140 lri $AX0.H, #0x0140 // loop length if !ACC0
0097 8100 clr $ACC0 0097 8100 clr $ACC0
0098 8900 clr $ACC1 0098 8900 clr $ACC1
0099 8f00 set40 0099 8f00 set40
// 009a 02bf 055c call 0x055c // 009a 02bf 055c call 0x055c
@ -250,12 +260,13 @@ void Cmd_0() {
009c 193e lrri $AC0.M, @$AR1 009c 193e lrri $AC0.M, @$AR1
009d 193c lrri $AC0.L, @$AR1 009d 193c lrri $AC0.L, @$AR1
009e b100 tst $ACC0 009e b100 tst $ACC0
009f 193f lrri $AC1.M, @$AR1 009f 193f lrri $AC1.M, @$AR1 // added to ACC0 in confusing ways
// 00a0 0294 00a6 jnz 0x00a6 // 00a0 0294 00a6 jnz 0x00a6
if (!$ACC0) { if (!$ACC0) {
00a2 005a loop $AX0.H 00a2 005a loop $AX0.H
00a3 1b5e srri @$AR2, $AC0.M 00a3 1b5e srri @$AR2, $AC0.M
// 00a4 029f 00ae jmp 0x00ae
// 00a4 029f 00ae jmp 0x00ae
} else { } else {
00a6 9900 asr16 $ACC1 00a6 9900 asr16 $ACC1
00a7 1b5e srri @$AR2, $AC0.M 00a7 1b5e srri @$AR2, $AC0.M
@ -264,25 +275,32 @@ void Cmd_0() {
00ab 4c00 add $ACC0, $ACC1 00ab 4c00 add $ACC0, $ACC1
00ac 1b5e srri @$AR2, $AC0.M 00ac 1b5e srri @$AR2, $AC0.M
00ad 1b5c srri @$AR2, $AC0.L 00ad 1b5c srri @$AR2, $AC0.L
} }
// same code block as above...epic fail?
00ae 193e lrri $AC0.M, @$AR1 00ae 193e lrri $AC0.M, @$AR1
00af 193c lrri $AC0.L, @$AR1 00af 193c lrri $AC0.L, @$AR1
00b0 b100 tst $ACC0 00b0 b100 tst $ACC0
00b1 193f lrri $AC1.M, @$AR1 00b1 193f lrri $AC1.M, @$AR1
00b2 0294 00b8 jnz 0x00b8 // 00b2 0294 00b8 jnz 0x00b8
if (!$ACC0) { if (!$ACC0) {
00b4 005a loop $AX0.H 00b4 005a loop $AX0.H
00b5 1b5e srri @$AR2, $AC0.M 00b5 1b5e srri @$AR2, $AC0.M
// 00b6 029f 00c0 jmp 0x00c0
// 00b6 029f 00c0 jmp 0x00c0
} else { } else {
00b8 9900 asr16 $ACC1 00b8 9900 asr16 $ACC1
00b9 1b5e srri @$AR2, $AC0.M 00b9 1b5e srri @$AR2, $AC0.M
00ba 1b5c srri @$AR2, $AC0.L 00ba 1b5c srri @$AR2, $AC0.L
00bb 007b 00bf bloop $AX1.H, 0x00bf 00bb 007b 00bf bloop $AX1.H, 0x00bf
00bd 4c00 add $ACC0, $ACC1 00bd 4c00 add $ACC0, $ACC1
00be 1b5e srri @$AR2, $AC0.M 00be 1b5e srri @$AR2, $AC0.M
00bf 1b5c srri @$AR2, $AC0.L 00bf 1b5c srri @$AR2, $AC0.L
} }
// ...and again! wtf
00c0 193e lrri $AC0.M, @$AR1 00c0 193e lrri $AC0.M, @$AR1
00c1 193c lrri $AC0.L, @$AR1 00c1 193c lrri $AC0.L, @$AR1
00c2 b100 tst $ACC0 00c2 b100 tst $ACC0
@ -290,8 +308,9 @@ void Cmd_0() {
// 00c4 0294 00ca jnz 0x00ca // 00c4 0294 00ca jnz 0x00ca
if (!$ACC0) { if (!$ACC0) {
00c6 005a loop $AX0.H 00c6 005a loop $AX0.H
00c7 1b5e srri @$AR2, $AC0.M 00c7 1b5e srri @$AR2, $AC0.M
// 00c8 029f 00d2 jmp 0x00d2
// 00c8 029f 00d2 jmp 0x00d2
} else { } else {
00ca 9900 asr16 $ACC1 00ca 9900 asr16 $ACC1
00cb 1b5e srri @$AR2, $AC0.M 00cb 1b5e srri @$AR2, $AC0.M
@ -300,93 +319,128 @@ void Cmd_0() {
00cf 4c00 add $ACC0, $ACC1 00cf 4c00 add $ACC0, $ACC1
00d0 1b5e srri @$AR2, $AC0.M 00d0 1b5e srri @$AR2, $AC0.M
00d1 1b5c srri @$AR2, $AC0.L 00d1 1b5c srri @$AR2, $AC0.L
00d2 0082 0400 lri $AR2, #0x0400
} }
// set to next buffer
00d2 0082 0400 lri $AR2, #0x0400
// same code block, uses tst'l in one place...otherwise the same
00d4 193e lrri $AC0.M, @$AR1 00d4 193e lrri $AC0.M, @$AR1
00d5 193c lrri $AC0.L, @$AR1 00d5 193c lrri $AC0.L, @$AR1
00d6 b179 tst'l $ACC0 : $AC1.M, @$AR1 00d6 b179 tst'l $ACC0 : $AC1.M, @$AR1
00d7 0294 00dd jnz 0x00dd // 00d7 0294 00dd jnz 0x00dd
00d9 005a loop $AX0.H if (!$ACC0) {
00da 1b5e srri @$AR2, $AC0.M 00d9 005a loop $AX0.H
00db 029f 00e5 jmp 0x00e5 00da 1b5e srri @$AR2, $AC0.M
00dd 9900 asr16 $ACC1 // 00db 029f 00e5 jmp 0x00e5
00de 1b5e srri @$AR2, $AC0.M } else {
00df 1b5c srri @$AR2, $AC0.L 00dd 9900 asr16 $ACC1
00e0 007b 00e4 bloop $AX1.H, 0x00e4 00de 1b5e srri @$AR2, $AC0.M
00e2 4c00 add $ACC0, $ACC1 00df 1b5c srri @$AR2, $AC0.L
00e3 1b5e srri @$AR2, $AC0.M 00e0 007b 00e4 bloop $AX1.H, 0x00e4
00e4 1b5c srri @$AR2, $AC0.L 00e2 4c00 add $ACC0, $ACC1
00e3 1b5e srri @$AR2, $AC0.M
00e4 1b5c srri @$AR2, $AC0.L
}
// same code block, using tst'l again...wonder if it actually changes behavior?
00e5 193e lrri $AC0.M, @$AR1 00e5 193e lrri $AC0.M, @$AR1
00e6 193c lrri $AC0.L, @$AR1 00e6 193c lrri $AC0.L, @$AR1
00e7 b179 tst'l $ACC0 : $AC1.M, @$AR1 00e7 b179 tst'l $ACC0 : $AC1.M, @$AR1
00e8 0294 00ee jnz 0x00ee // 00e8 0294 00ee jnz 0x00ee
00ea 005a loop $AX0.H if (!$ACC0) {
00eb 1b5e srri @$AR2, $AC0.M 00ea 005a loop $AX0.H
00ec 029f 00f6 jmp 0x00f6 00eb 1b5e srri @$AR2, $AC0.M
00ee 9900 asr16 $ACC1 // 00ec 029f 00f6 jmp 0x00f6
00ef 1b5e srri @$AR2, $AC0.M } else {
00f0 1b5c srri @$AR2, $AC0.L 00ee 9900 asr16 $ACC1
00f1 007b 00f5 bloop $AX1.H, 0x00f5 00ef 1b5e srri @$AR2, $AC0.M
00f3 4c00 add $ACC0, $ACC1 00f0 1b5c srri @$AR2, $AC0.L
00f4 1b5e srri @$AR2, $AC0.M 00f1 007b 00f5 bloop $AX1.H, 0x00f5
00f5 1b5c srri @$AR2, $AC0.L 00f3 4c00 add $ACC0, $ACC1
00f4 1b5e srri @$AR2, $AC0.M
00f5 1b5c srri @$AR2, $AC0.L
}
// see comments above
00f6 193e lrri $AC0.M, @$AR1 00f6 193e lrri $AC0.M, @$AR1
00f7 193c lrri $AC0.L, @$AR1 00f7 193c lrri $AC0.L, @$AR1
00f8 b179 tst'l $ACC0 : $AC1.M, @$AR1 00f8 b179 tst'l $ACC0 : $AC1.M, @$AR1
00f9 0294 00ff jnz 0x00ff // 00f9 0294 00ff jnz 0x00ff
00fb 005a loop $AX0.H if (!$ACC0) {
00fc 1b5e srri @$AR2, $AC0.M 00fb 005a loop $AX0.H
00fd 029f 0107 jmp 0x0107 00fc 1b5e srri @$AR2, $AC0.M
00ff 9900 asr16 $ACC1 // 00fd 029f 0107 jmp 0x0107
0100 1b5e srri @$AR2, $AC0.M } else {
0101 1b5c srri @$AR2, $AC0.L 00ff 9900 asr16 $ACC1
0102 007b 0106 bloop $AX1.H, 0x0106 0100 1b5e srri @$AR2, $AC0.M
0104 4c00 add $ACC0, $ACC1 0101 1b5c srri @$AR2, $AC0.L
0105 1b5e srri @$AR2, $AC0.M 0102 007b 0106 bloop $AX1.H, 0x0106
0106 1b5c srri @$AR2, $AC0.L 0104 4c00 add $ACC0, $ACC1
0105 1b5e srri @$AR2, $AC0.M
0106 1b5c srri @$AR2, $AC0.L
}
// set to next buffer
0107 0082 07c0 lri $AR2, #0x07c0 0107 0082 07c0 lri $AR2, #0x07c0
// see comments above
0109 193e lrri $AC0.M, @$AR1 0109 193e lrri $AC0.M, @$AR1
010a 193c lrri $AC0.L, @$AR1 010a 193c lrri $AC0.L, @$AR1
010b b179 tst'l $ACC0 : $AC1.M, @$AR1 010b b179 tst'l $ACC0 : $AC1.M, @$AR1
010c 0294 0112 jnz 0x0112 // 010c 0294 0112 jnz 0x0112
010e 005a loop $AX0.H if (!$ACC0) {
010f 1b5e srri @$AR2, $AC0.M 010e 005a loop $AX0.H
0110 029f 011a jmp 0x011a 010f 1b5e srri @$AR2, $AC0.M
0112 9900 asr16 $ACC1 // 0110 029f 011a jmp 0x011a
0113 1b5e srri @$AR2, $AC0.M } else {
0114 1b5c srri @$AR2, $AC0.L 0112 9900 asr16 $ACC1
0115 007b 0119 bloop $AX1.H, 0x0119 0113 1b5e srri @$AR2, $AC0.M
0117 4c00 add $ACC0, $ACC1 0114 1b5c srri @$AR2, $AC0.L
0118 1b5e srri @$AR2, $AC0.M 0115 007b 0119 bloop $AX1.H, 0x0119
0119 1b5c srri @$AR2, $AC0.L 0117 4c00 add $ACC0, $ACC1
0118 1b5e srri @$AR2, $AC0.M
0119 1b5c srri @$AR2, $AC0.L
}
// see comments above
011a 193e lrri $AC0.M, @$AR1 011a 193e lrri $AC0.M, @$AR1
011b 193c lrri $AC0.L, @$AR1 011b 193c lrri $AC0.L, @$AR1
011c b179 tst'l $ACC0 : $AC1.M, @$AR1 011c b179 tst'l $ACC0 : $AC1.M, @$AR1
011d 0294 0123 jnz 0x0123 // 011d 0294 0123 jnz 0x0123
011f 005a loop $AX0.H if (!$ACC0) {
0120 1b5e srri @$AR2, $AC0.M 011f 005a loop $AX0.H
0121 029f 012b jmp 0x012b 0120 1b5e srri @$AR2, $AC0.M
0123 9900 asr16 $ACC1 // 0121 029f 012b jmp 0x012b
0124 1b5e srri @$AR2, $AC0.M } else {
0125 1b5c srri @$AR2, $AC0.L 0123 9900 asr16 $ACC1
0126 007b 012a bloop $AX1.H, 0x012a 0124 1b5e srri @$AR2, $AC0.M
0128 4c00 add $ACC0, $ACC1 0125 1b5c srri @$AR2, $AC0.L
0129 1b5e srri @$AR2, $AC0.M 0126 007b 012a bloop $AX1.H, 0x012a
012a 1b5c srri @$AR2, $AC0.L 0128 4c00 add $ACC0, $ACC1
0129 1b5e srri @$AR2, $AC0.M
012a 1b5c srri @$AR2, $AC0.L
}
// see comments above
012b 193e lrri $AC0.M, @$AR1 012b 193e lrri $AC0.M, @$AR1
012c 193c lrri $AC0.L, @$AR1 012c 193c lrri $AC0.L, @$AR1
012d b179 tst'l $ACC0 : $AC1.M, @$AR1 012d b179 tst'l $ACC0 : $AC1.M, @$AR1
012e 0294 0134 jnz 0x0134 // 012e 0294 0134 jnz 0x0134
if (!$ACC0) {
0130 005a loop $AX0.H 0130 005a loop $AX0.H
0131 1b5e srri @$AR2, $AC0.M 0131 1b5e srri @$AR2, $AC0.M
0132 029f 013c jmp 0x013c // 0132 029f 013c jmp 0x013c
0134 9900 asr16 $ACC1 } else {
0135 1b5e srri @$AR2, $AC0.M 0134 9900 asr16 $ACC1
0136 1b5c srri @$AR2, $AC0.L 0135 1b5e srri @$AR2, $AC0.M
0137 007b 013b bloop $AX1.H, 0x013b 0136 1b5c srri @$AR2, $AC0.L
0139 4c00 add $ACC0, $ACC1 0137 007b 013b bloop $AX1.H, 0x013b
013a 1b5e srri @$AR2, $AC0.M 0139 4c00 add $ACC0, $ACC1
013b 1b5c srri @$AR2, $AC0.L 013a 1b5e srri @$AR2, $AC0.M
013b 1b5c srri @$AR2, $AC0.L
}
// 013c 029f 0068 jmp 0x0068 // 013c 029f 0068 jmp 0x0068
goto DoNextCommand; goto DoNextCommand;
@ -405,7 +459,7 @@ void Cmd_1() {
u16 maddrh = *(CmdBlockBuf++) u16 maddrh = *(CmdBlockBuf++)
u16 maddrl = *(CmdBlockBuf++) u16 maddrl = *(CmdBlockBuf++)
u16 unkForMulBuffer1 = *(CmdBlockBuf++) u16 unkForMulBuffer1 = *(CmdBlockBuf++)
u16 unkForMulBuffer2 = 0 u16 unkForMulBuffer2 = 0 // a buffer in dram
Unk(maddrh << 16 | maddrl, unkForMulBuffer1, unkForMulBuffer2) Unk(maddrh << 16 | maddrl, unkForMulBuffer1, unkForMulBuffer2)
// 014b 00da 0e17 lr $AX0.H, @0x0e17 // 014b 00da 0e17 lr $AX0.H, @0x0e17
@ -431,7 +485,7 @@ void Cmd_1() {
} }
void Cmd_9() { void Cmd_9() {
015f 0086 07c0 lri $IX2, #0x07c0 015f 0086 07c0 lri $IX2, #0x07c0 // often used buffer in dram
0161 02bf 0484 call 0x0484 0161 02bf 0484 call 0x0484
@ -464,48 +518,81 @@ void Cmd_6() {
} }
void Cmd_11() { void Cmd_11() {
0175 8100 clr $ACC0 // 0175 8100 clr $ACC0
0176 8970 clr'l $ACC1 : $AC0.M, @$AR0 // 0176 8970 clr'l $ACC1 : $AC0.M, @$AR0
0177 8e60 set16'l : $AC0.L, @$AR0 // 0177 8e60 set16'l : $AC0.L, @$AR0
0178 2ece srs @DSMAH, $AC0.M u16 maddrh = *(CmdBlockBuf++)
0179 2ccf srs @DSMAL, $AC0.L u16 maddrl = *(CmdBlockBuf++)
017a 16cd 0e44 si @DSPA, #0x0e44
017c 16c9 0000 si @DSCR, #0x0000 // 0178 2ece srs @DSMAH, $AC0.M
017e 8900 clr $ACC1 // 0179 2ccf srs @DSMAL, $AC0.L
017f 0d20 lris $AC1.L, #0x20 // 017a 16cd 0e44 si @DSPA, #0x0e44
0180 2dcb srs @DSBL, $AC1.L // 017c 16c9 0000 si @DSCR, #0x0000
0181 4c00 add $ACC0, $ACC1 // 017e 8900 clr $ACC1
0182 1c80 mrr $IX0, $AR0 // 017f 0d20 lris $AC1.L, #0x20
0183 0080 0280 lri $AR0, #0x0280 // 0180 2dcb srs @DSBL, $AC1.L
0185 0081 0000 lri $AR1, #0x0000
0187 0082 0140 lri $AR2, #0x0140 // DMA 0x20bytes to DRAM @ 0x0e44 from CPU @ maddr
0189 0083 0e44 lri $AR3, #0x0e44
018b 0a00 lris $AX0.H, #0x00 u16 length_of_0e44 = 0x20
018c 27c9 lrs $AC1.M, @DSCR
018d 03a0 0004 andf $AC1.M, #0x0004 // 0181 4c00 add $ACC0, $ACC1
018f 029c 018c jlnz 0x018c maddr += length_of_0e44
0191 2ece srs @DSMAH, $AC0.M
0192 2ccf srs @DSMAL, $AC0.L // Save CmdBlockBuf
0193 16cd 0e54 si @DSPA, #0x0e54 // 0182 1c80 mrr $IX0, $AR0
0195 16c9 0000 si @DSCR, #0x0000
0197 16cb 0260 si @DSBL, #0x0260 // 0183 0080 0280 lri $AR0, #0x0280
0199 009f 00a0 lri $AC1.M, #0x00a0 // 0185 0081 0000 lri $AR1, #0x0000
019b 8f00 set40 // 0187 0082 0140 lri $AR2, #0x0140
019c 007f 01a5 bloop $AC1.M, 0x01a5 // 0189 0083 0e44 lri $AR3, #0x0e44
019e 197e lrri $AC0.M, @$AR3 // 018b 0a00 lris $AX0.H, #0x00
019f 1b1a srri @$AR0, $AX0.H
01a0 197c lrri $AC0.L, @$AR3 // 018c 27c9 lrs $AC1.M, @DSCR
01a1 1b1a srri @$AR0, $AX0.H // 018d 03a0 0004 andf $AC1.M, #0x0004
01a2 1b5e srri @$AR2, $AC0.M // 018f 029c 018c jlnz 0x018c
01a3 7c22 neg's $ACC0 : @$AR2, $AC0.L while (@DSCR & 4);
01a4 1b3e srri @$AR1, $AC0.M
01a5 1b3c srri @$AR1, $AC0.L // 0191 2ece srs @DSMAH, $AC0.M
// 0192 2ccf srs @DSMAL, $AC0.L
// 0193 16cd 0e54 si @DSPA, #0x0e54
// 0195 16c9 0000 si @DSCR, #0x0000
// 0197 16cb 0260 si @DSBL, #0x0260
// DMA 0x0260bytes to DRAM @ 0x0e54 from CPU @ maddr
// 0199 009f 00a0 lri $AC1.M, #0x00a0
// 019b 8f00 set40
// 019c 007f 01a5 bloop $AC1.M, 0x01a5
// 019e 197e lrri $AC0.M, @$AR3
// 019f 1b1a srri @$AR0, $AX0.H
// 01a0 197c lrri $AC0.L, @$AR3
// 01a1 1b1a srri @$AR0, $AX0.H
// 01a2 1b5e srri @$AR2, $AC0.M
// 01a3 7c22 neg's $ACC0 : @$AR2, $AC0.L
// 01a4 1b3e srri @$AR1, $AC0.M
// 01a5 1b3c srri @$AR1, $AC0.L
// high reg will only be sign bits, and it's never stored, so we can use s32 here
s32* buffer_source = 0x0e44
s32* buffer_dest = 0x0140
s32* buffer_to_zero = 0x0280
s32* buffer_dest_neg = 0x0000
for (i = 0x00a0; i > 0; i--) {
s32 thing = *(buffer_source++)
*(buffer_to_zero++) = 0
*(buffer_dest++) = thing
*(buffer_dest_neg++) = ~thing
}
// Restore CmdBlockBuf
01a6 1c04 mrr $AR0, $IX0 01a6 1c04 mrr $AR0, $IX0
// 01a7 029f 0068 jmp 0x0068 // 01a7 029f 0068 jmp 0x0068
goto DoNextCommand; goto DoNextCommand;
} }
// Interesting, DMAs in new CmdBlock and starts executing it
void Cmd_D() { void Cmd_D() {
// 01a9 8e70 set16'l : $AC0.M, @$AR0 // 01a9 8e70 set16'l : $AC0.M, @$AR0
// 01aa 8960 clr'l $ACC1 : $AC0.L, @$AR0 // 01aa 8960 clr'l $ACC1 : $AC0.L, @$AR0
@ -1204,18 +1291,23 @@ NextMillisecUpd:
void Cmd_4() { void Cmd_4() {
0413 8e00 set16 0413 8e00 set16
0414 0086 0400 lri $IX2, #0x0400
0416 8100 clr $ACC0 0414 0086 0400 lri $IX2, #0x0400 // buffer in dram
0417 8970 clr'l $ACC1 : $AC0.M, @$AR0
0418 191c lrri $AC0.L, @$AR0
0419 2ece srs @DSMAH, $AC0.M // 0416 8100 clr $ACC0
041a 2ccf srs @DSMAL, $AC0.L // 0417 8970 clr'l $ACC1 : $AC0.M, @$AR0
041b 1fc6 mrr $AC0.M, $IX2 // 0418 191c lrri $AC0.L, @$AR0
041c 2ecd srs @DSPA, $AC0.M u16 maddrh = *(CmdBlockBuf++)
041d 16c9 0001 si @DSCR, #0x0001 u16 maddrl = *(CmdBlockBuf++)
041f 16cb 0780 si @DSBL, #0x0780
// 0419 2ece srs @DSMAH, $AC0.M
// 041a 2ccf srs @DSMAL, $AC0.L
// 041b 1fc6 mrr $AC0.M, $IX2
// 041c 2ecd srs @DSPA, $AC0.M
// 041d 16c9 0001 si @DSCR, #0x0001
// 041f 16cb 0780 si @DSBL, #0x0780
// DMA 0x0780bytes from DRAM @ 0x0400 to CPU @ maddr
// 0421 02bf 055c call 0x055c // 0421 02bf 055c call 0x055c
WaitDMA(); WaitDMA();
@ -1228,7 +1320,9 @@ void Cmd_4() {
void Cmd_5() { void Cmd_5() {
0427 8e00 set16 0427 8e00 set16
0428 0086 07c0 lri $IX2, #0x07c0 0428 0086 07c0 lri $IX2, #0x07c0
042a 8100 clr $ACC0 042a 8100 clr $ACC0
042b 8970 clr'l $ACC1 : $AC0.M, @$AR0 042b 8970 clr'l $ACC1 : $AC0.M, @$AR0
042c 191c lrri $AC0.L, @$AR0 042c 191c lrri $AC0.L, @$AR0
@ -2200,7 +2294,7 @@ void SRC_None() {
# From here to the jump tables, all the funcs just wrap calls to mixer(s) in IROM # From here to the jump tables, all the funcs just wrap calls to mixer(s) in IROM
void Cmd_12() { void Mixer_0() {
0768 00c0 0e40 lr $AR0, @0x0e40 0768 00c0 0e40 lr $AR0, @0x0e40
076a 0081 0b89 lri $AR1, #0x0b89 076a 0081 0b89 lri $AR1, #0x0b89
076c 00c2 0e08 lr $AR2, @0x0e08 076c 00c2 0e08 lr $AR2, @0x0e08
@ -2213,7 +2307,7 @@ void Cmd_12() {
0779 02df ret 0779 02df ret
} }
void Unk() { void Mixer_1() {
077a 00c0 0e40 lr $AR0, @0x0e40 077a 00c0 0e40 lr $AR0, @0x0e40
077c 0081 0b89 lri $AR1, #0x0b89 077c 0081 0b89 lri $AR1, #0x0b89
077e 00c2 0e08 lr $AR2, @0x0e08 077e 00c2 0e08 lr $AR2, @0x0e08
@ -2235,7 +2329,7 @@ void Unk() {
079c 02df ret 079c 02df ret
} }
void Unk() { void Mixer_2() {
079d 00c0 0e40 lr $AR0, @0x0e40 079d 00c0 0e40 lr $AR0, @0x0e40
079f 0081 0b89 lri $AR1, #0x0b89 079f 0081 0b89 lri $AR1, #0x0b89
07a1 00c2 0e08 lr $AR2, @0x0e08 07a1 00c2 0e08 lr $AR2, @0x0e08
@ -2817,20 +2911,26 @@ void Unk() {
void Cmd_8() { void Cmd_8() {
0b37 8e00 set16 0b37 8e00 set16
0b38 8100 clr $ACC0 0b38 8100 clr $ACC0
0b39 8970 clr'l $ACC1 : $AC0.M, @$AR0 0b39 8970 clr'l $ACC1 : $AC0.M, @$AR0
0b3a 191c lrri $AC0.L, @$AR0 0b3a 191c lrri $AC0.L, @$AR0
0b3b 2ece srs @DSMAH, $AC0.M 0b3b 2ece srs @DSMAH, $AC0.M
0b3c 2ccf srs @DSMAL, $AC0.L 0b3c 2ccf srs @DSMAL, $AC0.L
0b3d 16cd 0e80 si @DSPA, #0x0e80 0b3d 16cd 0e80 si @DSPA, #0x0e80
0b3f 16c9 0000 si @DSCR, #0x0000 0b3f 16c9 0000 si @DSCR, #0x0000
0b41 16cb 0100 si @DSBL, #0x0100 0b41 16cb 0100 si @DSBL, #0x0100
0b43 1f7e mrr $AX1.H, $AC0.M 0b43 1f7e mrr $AX1.H, $AC0.M
0b44 1f3c mrr $AX1.L, $AC0.L 0b44 1f3c mrr $AX1.L, $AC0.L
0b45 8100 clr $ACC0 0b45 8100 clr $ACC0
0b46 26c9 lrs $AC0.M, @DSCR 0b46 26c9 lrs $AC0.M, @DSCR
0b47 02a0 0004 andf $AC0.M, #0x0004 0b47 02a0 0004 andf $AC0.M, #0x0004
0b49 029c 0b46 jlnz 0x0b46 0b49 029c 0b46 jlnz 0x0b46
0b4b 191e lrri $AC0.M, @$AR0 0b4b 191e lrri $AC0.M, @$AR0
0b4c 191c lrri $AC0.L, @$AR0 0b4c 191c lrri $AC0.L, @$AR0
0b4d 2ece srs @DSMAH, $AC0.M 0b4d 2ece srs @DSMAH, $AC0.M
@ -2838,7 +2938,9 @@ void Cmd_8() {
0b4f 16cd 0280 si @DSPA, #0x0280 0b4f 16cd 0280 si @DSPA, #0x0280
0b51 16c9 0000 si @DSCR, #0x0000 0b51 16c9 0000 si @DSCR, #0x0000
0b53 16cb 0280 si @DSBL, #0x0280 0b53 16cb 0280 si @DSBL, #0x0280
0b55 1c80 mrr $IX0, $AR0 0b55 1c80 mrr $IX0, $AR0
0b56 0080 0280 lri $AR0, #0x0280 0b56 0080 0280 lri $AR0, #0x0280
0b58 00c1 0e1b lr $AR1, @0x0e1b 0b58 00c1 0e1b lr $AR1, @0x0e1b
0b5a 0085 0000 lri $IX1, #0x0000 0b5a 0085 0000 lri $IX1, #0x0000
@ -2847,9 +2949,11 @@ void Cmd_8() {
0b60 0083 16b4 lri $AR3, #0x16b4 0b60 0083 16b4 lri $AR3, #0x16b4
0b62 1ce3 mrr $IX3, $AR3 0b62 1ce3 mrr $IX3, $AR3
0b63 8100 clr $ACC0 0b63 8100 clr $ACC0
0b64 26c9 lrs $AC0.M, @DSCR 0b64 26c9 lrs $AC0.M, @DSCR
0b65 02a0 0004 andf $AC0.M, #0x0004 0b65 02a0 0004 andf $AC0.M, #0x0004
0b67 029c 0b64 jlnz 0x0b64 0b67 029c 0b64 jlnz 0x0b64
0b69 8f00 set40 0b69 8f00 set40
0b6a 8a78 m2'l : $AC1.M, @$AR0 0b6a 8a78 m2'l : $AC1.M, @$AR0
0b6b 8c68 clr15'l : $AC1.L, @$AR0 0b6b 8c68 clr15'l : $AC1.L, @$AR0
@ -2873,23 +2977,28 @@ void Cmd_8() {
0b7e 6e68 movp'l $ACC0 : $AC1.L, @$AR0 0b7e 6e68 movp'l $ACC0 : $AC1.L, @$AR0
0b7f f132 lsl16's $ACC1 : @$AR2, $AC0.M 0b7f f132 lsl16's $ACC1 : @$AR2, $AC0.M
0b80 1a3f srr @$AR1, $AC1.M 0b80 1a3f srr @$AR1, $AC1.M
0b81 1c67 mrr $AR3, $IX3 0b81 1c67 mrr $AR3, $IX3
0b82 84e3 clrp'ld : $AX0.H, $AX1.L, @$AR3 0b82 84e3 clrp'ld : $AX0.H, $AX1.L, @$AR3
0b83 107e loopi #0x7e 0b83 107e loopi #0x7e
0b84 f2e3 madd'ld $AX0.L, $AX0.H : $AX0.H, $AX1.L, @$AR3 0b84 f2e3 madd'ld $AX0.L, $AX0.H : $AX0.H, $AX1.L, @$AR3
0b85 f2e7 madd'ldn $AX0.L, $AX0.H : $AX0.H, $AX1.L, @$AR3 0b85 f2e7 madd'ldn $AX0.L, $AX0.H : $AX0.H, $AX1.L, @$AR3
0b86 f200 madd $AX0.L, $AX0.H 0b86 f200 madd $AX0.L, $AX0.H
0b87 6e00 movp $ACC0 0b87 6e00 movp $ACC0
0b88 1b5e srri @$AR2, $AC0.M 0b88 1b5e srri @$AR2, $AC0.M
0b89 00e1 0e1b sr @0x0e1b, $AR1 0b89 00e1 0e1b sr @0x0e1b, $AR1
0b8b 0080 0280 lri $AR0, #0x0280 0b8b 0080 0280 lri $AR0, #0x0280
0b8d 0083 0f00 lri $AR3, #0x0f00 0b8d 0083 0f00 lri $AR3, #0x0f00
0b8f 0081 0000 lri $AR1, #0x0000 0b8f 0081 0000 lri $AR1, #0x0000
0b91 0082 0140 lri $AR2, #0x0140 0b91 0082 0140 lri $AR2, #0x0140
0b93 0089 ffff lri $WR1, #0xffff 0b93 0089 ffff lri $WR1, #0xffff
0b95 8900 clr $ACC1 0b95 8900 clr $ACC1
0b96 8100 clr $ACC0 0b96 8100 clr $ACC0
0b97 8f00 set40 0b97 8f00 set40
0b98 11a0 0ba0 bloopi #0xa0, 0x0ba0 0b98 11a0 0ba0 bloopi #0xa0, 0x0ba0
0b9a 197f lrri $AC1.M, @$AR3 0b9a 197f lrri $AC1.M, @$AR3
0b9b 9930 asr16's $ACC1 : @$AR0, $AC0.M 0b9b 9930 asr16's $ACC1 : @$AR0, $AC0.M
@ -2898,7 +3007,9 @@ void Cmd_8() {
0b9e 7d29 neg's $ACC1 : @$AR1, $AC1.L 0b9e 7d29 neg's $ACC1 : @$AR1, $AC1.L
0b9f 1b5f srri @$AR2, $AC1.M 0b9f 1b5f srri @$AR2, $AC1.M
0ba0 1b5d srri @$AR2, $AC1.L 0ba0 1b5d srri @$AR2, $AC1.L
0ba1 8e00 set16 0ba1 8e00 set16
0ba2 1fdb mrr $AC0.M, $AX1.H 0ba2 1fdb mrr $AC0.M, $AX1.H
0ba3 1f99 mrr $AC0.L, $AX1.L 0ba3 1f99 mrr $AC0.L, $AX1.L
0ba4 2ece srs @DSMAH, $AC0.M 0ba4 2ece srs @DSMAH, $AC0.M
@ -2918,9 +3029,11 @@ void Cmd_8() {
void Cmd_10() { void Cmd_10() {
0bb1 8e00 set16 0bb1 8e00 set16
0bb2 8100 clr $ACC0 0bb2 8100 clr $ACC0
0bb3 8970 clr'l $ACC1 : $AC0.M, @$AR0 0bb3 8970 clr'l $ACC1 : $AC0.M, @$AR0
0bb4 191c lrri $AC0.L, @$AR0 0bb4 191c lrri $AC0.L, @$AR0
0bb5 2ece srs @DSMAH, $AC0.M 0bb5 2ece srs @DSMAH, $AC0.M
0bb6 2ccf srs @DSMAL, $AC0.L 0bb6 2ccf srs @DSMAL, $AC0.L
0bb7 16cd 07c0 si @DSPA, #0x07c0 0bb7 16cd 07c0 si @DSPA, #0x07c0
@ -2933,6 +3046,7 @@ void Cmd_10() {
0bbf 8100 clr $ACC0 0bbf 8100 clr $ACC0
0bc0 8970 clr'l $ACC1 : $AC0.M, @$AR0 0bc0 8970 clr'l $ACC1 : $AC0.M, @$AR0
0bc1 191c lrri $AC0.L, @$AR0 0bc1 191c lrri $AC0.L, @$AR0
0bc2 2ece srs @DSMAH, $AC0.M 0bc2 2ece srs @DSMAH, $AC0.M
0bc3 2ccf srs @DSMAL, $AC0.L 0bc3 2ccf srs @DSMAL, $AC0.L
0bc4 16cd 07c0 si @DSPA, #0x07c0 0bc4 16cd 07c0 si @DSPA, #0x07c0
@ -2940,21 +3054,28 @@ void Cmd_10() {
0bc8 8900 clr $ACC1 0bc8 8900 clr $ACC1
0bc9 0d20 lris $AC1.L, #0x20 0bc9 0d20 lris $AC1.L, #0x20
0bca 2dcb srs @DSBL, $AC1.L 0bca 2dcb srs @DSBL, $AC1.L
0bcb 4c00 add $ACC0, $ACC1 0bcb 4c00 add $ACC0, $ACC1
0bcc 1c80 mrr $IX0, $AR0 0bcc 1c80 mrr $IX0, $AR0
0bcd 0080 07c0 lri $AR0, #0x07c0 0bcd 0080 07c0 lri $AR0, #0x07c0
0bcf 0083 0000 lri $AR3, #0x0000 0bcf 0083 0000 lri $AR3, #0x0000
0bd1 1c43 mrr $AR2, $AR3 0bd1 1c43 mrr $AR2, $AR3
0bd2 0a00 lris $AX0.H, #0x00 0bd2 0a00 lris $AX0.H, #0x00
0bd3 27c9 lrs $AC1.M, @DSCR 0bd3 27c9 lrs $AC1.M, @DSCR
0bd4 03a0 0004 andf $AC1.M, #0x0004 0bd4 03a0 0004 andf $AC1.M, #0x0004
0bd6 029c 0bd3 jlnz 0x0bd3 0bd6 029c 0bd3 jlnz 0x0bd3
0bd8 2ece srs @DSMAH, $AC0.M 0bd8 2ece srs @DSMAH, $AC0.M
0bd9 2ccf srs @DSMAL, $AC0.L 0bd9 2ccf srs @DSMAL, $AC0.L
0bda 16cd 07d0 si @DSPA, #0x07d0 0bda 16cd 07d0 si @DSPA, #0x07d0
0bdc 16c9 0000 si @DSCR, #0x0000 0bdc 16c9 0000 si @DSCR, #0x0000
0bde 16cb 04e0 si @DSBL, #0x04e0 0bde 16cb 04e0 si @DSBL, #0x04e0
0be0 8f00 set40 0be0 8f00 set40
0be1 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0 0be1 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0
0be2 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0 0be2 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0
0be3 6a00 movax $ACC0, $AX1 0be3 6a00 movax $ACC0, $AX1
@ -2968,6 +3089,7 @@ void Cmd_10() {
0bec 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0 0bec 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0
0bed 6a3a movax's $ACC0, $AX1.L : @$AR2, $AC1.M 0bed 6a3a movax's $ACC0, $AX1.L : @$AR2, $AC1.M
0bee 482a addax's $ACC0, $AX0.L : @$AR2, $AC1.L 0bee 482a addax's $ACC0, $AX0.L : @$AR2, $AC1.L
0bef 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0 0bef 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0
0bf0 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0 0bf0 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0
0bf1 6b32 movax's $ACC1, $AX1.L : @$AR2, $AC0.M 0bf1 6b32 movax's $ACC1, $AX1.L : @$AR2, $AC0.M
@ -2990,6 +3112,7 @@ void Cmd_10() {
0c03 683a movax's $ACC0, $AX0.L : @$AR2, $AC1.M 0c03 683a movax's $ACC0, $AX0.L : @$AR2, $AC1.M
0c04 7c00 neg $ACC0 0c04 7c00 neg $ACC0
0c05 4a2a addax's $ACC0, $AX1.L : @$AR2, $AC1.L 0c05 4a2a addax's $ACC0, $AX1.L : @$AR2, $AC1.L
0c06 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0 0c06 80f0 nx'ld : $AX0.H, $AX1.H, @$AR0
0c07 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0 0c07 80c0 nx'ld : $AX0.L, $AX1.L, @$AR0
0c08 6932 movax's $ACC1, $AX0.L : @$AR2, $AC0.M 0c08 6932 movax's $ACC1, $AX0.L : @$AR2, $AC0.M
@ -2997,6 +3120,7 @@ void Cmd_10() {
0c0a 4b22 addax's $ACC1, $AX1.L : @$AR2, $AC0.L 0c0a 4b22 addax's $ACC1, $AX1.L : @$AR2, $AC0.L
0c0b 1b5f srri @$AR2, $AC1.M 0c0b 1b5f srri @$AR2, $AC1.M
0c0c 1b5d srri @$AR2, $AC1.L 0c0c 1b5d srri @$AR2, $AC1.L
0c0d 1c04 mrr $AR0, $IX0 0c0d 1c04 mrr $AR0, $IX0
// 0c0e 029f 0068 jmp 0x0068 // 0c0e 029f 0068 jmp 0x0068