Arm64Emitter: Fix SHRN/SHRN2
The "vector shift by immediate" category encodes the shift amount for right shifts as `size - amount`, whereas left shifts use `amount`. We're not actually using SHRN/SHRN2 anywhere, which is why this has gone undetected.
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@ -3589,7 +3589,7 @@ void ARM64FloatEmitter::SHL(ARM64Reg Rd, ARM64Reg Rn, u32 shift)
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{
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constexpr size_t src_size = 64;
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ASSERT_MSG(DYNA_REC, IsDouble(Rd), "Only double registers are supported!");
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must less than the element size! {} {}",
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must be less than the element size! {} {}",
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shift, src_size);
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EmitScalarShiftImm(0, src_size | shift, 0b01010, Rd, Rn);
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}
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@ -3598,7 +3598,7 @@ void ARM64FloatEmitter::URSHR(ARM64Reg Rd, ARM64Reg Rn, u32 shift)
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{
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constexpr size_t src_size = 64;
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ASSERT_MSG(DYNA_REC, IsDouble(Rd), "Only double registers are supported!");
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must less than the element size! {} {}",
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must be less than the element size! {} {}",
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shift, src_size);
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EmitScalarShiftImm(1, src_size * 2 - shift, 0b00100, Rd, Rn);
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}
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@ -3647,7 +3647,7 @@ void ARM64FloatEmitter::UXTL2(u8 src_size, ARM64Reg Rd, ARM64Reg Rn)
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void ARM64FloatEmitter::SHL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, u32 shift)
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{
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must less than the element size! {} {}",
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must be less than the element size! {} {}",
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shift, src_size);
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EmitShiftImm(1, 0, src_size | shift, 0b01010, Rd, Rn);
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}
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@ -3661,7 +3661,7 @@ void ARM64FloatEmitter::SSHLL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, u32 shift,
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void ARM64FloatEmitter::URSHR(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, u32 shift)
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{
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must less than the element size! {} {}",
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ASSERT_MSG(DYNA_REC, shift < src_size, "Shift amount must be less than the element size! {} {}",
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shift, src_size);
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EmitShiftImm(1, 1, src_size * 2 - shift, 0b00100, Rd, Rn);
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}
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@ -3677,7 +3677,7 @@ void ARM64FloatEmitter::SHRN(u8 dest_size, ARM64Reg Rd, ARM64Reg Rn, u32 shift,
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{
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ASSERT_MSG(DYNA_REC, shift < dest_size, "Shift amount must be less than the element size! {} {}",
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shift, dest_size);
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EmitShiftImm(upper, 1, dest_size | shift, 0b10000, Rd, Rn);
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EmitShiftImm(upper, 1, dest_size * 2 - shift, 0b10000, Rd, Rn);
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}
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void ARM64FloatEmitter::SXTL(u8 src_size, ARM64Reg Rd, ARM64Reg Rn, bool upper)
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