From b922f4baa6a7f682583139c5b95e634a54f2bb20 Mon Sep 17 00:00:00 2001 From: JosJuice Date: Sun, 27 Aug 2023 15:59:03 +0200 Subject: [PATCH] JitArm64: Write PC when calling MMU.cpp This functionality was in Jit64 but not JitArm64. --- .../Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp | 6 +++--- .../Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp | 14 ++++++++++---- .../Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp | 11 +++++++++++ .../PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp | 10 ++++++++++ 4 files changed, 34 insertions(+), 7 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp index bae5af75ec..41d999631b 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp @@ -69,7 +69,7 @@ void Jit64::psq_stXX(UGeckoInstruction inst) } else { - // Stash PC in case asm_routine causes exception + // Stash PC in case asm routine needs to call into C++ MOV(32, PPCSTATE(pc), Imm32(js.compilerPC)); // We know what GQR is here, so we can load RSCRATCH2 and call into the store method directly // with just the scale bits. @@ -83,7 +83,7 @@ void Jit64::psq_stXX(UGeckoInstruction inst) } else { - // Stash PC incase asm_routine causes exception + // Stash PC in case asm routine needs to call into C++ MOV(32, PPCSTATE(pc), Imm32(js.compilerPC)); // Some games (e.g. Dirt 2) incorrectly set the unused bits which breaks the lookup table code. // Hence, we need to mask out the unused bits. The layout of the GQR register is @@ -144,7 +144,7 @@ void Jit64::psq_lXX(UGeckoInstruction inst) } else { - // Stash PC in case asm_routine causes exception + // Stash PC in case asm routine needs to call into C++ MOV(32, PPCSTATE(pc), Imm32(js.compilerPC)); // Get the high part of the GQR register OpArg gqr = PPCSTATE_SPR(SPR_GQR0 + i); diff --git a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp index 04036e11ab..6cebe3e548 100644 --- a/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp +++ b/Source/Core/Core/PowerPC/Jit64Common/EmuCodeBlock.cpp @@ -384,8 +384,11 @@ void EmuCodeBlock::SafeLoadToReg(X64Reg reg_value, const Gen::OpArg& opAddress, SetJumpTarget(slow); } - // Helps external systems know which instruction triggered the read. - // Invalid for calls from Jit64AsmCommon routines + // PC is used by memory watchpoints (if enabled), profiling where to insert gather pipe + // interrupt checks, and printing accurate PC locations in debug logs. + // + // In the case of Jit64AsmCommon routines, we don't know the PC here, + // so the caller has to store the PC themselves. if (!(flags & SAFE_LOADSTORE_NO_UPDATE_PC)) { MOV(32, PPCSTATE(pc), Imm32(js.compilerPC)); @@ -553,8 +556,11 @@ void EmuCodeBlock::SafeWriteRegToReg(OpArg reg_value, X64Reg reg_addr, int acces SetJumpTarget(slow); } - // PC is used by memory watchpoints (if enabled) or to print accurate PC locations in debug logs - // Invalid for calls from Jit64AsmCommon routines + // PC is used by memory watchpoints (if enabled), profiling where to insert gather pipe + // interrupt checks, and printing accurate PC locations in debug logs. + // + // In the case of Jit64AsmCommon routines, we don't know the PC here, + // so the caller has to store the PC themselves. if (!(flags & SAFE_LOADSTORE_NO_UPDATE_PC)) { MOV(32, PPCSTATE(pc), Imm32(js.compilerPC)); diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp index 8e14e694c4..30d7080c8e 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_BackPatch.cpp @@ -189,6 +189,17 @@ void JitArm64::EmitBackpatchRoutine(u32 flags, MemAccessMode mode, ARM64Reg RS, ABI_PushRegisters(gprs_to_push & ~gprs_to_push_early); m_float_emit.ABI_PushRegisters(fprs_to_push, ARM64Reg::X30); + // PC is used by memory watchpoints (if enabled), profiling where to insert gather pipe + // interrupt checks, and printing accurate PC locations in debug logs. + // + // In the case of JitAsm routines, we don't know the PC here, + // so the caller has to store the PC themselves. + if (!emitting_routine) + { + MOVI2R(ARM64Reg::W30, js.compilerPC); + STR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(pc)); + } + if (flags & BackPatchInfo::FLAG_STORE) { ARM64Reg src_reg = RS; diff --git a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp index 9a74720842..f60ca3cf25 100644 --- a/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp +++ b/Source/Core/Core/PowerPC/JitArm64/JitArm64_LoadStorePaired.cpp @@ -102,6 +102,11 @@ void JitArm64::psq_lXX(UGeckoInstruction inst) else { LDR(IndexType::Unsigned, scale_reg, PPC_REG, PPCSTATE_OFF_SPR(SPR_GQR0 + i)); + + // Stash PC in case asm routine needs to call into C++ + MOVI2R(ARM64Reg::W30, js.compilerPC); + STR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(pc)); + UBFM(type_reg, scale_reg, 16, 18); // Type UBFM(scale_reg, scale_reg, 24, 29); // Scale @@ -254,6 +259,11 @@ void JitArm64::psq_stXX(UGeckoInstruction inst) else { LDR(IndexType::Unsigned, scale_reg, PPC_REG, PPCSTATE_OFF_SPR(SPR_GQR0 + i)); + + // Stash PC in case asm routine needs to call into C++ + MOVI2R(ARM64Reg::W30, js.compilerPC); + STR(IndexType::Unsigned, ARM64Reg::W30, PPC_REG, PPCSTATE_OFF(pc)); + UBFM(type_reg, scale_reg, 0, 2); // Type UBFM(scale_reg, scale_reg, 8, 13); // Scale