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Merge pull request #9817 from Sintendo/jit64subfic 

Jit64: subfic - Optimize constants for d != a
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Markus Wick 2021-06-17 09:12:50 +02:00 committed by GitHub
parent 4e9e75f4c5 18aaf488b0
commit b530d9b8c2
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 24 additions and 21 deletions
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45
Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
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@ -898,28 +898,31 @@ void Jit64::subfic(UGeckoInstruction inst)
RCX64Reg Rd = gpr.Bind(d, RCMode::Write);
RegCache::Realize(Ra, Rd);
if (d == a)
if (imm == 0)
{
if (imm == 0)
{
// Flags act exactly like subtracting from 0
NEG(32, Rd);
// Output carry is inverted
FinalizeCarry(CC_NC);
}
else if (imm == -1)
{
NOT(32, Rd);
// CA is always set in this case
FinalizeCarry(true);
}
else
{
NOT(32, Rd);
ADD(32, Rd, Imm32(imm + 1));
// Output carry is normal
FinalizeCarry(CC_C);
}
if (d != a)
MOV(32, Rd, Ra);
// Flags act exactly like subtracting from 0
NEG(32, Rd);
// Output carry is inverted
FinalizeCarry(CC_NC);
}
else if (imm == -1)
{
if (d != a)
MOV(32, Rd, Ra);
NOT(32, Rd);
// CA is always set in this case
FinalizeCarry(true);
}
else if (d == a)
{
NOT(32, Rd);
ADD(32, Rd, Imm32(imm + 1));
// Output carry is normal
FinalizeCarry(CC_C);
}
else
{