Some improvements of FP and DMA
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4334 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -105,7 +105,6 @@ void fcmpu(UGeckoInstruction _inst)
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}
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// Apply current rounding mode
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// need to investigate this instruction.
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void fctiwx(UGeckoInstruction _inst)
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{
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const double b = rPS0(_inst.FB);
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@ -133,7 +132,7 @@ void fctiwx(UGeckoInstruction _inst)
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{
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double t = b + 0.5;
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i = (s32)t;
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if (t - i < 0) i--;
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if (t - i < 0 || (t - i == 0 && b > 0)) i--;
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break;
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}
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case 1: // zero
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@ -161,19 +160,15 @@ void fctiwx(UGeckoInstruction _inst)
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FPSCR.FR = fabs(di) > fabs(b);
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}
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}
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//FPRF undefined
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riPS0(_inst.FD) = (u64)value; // zero extend
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if (_inst.Rc)
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// based on HW tests
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// FPRF is not affected
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riPS0(_inst.FD) = 0xfff8000000000000ull | value;
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if (value == 0 && ( (*(u64*)&b) & DOUBLE_SIGN ))
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riPS0(_inst.FD) |= 0x100000000ull;
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if (_inst.Rc)
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Helper_UpdateCR1(rPS0(_inst.FD));
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}
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/*
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In the float -> int direction, floating point input values larger than the largest
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representable int result in 0x80000000 (a very negative number) rather than the
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largest representable int on PowerPC. */
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// Always round toward zero
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void fctiwzx(UGeckoInstruction _inst)
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{
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@ -209,8 +204,11 @@ void fctiwzx(UGeckoInstruction _inst)
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}
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value = (u32)i;
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}
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riPS0(_inst.FD) = (u64)value;
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// based on HW tests
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// FPRF is not affected
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riPS0(_inst.FD) = 0xfff8000000000000ull | value;
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if (value == 0 && ( (*(u64*)&b) & DOUBLE_SIGN ))
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riPS0(_inst.FD) |= 0x100000000ull;
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if (_inst.Rc)
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Helper_UpdateCR1(rPS0(_inst.FD));
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}
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@ -315,19 +315,18 @@ void dcbtst(UGeckoInstruction _inst)
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_assert_msg_(POWERPC,0,"dcbtst - Not implemented");
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}
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// __________________________________________________________________________________________________
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// dcbz
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// TODO(ector) check docs
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void dcbz(UGeckoInstruction _inst)
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{
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// !!! after the dcbz follows a dcbf... dont clear the memory in this case !!!
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// 0x81330c2c
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u32 NextOpcode = Memory::Read_U32(PC+4);
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// LinesPrower: why? does it break something?
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// according to docs dcbz->dcbf should clear the memory immediately!
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// However, dcbz->dcbi won't clear anything, but that's completely senseless
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/* u32 NextOpcode = Memory::Read_U32(PC+4);
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if (NextOpcode == 0x7C0400AC)
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{
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return;
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}
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}*/
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// HACK but works... we think
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Memory::Memset(Helper_Get_EA_X(_inst) & (~31), 0, 32);
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}
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@ -473,18 +473,8 @@ void ps_cmpo1(UGeckoInstruction _inst)
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// TODO(ector) check docs
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void dcbz_l(UGeckoInstruction _inst)
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{
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// This is supposed to allocate a cache line in the locked cache. Not entirely sure how
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// this is visible to the rest of the world. For now, we ignore it.
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/*
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addr_t ea = Helper_Get_EA(_inst);
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u32 blockStart = ea & (~(CACHEBLOCKSIZE-1));
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u32 blockEnd = blockStart + CACHEBLOCKSIZE;
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//FAKE: clear memory instead of clearing the cache block
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for (int i=blockStart; i<blockEnd; i+=4)
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Memory::Write_U32(0,i);
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*/
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Memory::Memset(Helper_Get_EA_X(_inst) & (~31), 0, 32);
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}
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} // namespace
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@ -323,6 +323,9 @@ void mtspr(UGeckoInstruction _inst)
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UReg_HID2 old_hid2;
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old_hid2.Hex = oldValue;
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//if (HID2.LCE && !old_hid2.LCE)
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// PanicAlert("Locked cache enabled!");
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if (HID2.PSE == 0)
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PanicAlert("WARNING: PSE in HID2 isnt set");
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@ -363,6 +366,7 @@ void mtspr(UGeckoInstruction _inst)
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u32 dwMemAddress = DMAU.MEM_ADDR << 5;
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u32 dwCacheAddress = DMAL.LC_ADDR << 5;
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u32 iLength = ((DMAU.DMA_LEN_U << 2) | DMAL.DMA_LEN_L);
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//INFO_LOG(POWERPC, "DMA: mem = %x, cache = %x, len = %u, LD = %d, PC=%x", dwMemAddress, dwCacheAddress, iLength, (int)DMAL.DMA_LD, PC);
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if (iLength == 0)
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iLength = 128;
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if (DMAL.DMA_LD)
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@ -370,6 +374,7 @@ void mtspr(UGeckoInstruction _inst)
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else
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Memory::DMA_LCToMemory(dwMemAddress, dwCacheAddress, iLength);
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}
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DMAL.DMA_T = 0;
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break;
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case SPR_DEC:
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