More DSPSpy findings - nakee's "TSTAXL" isn't test. Not sure what it is though.

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3003 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
hrydgard 2009-04-18 21:35:21 +00:00
parent d939afdcf2
commit b4c22390ac
4 changed files with 39 additions and 15 deletions

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@ -510,7 +510,7 @@ void si(const UDSPInstruction& opc)
// TSTAXH $axR.h
// 1000 011r xxxx xxxx
// Test hight part of secondary accumulator $axR.h.
// Test high part of secondary accumulator $axR.h.
void tstaxh(const UDSPInstruction& opc)
{
u8 reg = (opc.hex >> 8) & 0x1;
@ -519,15 +519,17 @@ void tstaxh(const UDSPInstruction& opc)
Update_SR_Register16(val);
}
// TSTAXL $axR.h
// 1000 011r xxxx xxxx
// Test lower part of secondary accumulator $axR.h.
// TSTAXL $acR
// 1000 r001 xxxx xxxx
// r specifies one of the main accumulators.
// Definitely not a test instruction - it changes the accums.
// Not affected by m0/m2. Not affected by s16/s40.
void tstaxl(const UDSPInstruction& opc)
{
u8 reg = (opc.hex >> 8) & 0x1;
s16 val = dsp_get_ax_l(reg);
Update_SR_Register16(val);
// This is probably all wrong.
//u8 reg = (opc.hex >> 8) & 0x1;
//s16 val = dsp_get_ax_l(reg);
//Update_SR_Register16(val);
}
// CLR $acR

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@ -240,8 +240,8 @@ const DSPOPCTemplate opcodes[] =
{"TST", 0xb100, 0xf7ff, DSPInterpreter::tst, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
// GUESSING NOT SURE AT ALL!!!!
{"TSTAXL", 0xa100, 0xffff, DSPInterpreter::tstaxl, nop, 1 | P_EXT, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
// Definitely not TSTAXL, it affects one of the accumulators. (a100 or a900, same op, one parameter).
{"TSTAXL", 0xa100, 0xffff, DSPInterpreter::tstaxl, nop, 1 | P_EXT, 1, {{P_ACC, 1, 0, 11, 0x0800}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},
{"TSTAXH", 0x8600, 0xfeff, DSPInterpreter::tstaxh, nop, 1 | P_EXT, 1, {{P_REG1A, 1, 0, 8, 0x0100}}, dsp_op_ext_ops_pro, dsp_op_ext_ops_epi},

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@ -167,7 +167,7 @@ inline void dsp_set_long_acc(int _reg, s64 val)
val >>= 16;
g_dsp.r[0x1e + _reg] = (u16)val;
val >>= 16;
g_dsp.r[0x10 + _reg] = (u16)val;
g_dsp.r[0x10 + _reg] = (u16)(s16)(s8)(u8)val;
}

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@ -185,16 +185,37 @@ main:
nop
nop
nop
lris $AC0.M, #0xcc
lris $AC1.M, #0xcc
nop
inc $acc0
mrr $r00, $r13
call send_back
s16
inc $acc0
nop
lris $AC0.M, #0xcc
lris $AC1.M, #0xcc
nop
nop
mrr $r00, $r13
call send_back
cw 0xa100
call send_back
cw 0xa900
call send_back
s16
cw 0xa100
call send_back
s16
cw 0xa900
call send_back
; We're done - currently we only test one opcode, in this case 0x8600.
; It's possible to test many more in one go - just call send_back after each one.
@ -623,7 +644,8 @@ dma_copy:
ret ; from send_back
; I wish I knew what this 16 means.
; If you are in s16 mode, use this instead of send_back if you want to stay
; in s16 mode.
send_back_16:
set40
call send_back