From b24197f913301dcef1655961da67cc94f278f696 Mon Sep 17 00:00:00 2001 From: Ryan Houdek Date: Sun, 16 Nov 2014 09:14:02 +0000 Subject: [PATCH] Adds MCR/MRC to the ARMv7 emitter. --- Source/Core/Common/ArmEmitter.cpp | 22 ++++++++++++++++++++++ Source/Core/Common/ArmEmitter.h | 4 ++++ 2 files changed, 26 insertions(+) diff --git a/Source/Core/Common/ArmEmitter.cpp b/Source/Core/Common/ArmEmitter.cpp index dda13cb4c1..15ef41044b 100644 --- a/Source/Core/Common/ArmEmitter.cpp +++ b/Source/Core/Common/ArmEmitter.cpp @@ -388,6 +388,28 @@ void ARMXEmitter::YIELD() Write32(condition | 0x0320F001); } +void ARMXEmitter::MRC(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2) +{ + _assert_msg_(DYNA_REC, coproc <= 0xF, "%s has co-processor that is %d when it must be under 16!", __FUNCTION__, coproc); + _assert_msg_(DYNA_REC, opc1 <= 7, "%s has opc1 that is %d when it must be under 8!", __FUNCTION__, opc1); + _assert_msg_(DYNA_REC, CRn <= 0xF, "%s has CRn that is %d when it must be under 16!", __FUNCTION__, CRn); + _assert_msg_(DYNA_REC, opc2 <= 7, "%s has opc2 that is %d when it must be under 8!", __FUNCTION__, opc2); + + Write32(condition | (0b1110 << 24) | (opc1 << 21) | (1 << 20) | (CRn << 16) \ + | (Rt << 12) | (coproc << 8) | (opc2 << 5) | (1 << 4) | CRm); +} + +void ARMXEmitter::MCR(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2) +{ + _assert_msg_(DYNA_REC, coproc <= 0xF, "%s has co-processor that is %d when it must be under 16!", __FUNCTION__, coproc); + _assert_msg_(DYNA_REC, opc1 <= 7, "%s has opc1 that is %d when it must be under 8!", __FUNCTION__, opc1); + _assert_msg_(DYNA_REC, CRn <= 0xF, "%s has CRn that is %d when it must be under 16!", __FUNCTION__, CRn); + _assert_msg_(DYNA_REC, opc2 <= 7, "%s has opc2 that is %d when it must be under 8!", __FUNCTION__, opc2); + + Write32(condition | (0b1110 << 24) | (opc1 << 21) | (CRn << 16) \ + | (Rt << 12) | (coproc << 8) | (opc2 << 5) | (1 << 4) | CRm); +} + FixupBranch ARMXEmitter::B() { FixupBranch branch; diff --git a/Source/Core/Common/ArmEmitter.h b/Source/Core/Common/ArmEmitter.h index ed0376e9c8..cde7e9db66 100644 --- a/Source/Core/Common/ArmEmitter.h +++ b/Source/Core/Common/ArmEmitter.h @@ -385,6 +385,10 @@ public: // Hint instruction void YIELD(); + // System + void MRC(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2 = 0); + void MCR(u32 coproc, u32 opc1, ARMReg Rt, u32 CRn, u32 CRm, u32 opc2 = 0); + // Do nothing void NOP(int count = 1); //nop padding - TODO: fast nop slides, for amd and intel (check their manuals)