ShuriZma
/
dolphin
mirror of https://github.com/dolphin-emu/dolphin.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

DSP: Remove some magic numbers for register IDs

This commit is contained in:
Pokechu22 2022-05-23 16:51:46 -07:00
parent 8b52c7315b
commit b06d38389b
4 changed files with 80 additions and 71 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
Source/Core/Core/DSP/DSPAssembler.cpp
View File

@ -22,6 +22,7 @@
#include "Common/FileUtil.h" #include "Common/FileUtil.h"
#include "Common/StringUtil.h" #include "Common/StringUtil.h"
#include "Core/DSP/DSPCore.h"
#include "Core/DSP/DSPDisassembler.h" #include "Core/DSP/DSPDisassembler.h"
#include "Core/DSP/DSPTables.h" #include "Core/DSP/DSPTables.h"
@ -483,17 +484,15 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
if ((opc->params[i].type & P_REG) && (par[i].type & P_REG)) if ((opc->params[i].type & P_REG) && (par[i].type & P_REG))
{ {
// Just a temp. Should be replaced with more purposeful vars.
int value;
// modified by Hermes: test the register range // modified by Hermes: test the register range
switch ((unsigned)opc->params[i].type) switch (opc->params[i].type)
{ {
case P_REG18: case P_REG18:
case P_REG19: case P_REG19:
case P_REG1A: case P_REG1A:
case P_REG1C: case P_REG1C:
value = (opc->params[i].type >> 8) & 31; {
int value = (opc->params[i].type >> 8) & 0x1f;
if ((int)par[i].val < value || if ((int)par[i].val < value ||
(int)par[i].val > value + get_mask_shifted_down(opc->params[i].mask)) (int)par[i].val > value + get_mask_shifted_down(opc->params[i].mask))
{ {
@ -504,8 +503,9 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
ShowError(AssemblerError::InvalidRegister); ShowError(AssemblerError::InvalidRegister);
} }
break; break;
}
case P_PRG: case P_PRG:
if ((int)par[i].val < 0 || (int)par[i].val > 0x3) if ((int)par[i].val < DSP_REG_AR0 || (int)par[i].val > DSP_REG_AR3)
{ {
if (type == OpcodeType::Extension) if (type == OpcodeType::Extension)
fprintf(stderr, "(ext) "); fprintf(stderr, "(ext) ");
@ -515,12 +515,12 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
} }
break; break;
case P_ACC: case P_ACC:
if ((int)par[i].val < 0x20 || (int)par[i].val > 0x21) if ((int)par[i].val < DSP_REG_ACC0_FULL || (int)par[i].val > DSP_REG_ACC1_FULL)
{ {
if (type == OpcodeType::Extension) if (type == OpcodeType::Extension)
fprintf(stderr, "(ext) "); fprintf(stderr, "(ext) ");
if (par[i].val >= 0x1e && par[i].val <= 0x1f) if (par[i].val >= DSP_REG_ACM0 && par[i].val <= DSP_REG_ACM1)
{ {
fprintf(stderr, "%i : %s ", m_code_line, m_cur_line.c_str()); fprintf(stderr, "%i : %s ", m_code_line, m_cur_line.c_str());
fprintf(stderr, fprintf(stderr,
@ -529,7 +529,7 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
(par[i].val & 1), (par[i].val & 1), m_code_line, current_param, (par[i].val & 1), (par[i].val & 1), m_code_line, current_param,
static_cast<int>(type)); static_cast<int>(type));
} }
else if (par[i].val >= 0x1c && par[i].val <= 0x1d) else if (par[i].val >= DSP_REG_ACL0 && par[i].val <= DSP_REG_ACL1)
{ {
fprintf( fprintf(
stderr, stderr,
@ -543,19 +543,19 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
} }
break; break;
case P_ACCM: case P_ACCM:
if ((int)par[i].val < 0x1e || (int)par[i].val > 0x1f) if ((int)par[i].val < DSP_REG_ACM0 || (int)par[i].val > DSP_REG_ACM1)
{ {
if (type == OpcodeType::Extension) if (type == OpcodeType::Extension)
fprintf(stderr, "(ext) "); fprintf(stderr, "(ext) ");
if (par[i].val >= 0x1c && par[i].val <= 0x1d) if (par[i].val >= DSP_REG_ACL0 && par[i].val <= DSP_REG_ACL1)
{ {
fprintf( fprintf(
stderr, stderr,
"WARNING: $ACL%d register used instead of $ACM%d register Line: %d Param: %zu\n", "WARNING: $ACL%d register used instead of $ACM%d register Line: %d Param: %zu\n",
(par[i].val & 1), (par[i].val & 1), m_code_line, current_param); (par[i].val & 1), (par[i].val & 1), m_code_line, current_param);
} }
else if (par[i].val >= 0x20 && par[i].val <= 0x21) else if (par[i].val >= DSP_REG_ACC0_FULL && par[i].val <= DSP_REG_ACC1_FULL)
{ {
fprintf( fprintf(
stderr, stderr,
@ -570,12 +570,12 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
break; break;
case P_ACCL: case P_ACCL:
if ((int)par[i].val < 0x1c || (int)par[i].val > 0x1d) if ((int)par[i].val < DSP_REG_ACL0 || (int)par[i].val > DSP_REG_ACL1)
{ {
if (type == OpcodeType::Extension) if (type == OpcodeType::Extension)
fprintf(stderr, "(ext) "); fprintf(stderr, "(ext) ");
if (par[i].val >= 0x1e && par[i].val <= 0x1f) if (par[i].val >= DSP_REG_ACM0 && par[i].val <= DSP_REG_ACM1)
{ {
fprintf(stderr, "%s ", m_cur_line.c_str()); fprintf(stderr, "%s ", m_cur_line.c_str());
fprintf( fprintf(
@ -583,7 +583,7 @@ bool DSPAssembler::VerifyParams(const DSPOPCTemplate* opc, param_t* par, size_t
"WARNING: $ACM%d register used instead of $ACL%d register Line: %d Param: %zu\n", "WARNING: $ACM%d register used instead of $ACL%d register Line: %d Param: %zu\n",
(par[i].val & 1), (par[i].val & 1), m_code_line, current_param); (par[i].val & 1), (par[i].val & 1), m_code_line, current_param);
} }
else if (par[i].val >= 0x20 && par[i].val <= 0x21) else if (par[i].val >= DSP_REG_ACC0_FULL && par[i].val <= DSP_REG_ACC1_FULL)
{ {
fprintf(stderr, "%s ", m_cur_line.c_str()); fprintf(stderr, "%s ", m_cur_line.c_str());
fprintf( fprintf(

16
Source/Core/Core/DSP/DSPCore.h
View File

@ -122,15 +122,23 @@ enum : int
DSP_REG_AXH1 = 0x1b, DSP_REG_AXH1 = 0x1b,
// Accumulator (global) // Accumulator (global)
DSP_REG_ACC0 = 0x1c,
DSP_REG_ACC1 = 0x1d,
DSP_REG_ACL0 = 0x1c, // Low accumulator DSP_REG_ACL0 = 0x1c, // Low accumulator
DSP_REG_ACL1 = 0x1d, DSP_REG_ACL1 = 0x1d,
DSP_REG_ACM0 = 0x1e, // Mid accumulator DSP_REG_ACM0 = 0x1e, // Mid accumulator
DSP_REG_ACM1 = 0x1f, DSP_REG_ACM1 = 0x1f,
DSP_REG_ACH0 = 0x10, // Sign extended 8 bit register 0 DSP_REG_ACH0 = 0x10, // Sign extended 8 bit register 0
DSP_REG_ACH1 = 0x11 // Sign extended 8 bit register 1 DSP_REG_ACH1 = 0x11, // Sign extended 8 bit register 1
};
enum : int
{
// Magic values used by DSPTables.h
// These do not correspond to real registers like above, but instead combined versions of the
// registers.
DSP_REG_ACC0_FULL = 0x20,
DSP_REG_ACC1_FULL = 0x21,
DSP_REG_AX0_FULL = 0x22,
DSP_REG_AX1_FULL = 0x23,
}; };
// Hardware registers address // Hardware registers address

74
Source/Core/Core/DSP/DSPTables.cpp
View File

@ -13,7 +13,7 @@
#include "Common/CommonTypes.h" #include "Common/CommonTypes.h"
#include "Common/Logging/Log.h" #include "Common/Logging/Log.h"
#include "Core/DSP/Interpreter/DSPIntTables.h" #include "Core/DSP/DSPCore.h"
namespace DSP namespace DSP
{ {
@ -451,44 +451,44 @@ const std::array<pdlabel_t, 96> pdlabels =
const std::array<pdlabel_t, 36> regnames = const std::array<pdlabel_t, 36> regnames =
{{ {{
{0x00, "AR0", "Addr Reg 00",}, {DSP_REG_AR0, "AR0", "Addr Reg 00",},
{0x01, "AR1", "Addr Reg 01",}, {DSP_REG_AR1, "AR1", "Addr Reg 01",},
{0x02, "AR2", "Addr Reg 02",}, {DSP_REG_AR2, "AR2", "Addr Reg 02",},
{0x03, "AR3", "Addr Reg 03",}, {DSP_REG_AR3, "AR3", "Addr Reg 03",},
{0x04, "IX0", "Index Reg 0",}, {DSP_REG_IX0, "IX0", "Index Reg 0",},
{0x05, "IX1", "Index Reg 1",}, {DSP_REG_IX1, "IX1", "Index Reg 1",},
{0x06, "IX2", "Index Reg 2",}, {DSP_REG_IX2, "IX2", "Index Reg 2",},
{0x07, "IX3", "Index Reg 3",}, {DSP_REG_IX3, "IX3", "Index Reg 3",},
{0x08, "WR0", "Wrapping Register 0",}, {DSP_REG_WR0, "WR0", "Wrapping Register 0",},
{0x09, "WR1", "Wrapping Register 1",}, {DSP_REG_WR1, "WR1", "Wrapping Register 1",},
{0x0a, "WR2", "Wrapping Register 2",}, {DSP_REG_WR2, "WR2", "Wrapping Register 2",},
{0x0b, "WR3", "Wrapping Register 3",}, {DSP_REG_WR3, "WR3", "Wrapping Register 3",},
{0x0c, "ST0", "Call stack",}, {DSP_REG_ST0, "ST0", "Call stack",},
{0x0d, "ST1", "Data stack",}, {DSP_REG_ST1, "ST1", "Data stack",},
{0x0e, "ST2", "Loop addr stack",}, {DSP_REG_ST2, "ST2", "Loop addr stack",},
{0x0f, "ST3", "Loop counter stack",}, {DSP_REG_ST3, "ST3", "Loop counter stack",},
{0x10, "AC0.H", "Accu High 0",}, {DSP_REG_ACH0, "AC0.H", "Accu High 0",},
{0x11, "AC1.H", "Accu High 1",}, {DSP_REG_ACH1, "AC1.H", "Accu High 1",},
{0x12, "CR", "Config Register",}, {DSP_REG_CR, "CR", "Config Register",},
{0x13, "SR", "Special Register",}, {DSP_REG_SR, "SR", "Special Register",},
{0x14, "PROD.L", "Prod L",}, {DSP_REG_PRODL, "PROD.L", "Prod L",},
{0x15, "PROD.M1", "Prod M1",}, {DSP_REG_PRODM, "PROD.M1", "Prod M1",},
{0x16, "PROD.H", "Prod H",}, {DSP_REG_PRODH, "PROD.H", "Prod H",},
{0x17, "PROD.M2", "Prod M2",}, {DSP_REG_PRODM2, "PROD.M2", "Prod M2",},
{0x18, "AX0.L", "Extra Accu L 0",}, {DSP_REG_AXL0, "AX0.L", "Extra Accu L 0",},
{0x19, "AX1.L", "Extra Accu L 1",}, {DSP_REG_AXL1, "AX1.L", "Extra Accu L 1",},
{0x1a, "AX0.H", "Extra Accu H 0",}, {DSP_REG_AXH0, "AX0.H", "Extra Accu H 0",},
{0x1b, "AX1.H", "Extra Accu H 1",}, {DSP_REG_AXH1, "AX1.H", "Extra Accu H 1",},
{0x1c, "AC0.L", "Accu Low 0",}, {DSP_REG_ACL0, "AC0.L", "Accu Low 0",},
{0x1d, "AC1.L", "Accu Low 1",}, {DSP_REG_ACL1, "AC1.L", "Accu Low 1",},
{0x1e, "AC0.M", "Accu Mid 0",}, {DSP_REG_ACM0, "AC0.M", "Accu Mid 0",},
{0x1f, "AC1.M", "Accu Mid 1",}, {DSP_REG_ACM1, "AC1.M", "Accu Mid 1",},
// To resolve combined register names. // To resolve combined register names.
{0x20, "ACC0", "Accu Full 0",}, {DSP_REG_ACC0_FULL, "ACC0", "Accu Full 0",},
{0x21, "ACC1", "Accu Full 1",}, {DSP_REG_ACC1_FULL, "ACC1", "Accu Full 1",},
{0x22, "AX0", "Extra Accu 0",}, {DSP_REG_AX0_FULL, "AX0", "Extra Accu 0",},
{0x23, "AX1", "Extra Accu 1",}, {DSP_REG_AX1_FULL, "AX1", "Extra Accu 1",},
}}; }};
// clang-format on // clang-format on

31
Source/Core/Core/DSP/DSPTables.h
View File

@ -11,6 +11,7 @@
#include <string_view> #include <string_view>
#include "Core/DSP/DSPCommon.h" #include "Core/DSP/DSPCommon.h"
#include "Core/DSP/DSPCore.h"
namespace DSP namespace DSP
{ {
@ -31,23 +32,23 @@ enum partype_t
P_ADDR_I = 0x0005, P_ADDR_I = 0x0005,
P_ADDR_D = 0x0006, P_ADDR_D = 0x0006,
P_REG = 0x8000, P_REG = 0x8000,
P_REG04 = P_REG | 0x0400, // IX P_REG04 = P_REG | DSP_REG_IX0 << 8,
P_REG08 = P_REG | 0x0800, P_REG08 = P_REG | DSP_REG_WR0 << 8,
P_REG18 = P_REG | 0x1800, P_REG18 = P_REG | DSP_REG_AXL0 << 8,
P_REGM18 = P_REG | 0x1810, // used in multiply instructions P_REGM18 = P_REG | DSP_REG_AXL0 << 8 | 0x10, // used in multiply instructions
P_REG19 = P_REG | 0x1900, P_REG19 = P_REG | DSP_REG_AXL1 << 8,
P_REGM19 = P_REG | 0x1910, // used in multiply instructions P_REGM19 = P_REG | DSP_REG_AXL1 << 8 | 0x10, // used in multiply instructions
P_REG1A = P_REG | 0x1a80, P_REG1A = P_REG | DSP_REG_AXH0 << 8 | 0x80,
// P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value) // P_ACC = P_REG | 0x1c10, // used for global accum (gcdsptool's value)
P_ACCL = P_REG | 0x1c00, // used for low part of accum P_ACCL = P_REG | DSP_REG_ACL0 << 8, // used for low part of accum
P_REG1C = P_REG | 0x1c10, // gcdsptool calls this P_ACCLM P_REG1C = P_REG | DSP_REG_ACL0 << 8 | 0x10, // gcdsptool calls this P_ACCLM
P_ACCM = P_REG | 0x1e00, // used for mid part of accum P_ACCM = P_REG | DSP_REG_ACM0 << 8, // used for mid part of accum
// The following are not in gcdsptool // The following are not in gcdsptool
P_ACCM_D = P_REG | 0x1e80, P_ACCM_D = P_REG | DSP_REG_ACM0 << 8 | 0x80,
P_ACC = P_REG | 0x2000, // used for full accum. P_ACC = P_REG | DSP_REG_ACC0_FULL << 8, // used for full accum.
P_ACCH = P_REG | 0x1000, // used for high part of accum P_ACCH = P_REG | DSP_REG_ACH0 << 8, // used for high part of accum
P_ACC_D = P_REG | 0x2080, P_ACC_D = P_REG | DSP_REG_ACC0_FULL << 8 | 0x80,
P_AX = P_REG | 0x2200, P_AX = P_REG | DSP_REG_AX0_FULL << 8,
P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80 P_REGS_MASK = 0x03f80, // gcdsptool's value = 0x01f80
P_REF = P_REG | 0x4000, P_REF = P_REG | 0x4000,
P_PRG = P_REF | P_REG, P_PRG = P_REF | P_REG,