diff --git a/Source/Core/DSPCore/Src/DSPAccelerator.cpp b/Source/Core/DSPCore/Src/DSPAccelerator.cpp
index 5a3441c420..96b49e5342 100644
--- a/Source/Core/DSPCore/Src/DSPAccelerator.cpp
+++ b/Source/Core/DSPCore/Src/DSPAccelerator.cpp
@@ -143,8 +143,8 @@ u16 dsp_read_accelerator()
 		Address = (gdsp_ifx_regs[DSP_ACSAH] << 16) | gdsp_ifx_regs[DSP_ACSAL];
 
 		// Do we really need both?
-		DSPCore_SetException(3);
-		DSPCore_SetException(5);
+		DSPCore_SetException(EXP_4); 
+		DSPCore_SetException(EXP_ACCOV);
 
 		// Somehow, YN1 and YN2 must be initialized with their "loop" values, so yeah,
 		// it seems likely that we should raise an exception to let the DSP program do that,
diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp
index 565e2e6b1a..e26f37ace1 100644
--- a/Source/Core/DSPCore/Src/DSPCore.cpp
+++ b/Source/Core/DSPCore/Src/DSPCore.cpp
@@ -37,6 +37,7 @@ SDSP g_dsp;
 DSPBreakpoints dsp_breakpoints;
 DSPCoreState core_state = DSPCORE_RUNNING;
 Common::Event step_event;
+DSPInitialize *dsp_initialize = NULL;
 
 static bool LoadRom(const char *fname, int size_in_words, u16 *rom)
 {
@@ -64,8 +65,10 @@ static bool LoadRom(const char *fname, int size_in_words, u16 *rom)
 	return false;
 }
 
-bool DSPCore_Init(const char *irom_filename, const char *coef_filename)
+bool DSPCore_Init(const char *irom_filename, const char *coef_filename, DSPInitialize *dspInit)
 {
+	dsp_initialize = dspInit;
+
 	g_dsp.step_counter = 0;
 
 	g_dsp.irom = (u16*)AllocateMemoryPages(DSP_IROM_BYTE_SIZE);
@@ -157,10 +160,10 @@ void DSPCore_CheckExternalInterrupt()
 	// check if there is an external interrupt
 	if (g_dsp.cr & CR_EXTERNAL_INT)
 	{
-		if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false))
+		if (dsp_SR_is_flag_set(SR_EXT_INT_ENABLE) && (g_dsp.exception_in_progress_hack == false))
 		{
 			// level 7 is the interrupt exception
-			DSPCore_SetException(7);
+			DSPCore_SetException(EXP_INT);
 			
 			g_dsp.cr &= ~CR_EXTERNAL_INT;
 		}
diff --git a/Source/Core/DSPCore/Src/DSPCore.h b/Source/Core/DSPCore/Src/DSPCore.h
index eab5773c03..7daa33eae0 100644
--- a/Source/Core/DSPCore/Src/DSPCore.h
+++ b/Source/Core/DSPCore/Src/DSPCore.h
@@ -27,6 +27,7 @@
 #define _DSPCORE_H
 
 #include "DSPBreakpoints.h"
+#include "AudioCommon.h"
 
 #define DSP_IRAM_BYTE_SIZE   0x2000
 #define DSP_IRAM_SIZE        0x1000
@@ -153,7 +154,7 @@
 #define SR_TOP2BITS     0x0020   // this is an odd one. (set by tst)
 #define SR_LOGIC_ZERO   0x0040
 #define SR_INT_ENABLE   0x0200   // Not 100% sure but duddie says so. This should replace the hack, if so.
-#define SR_800          0x0800   // Appears in zelda - what is it? where in the zelda ucode?
+#define SR_EXT_INT_ENABLE 0x0800   // Appears in zelda - seems to disable external interupts
 #define SR_MUL_MODIFY   0x2000   // 1 = normal. 0 = x2   (M0, M2)
 #define SR_40_MODE_BIT  0x4000   // 0 = "16", 1 = "40"  (SET16, SET40)  Controls sign extension when loading mid accums.
 #define SR_MUL_UNSIGNED 0x8000   // 0 = normal. 1 = unsigned  (CLR15, SET15) If set, treats operands as unsigned. Tested with mulx only so far.
@@ -161,6 +162,15 @@
 // This should be the bits affected by CMP. Does not include logic zero.
 #define SR_CMP_MASK     0x3f
 
+// exceptions vector
+#define EXP_RESET 0 // 0x0000
+#define EXP_STOVF 1 // 0x0002 stack under/over flow
+#define EXP_4     2 // 0x0004
+#define EXP_6     3 // 0x0006
+#define EXP_8     4 // 0x0008
+#define EXP_ACCOV 5 // 0x000a accelerator address overflow
+#define EXP_c     6 // 0x000c
+#define EXP_INT   7 // 0x000e external int? (mail?)
 
 struct SDSP
 {
@@ -202,8 +212,10 @@ struct SDSP
 
 extern SDSP g_dsp;
 extern DSPBreakpoints dsp_breakpoints;
+extern DSPInitialize *dsp_initialize;
+
+bool DSPCore_Init(const char *irom_filename, const char *coef_filename, DSPInitialize *dspInit = NULL);
 
-bool DSPCore_Init(const char *irom_filename, const char *coef_filename);
 void DSPCore_Reset();
 void DSPCore_Shutdown();  // Frees all allocated memory.
 
diff --git a/Source/Core/DSPCore/Src/DSPHWInterface.cpp b/Source/Core/DSPCore/Src/DSPHWInterface.cpp
index 7bfd7cf467..7641e01561 100644
--- a/Source/Core/DSPCore/Src/DSPHWInterface.cpp
+++ b/Source/Core/DSPCore/Src/DSPHWInterface.cpp
@@ -142,7 +142,7 @@ void gdsp_ifx_write(u16 addr, u16 val)
 		    break;
 
 		case 0xd3:   // ZeldaUnk (accelerator WRITE)
-		   	ERROR_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val);
+		   	INFO_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val);
 			dsp_write_aram_d3(val);
 			break;
 
diff --git a/Source/Core/DSPCore/Src/DSPIntUtil.h b/Source/Core/DSPCore/Src/DSPIntUtil.h
index 203450b20f..a4ef54f3b4 100644
--- a/Source/Core/DSPCore/Src/DSPIntUtil.h
+++ b/Source/Core/DSPCore/Src/DSPIntUtil.h
@@ -38,12 +38,12 @@
 // ---------------------------------------------------------------------------------------
 inline void dsp_SR_set_flag(int flag)
 {
-	g_dsp.r[DSP_REG_SR] |= (1 << flag);
+	g_dsp.r[DSP_REG_SR] |= flag;
 }
 
 inline bool dsp_SR_is_flag_set(int flag)
 {
-	return (g_dsp.r[DSP_REG_SR] & (1 << flag)) != 0;
+	return (g_dsp.r[DSP_REG_SR] & flag) != 0;
 }
 
 
diff --git a/Source/Core/DSPCore/Src/DSPInterpreter.h b/Source/Core/DSPCore/Src/DSPInterpreter.h
index 4fc879c1c7..d8f4d84f58 100644
--- a/Source/Core/DSPCore/Src/DSPInterpreter.h
+++ b/Source/Core/DSPCore/Src/DSPInterpreter.h
@@ -21,7 +21,6 @@
 #include "DSPTables.h"
 
 #define DSP_REG_MASK    0x1f
-#define FLAG_ENABLE_INTERUPT    11
 
 namespace DSPInterpreter {
 
diff --git a/Source/Core/DSPCore/Src/DspIntBranch.cpp b/Source/Core/DSPCore/Src/DspIntBranch.cpp
index b843526906..f37cc71ba0 100644
--- a/Source/Core/DSPCore/Src/DspIntBranch.cpp
+++ b/Source/Core/DSPCore/Src/DspIntBranch.cpp
@@ -48,8 +48,8 @@ void call(const UDSPInstruction& opc)
 // Generic callr implementation
 // CALLRcc $R
 // 0001 0111 rrr1 cccc
-// Call functionif condition cc has been met.Push program counter of 
-// instruction following "call" tocall stack $st0. Set program counter to 
+// Call function if condition cc has been met. Push program counter of 
+// instruction following "call" to call stack $st0. Set program counter to 
 // register $R.
 void callr(const UDSPInstruction& opc)
 {
@@ -121,7 +121,6 @@ void ret(const UDSPInstruction& opc)
 // Return from exception. Pops stored status register $sr from data stack
 // $st1 and program counter PC from call stack $st0 and sets $pc to this
 // location.
-// FIXME: is it also conditional? unknown opcodes 0x02fx
 void rti(const UDSPInstruction& opc)
 {
 	g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D);
diff --git a/Source/Plugins/Plugin_DSP_LLE/Src/main.cpp b/Source/Plugins/Plugin_DSP_LLE/Src/main.cpp
index e3b767ec52..11b8dc8a98 100644
--- a/Source/Plugins/Plugin_DSP_LLE/Src/main.cpp
+++ b/Source/Plugins/Plugin_DSP_LLE/Src/main.cpp
@@ -206,12 +206,14 @@ void Initialize(void *init)
 
 	std::string irom_filename = File::GetSysDirectory() + GC_SYS_DIR + DIR_SEP + DSP_IROM;
 	std::string coef_filename = File::GetSysDirectory() + GC_SYS_DIR + DIR_SEP + DSP_COEF;
-	bCanWork = DSPCore_Init(irom_filename.c_str(), coef_filename.c_str());
+	bCanWork = DSPCore_Init(irom_filename.c_str(), coef_filename.c_str(), &g_dspInitialize);
+
 	g_dsp.cpu_ram = g_dspInitialize.pGetMemoryPointer(0);
 	DSPCore_Reset();
 
 	if (!bCanWork)
 	{
+		PanicAlert("DSPLLE: Failed to initialize plugin, exiting");
 		DSPCore_Shutdown();
 		return;
 	}